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78 lines
1.5 KiB
C++
78 lines
1.5 KiB
C++
//
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// Chipset.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 22/07/2021.
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// Copyright © 2021 Thomas Harte. All rights reserved.
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//
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#ifndef Chipset_hpp
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#define Chipset_hpp
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#include <cstddef>
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#include <cstdint>
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#include "../../Processors/68000/68000.hpp"
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#include "Blitter.hpp"
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namespace Amiga {
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class Chipset {
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public:
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Chipset(uint16_t *ram, size_t size);
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/// @returns The duration from now until the beginning of the next
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/// available CPU slot for accessing chip memory.
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HalfCycles time_until_cpu_slot();
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struct Changes {
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int hsyncs = 0;
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int vsyncs = 0;
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// TODO: interrupt change?
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};
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/// Advances the stated amount of time.
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Changes run_for(HalfCycles);
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/// Performs the provided microcycle, which the caller guarantees to be a memory access.
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void perform(const CPU::MC68000::Microcycle &);
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private:
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// MARK: - Interrupts.
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uint16_t interrupt_enable_ = 0;
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uint16_t interrupt_requests_ = 0;
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void update_interrupts() {
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// TODO.
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}
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// MARK: - DMA Control and Blitter.
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uint16_t dma_control_ = 0;
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Blitter blitter_;
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// MARK: - Sprites.
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struct Sprite {
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void set_pointer(int shift, uint16_t value);
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void set_start_position(uint16_t value);
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void set_stop_and_control(uint16_t value);
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void set_image_data(int slot, uint16_t value);
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} sprites_[8];
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// MARK: - Raster.
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int x_ = 0, y_ = 0;
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int line_length_ = 227;
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uint16_t display_window_start_[2] = {0, 0};
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uint16_t display_window_stop_[2] = {0, 0};
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uint16_t fetch_window_[2] = {0, 0};
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};
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}
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#endif /* Chipset_hpp */
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