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120 lines
3.8 KiB
C++
120 lines
3.8 KiB
C++
//
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// Decoder.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 10/04/2022.
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// Copyright © 2022 Thomas Harte. All rights reserved.
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//
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#ifndef InstructionSets_M68k_Decoder_hpp
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#define InstructionSets_M68k_Decoder_hpp
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#include "Instruction.hpp"
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#include "Model.hpp"
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#include "../../Numeric/Sizes.hpp"
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namespace InstructionSet::M68k {
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/*!
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A stateless decoder that can map from instruction words to preinstructions
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(i.e. enough to know the operation and size, and either know the addressing mode
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and registers or else know how many further extension words are needed).
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WARNING: at present this handles the original 68000 instruction set only. It
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requires a model only for the sake of not baking in assumptions about MOVE SR, etc,
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and supporting extended addressing modes in some cases.
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But it does not yet decode any operations which were not present on the 68000.
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*/
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template <Model model> class Predecoder {
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public:
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Preinstruction decode(uint16_t instruction);
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private:
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// Page by page decoders; each gets a bit ad hoc so
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// it is neater to separate them.
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Preinstruction decode0(uint16_t instruction);
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Preinstruction decode1(uint16_t instruction);
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Preinstruction decode2(uint16_t instruction);
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Preinstruction decode3(uint16_t instruction);
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Preinstruction decode4(uint16_t instruction);
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Preinstruction decode5(uint16_t instruction);
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Preinstruction decode6(uint16_t instruction);
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Preinstruction decode7(uint16_t instruction);
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Preinstruction decode8(uint16_t instruction);
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Preinstruction decode9(uint16_t instruction);
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Preinstruction decodeA(uint16_t instruction);
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Preinstruction decodeB(uint16_t instruction);
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Preinstruction decodeC(uint16_t instruction);
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Preinstruction decodeD(uint16_t instruction);
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Preinstruction decodeE(uint16_t instruction);
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Preinstruction decodeF(uint16_t instruction);
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// Yuckiness here: 67 is a count of the number of things contained below in
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// ExtendedOperation; this acts to ensure ExtendedOperation is the minimum
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// integer size large enough to hold all actual operations plus the ephemeral
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// ones used here. Intention is to support table-based decoding, which will mean
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// making those integers less ephemeral, hence the desire to pick a minimum size.
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using OpT = typename MinIntTypeValue<
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uint64_t(OperationMax<model>::value) + 67
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>::type;
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static constexpr auto OpMax = OpT(OperationMax<model>::value);
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// Specific instruction decoders.
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template <OpT operation, bool validate = true> Preinstruction decode(uint16_t instruction);
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template <OpT operation, bool validate> Preinstruction validated(
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AddressingMode op1_mode = AddressingMode::None, int op1_reg = 0,
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AddressingMode op2_mode = AddressingMode::None, int op2_reg = 0,
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Condition condition = Condition::True,
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int further_extension_words = 0
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);
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template <OpT operation> uint32_t invalid_operands();
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// Extended operation list; collapses into a single byte enough information to
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// know both the type of operation and how to decode the operands. Most of the
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// time that's knowable from the Operation alone, hence the rather awkward
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// extension of @c Operation.
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enum ExtendedOperation: OpT {
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MOVEPtoRl = OpMax + 1, MOVEPtoRw,
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MOVEPtoMl, MOVEPtoMw,
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MOVEQ,
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ADDQb, ADDQw, ADDQl,
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ADDQAw, ADDQAl,
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SUBQb, SUBQw, SUBQl,
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SUBQAw, SUBQAl,
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ADDIb, ADDIw, ADDIl,
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ORIb, ORIw, ORIl,
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SUBIb, SUBIw, SUBIl,
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ANDIb, ANDIw, ANDIl,
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EORIb, EORIw, EORIl,
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CMPIb, CMPIw, CMPIl,
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BTSTI, BCHGI, BCLRI, BSETI,
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CMPMb, CMPMw, CMPMl,
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ADDtoMb, ADDtoMw, ADDtoMl,
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ADDtoRb, ADDtoRw, ADDtoRl,
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SUBtoMb, SUBtoMw, SUBtoMl,
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SUBtoRb, SUBtoRw, SUBtoRl,
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ANDtoMb, ANDtoMw, ANDtoMl,
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ANDtoRb, ANDtoRw, ANDtoRl,
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ORtoMb, ORtoMw, ORtoMl,
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ORtoRb, ORtoRw, ORtoRl,
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EXGRtoR, EXGAtoA, EXGRtoA,
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};
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static constexpr Operation operation(OpT op);
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};
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}
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#endif /* InstructionSets_M68k_Decoder_hpp */
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