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344 lines
10 KiB
C++
344 lines
10 KiB
C++
//
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// Executor.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 16/1/21.
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// Copyright © 2021 Thomas Harte. All rights reserved.
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//
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#include "Executor.hpp"
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#include <algorithm>
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#include <cassert>
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#include <cstring>
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using namespace InstructionSet::M50740;
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Executor::Executor() {
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// Cut down the list of all generated performers to those the processor actually uses, and install that
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// for future referencing by action_for.
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Decoder decoder;
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for(size_t c = 0; c < 256; c++) {
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const auto instruction = decoder.instrucion_for_opcode(uint8_t(c));
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// Treat invalid as NOP, because I've got to do _something_.
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if(instruction.operation == Operation::Invalid) {
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performers_[c] = performer_lookup_.performer(Operation::NOP, instruction.addressing_mode);
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} else {
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performers_[c] = performer_lookup_.performer(instruction.operation, instruction.addressing_mode);
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}
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}
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}
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void Executor::set_rom(const std::vector<uint8_t> &rom) {
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// Copy into place, and reset.
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const auto length = std::min(size_t(0x1000), rom.size());
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memcpy(&memory_[0x2000 - length], rom.data(), length);
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reset();
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// TEMPORARY: just to test initial wiring.
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for(int c = 0; c < 130; c++) {
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run_to_branch();
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}
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}
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void Executor::reset() {
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// Just jump to the reset vector.
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set_program_counter(uint16_t(memory_[0x1ffe] | (memory_[0x1fff] << 8)));
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}
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uint8_t Executor::read(uint16_t address) {
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address &= 0x1fff;
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switch(address) {
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default: return memory_[address];
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// TODO: external IO ports.
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// "Port R"; sixteen four-bit ports
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case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
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case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
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printf("TODO: Port R\n");
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return 0xff;
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// Ports P0–P3.
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case 0xe0: case 0xe1:
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case 0xe2: case 0xe3:
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case 0xe4: case 0xe5:
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case 0xe8: case 0xe9:
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printf("TODO: Ports P0–P3\n");
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return 0xff;
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// Timers.
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case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff:
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printf("TODO: Timers\n");
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return 0xff;
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}
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}
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void Executor::write(uint16_t address, uint8_t value) {
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address &= 0x1fff;
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if(address < 0x60) {
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memory_[address] = value;
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return;
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}
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// TODO: all external IO ports.
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}
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void Executor::push(uint8_t value) {
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write(s_, value);
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--s_;
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}
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uint8_t Executor::pull() {
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++s_;
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return read(s_);
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}
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void Executor::set_flags(uint8_t flags) {
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negative_result_ = flags;
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overflow_result_ = uint8_t(flags << 1);
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index_mode_ = flags & 0x20;
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decimal_mode_ = flags & 0x08;
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interrupt_disable_ = flags & 0x04;
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zero_result_ = !(flags & 0x02);
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carry_flag_ = flags & 0x01;
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}
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uint8_t Executor::flags() {
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return
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(negative_result_ & 0x80) |
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((overflow_result_ & 0x80) >> 1) |
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(index_mode_ ? 0x20 : 0x00) |
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(decimal_mode_ ? 0x08 : 0x00) |
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interrupt_disable_ |
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(zero_result_ ? 0x00 : 0x02) |
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carry_flag_;
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}
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template <Operation operation, AddressingMode addressing_mode> void Executor::perform() {
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// Deal with all modes that don't access memory up here;
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// those that access memory will go through a slightly longer
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// sequence below that wraps the address and checks whether
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// a write is valid [if required].
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int address;
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#define next8() memory_[(program_counter_ + 1) & 0x1fff]
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#define next16() (memory_[(program_counter_ + 1) & 0x1fff] | (memory_[(program_counter_ + 2) & 0x1fff] << 8))
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printf("%04x\t%02x\t%d %d\t[x:%02x s:%02x]\n", program_counter_ & 0x1fff, memory_[program_counter_ & 0x1fff], int(operation), int(addressing_mode), x_, s_);
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// Underlying assumption below: the instruction stream will never
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// overlap with IO ports.
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switch(addressing_mode) {
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// Addressing modes with no further memory access.
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case AddressingMode::Implied:
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perform<operation>(nullptr);
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++program_counter_;
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return;
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case AddressingMode::Accumulator:
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perform<operation>(&a_);
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++program_counter_;
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return;
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case AddressingMode::Immediate:
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perform<operation>(&next8());
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program_counter_ += 2;
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return;
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// Special-purpose addressing modes.
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case AddressingMode::Relative:
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address = program_counter_ + 1 + size(addressing_mode) + int8_t(next8());
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break;
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case AddressingMode::SpecialPage: address = 0x1f00 | next8(); break;
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case AddressingMode::ImmediateZeroPage:
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// LDM only...
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write(memory_[(program_counter_+2)&0x1fff], memory_[(program_counter_+1)&0x1fff]);
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program_counter_ += 1 + size(addressing_mode);
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return;
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/* TODO:
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AccumulatorRelative
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ZeroPageRelative
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... which are BBC/BBS-exclusive.
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*/
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// Addressing modes with a memory access.
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case AddressingMode::Absolute: address = next16(); break;
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case AddressingMode::AbsoluteX: address = next16() + x_; break;
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case AddressingMode::AbsoluteY: address = next16() + y_; break;
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case AddressingMode::ZeroPage: address = next8(); break;
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case AddressingMode::ZeroPageX: address = (next8() + x_) & 0xff; break;
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case AddressingMode::ZeroPageY: address = (next8() + x_) & 0xff; break;
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case AddressingMode::ZeroPageIndirect:
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address = next8();
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address = memory_[address] | (memory_[(address + 1) & 0xff] << 8);
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break;
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case AddressingMode::XIndirect:
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address = (next8() + x_) & 0xff;
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address = memory_[address] | (memory_[(address + 1)&0xff] << 8);
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break;
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case AddressingMode::IndirectY:
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address = (memory_[next8()] | (memory_[(next8()+1)&0xff] << 8)) + y_;
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break;
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case AddressingMode::AbsoluteIndirect:
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address = next16();
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address = memory_[address] | (memory_[(address + 1) & 0x1fff] << 8);
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break;
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default:
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assert(false);
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}
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#undef next16
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#undef next8
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program_counter_ += 1 + size(addressing_mode);
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// Check for a branch; those don't go through the memory accesses below.
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switch(operation) {
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case Operation::BRA: case Operation::JMP:
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set_program_counter(uint16_t(address));
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return;
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case Operation::JSR: {
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const auto return_address = program_counter_ - 1;
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push(uint8_t(return_address >> 8));
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push(uint8_t(return_address & 0xff));
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set_program_counter(uint16_t(address));
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} return;
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case Operation::BPL: if(!(negative_result_&0x80)) set_program_counter(uint16_t(address)); return;
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case Operation::BMI: if(negative_result_&0x80) set_program_counter(uint16_t(address)); return;
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case Operation::BEQ: if(!zero_result_) set_program_counter(uint16_t(address)); return;
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case Operation::BNE: if(zero_result_) set_program_counter(uint16_t(address)); return;
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case Operation::BCS: if(carry_flag_) set_program_counter(uint16_t(address)); return;
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case Operation::BCC: if(!carry_flag_) set_program_counter(uint16_t(address)); return;
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case Operation::BVS: if(overflow_result_ & 0x80) set_program_counter(uint16_t(address)); return;
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case Operation::BVC: if(!(overflow_result_ & 0x80)) set_program_counter(uint16_t(address)); return;
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/* TODO: BBC, BBS. */
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default: break;
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}
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assert(access_type(operation) != AccessType::None);
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if constexpr(access_type(operation) == AccessType::Read) {
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uint8_t source = read(uint16_t(address));
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perform<operation>(&source);
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return;
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}
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uint8_t value;
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if constexpr(access_type(operation) == AccessType::ReadModifyWrite) {
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value = read(uint16_t(address));
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} else {
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value = 0xff;
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}
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perform<operation>(&value);
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write(uint16_t(address), value);
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}
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template <Operation operation> void Executor::perform(uint8_t *operand [[maybe_unused]]) {
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#define set_nz(a) negative_result_ = zero_result_ = (a)
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switch(operation) {
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case Operation::LDA: set_nz(a_ = *operand); break;
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case Operation::LDX: set_nz(x_ = *operand); break;
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case Operation::LDY: set_nz(y_ = *operand); break;
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case Operation::STA: *operand = a_; break;
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case Operation::STX: *operand = x_; break;
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case Operation::STY: *operand = y_; break;
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case Operation::TXA: set_nz(a_ = x_); break;
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case Operation::TYA: set_nz(a_ = y_); break;
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case Operation::TXS: s_ = x_; break;
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case Operation::TAX: set_nz(x_ = a_); break;
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case Operation::TAY: set_nz(y_ = a_); break;
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case Operation::TSX: set_nz(x_ = s_); break;
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case Operation::SEB0: case Operation::SEB1: case Operation::SEB2: case Operation::SEB3:
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case Operation::SEB4: case Operation::SEB5: case Operation::SEB6: case Operation::SEB7:
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*operand |= 1 << (int(operation) - int(Operation::SEB0));
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break;
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case Operation::CLB0: case Operation::CLB1: case Operation::CLB2: case Operation::CLB3:
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case Operation::CLB4: case Operation::CLB5: case Operation::CLB6: case Operation::CLB7:
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*operand &= ~(1 << (int(operation) - int(Operation::CLB0)));
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break;
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case Operation::CLI: interrupt_disable_ = 0x00; break;
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case Operation::SEI: interrupt_disable_ = 0x04; break;
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case Operation::CLT: index_mode_ = false; break;
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case Operation::SET: index_mode_ = true; break;
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case Operation::CLD: decimal_mode_ = false; break;
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case Operation::SED: decimal_mode_ = true; break;
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case Operation::CLC: carry_flag_ = 0; break;
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case Operation::SEC: carry_flag_ = 1; break;
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case Operation::CLV: overflow_result_ = 0; break;
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case Operation::DEX: --x_; set_nz(x_); break;
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case Operation::INX: ++x_; set_nz(x_); break;
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case Operation::DEY: --y_; set_nz(y_); break;
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case Operation::INY: ++y_; set_nz(y_); break;
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case Operation::DEC: --*operand; set_nz(*operand); break;
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case Operation::INC: ++*operand; set_nz(*operand); break;
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case Operation::RTS: {
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uint16_t target = pull();
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target |= pull() << 8;
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set_program_counter(target+1);
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--program_counter_; // To undo the unavoidable increment
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// after exiting from here.
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} break;
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case Operation::RTI: {
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set_flags(pull());
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uint16_t target = pull();
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target |= pull() << 8;
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set_program_counter(target);
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--program_counter_; // To undo the unavoidable increment
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// after exiting from here.
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} break;
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case Operation::ORA: set_nz(a_ |= *operand); break;
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case Operation::AND: set_nz(a_ &= *operand); break;
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case Operation::EOR: set_nz(a_ ^= *operand); break;
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/*
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Operations affected by the index mode flag: ADC, AND, CMP, EOR, LDA, ORA, and SBC.
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*/
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/*
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Already removed from the instruction stream:
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* all branches and jumps;
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* LDM.
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*/
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default:
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printf("Unimplemented operation: %d\n", int(operation));
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assert(false);
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}
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#undef set_nz
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}
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void Executor::set_program_counter(uint16_t address) {
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printf("--- %04x ---\n", (address & 0x1fff) - 0x1000);
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program_counter_ = address;
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CachingExecutor::set_program_counter(address);
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}
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