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144 lines
3.9 KiB
C++
144 lines
3.9 KiB
C++
//
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// Video.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 10/12/2016.
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// Copyright 2016 Thomas Harte. All rights reserved.
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//
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#ifndef Machines_Electron_Video_hpp
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#define Machines_Electron_Video_hpp
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#include "../../Outputs/CRT/CRT.hpp"
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#include "../../ClockReceiver/ClockReceiver.hpp"
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#include "Interrupts.hpp"
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#include <vector>
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namespace Electron {
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/*!
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Implements the Electron's video subsystem plus appropriate signalling.
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The Electron has an interlaced fully-bitmapped display with six different output modes,
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running either at 40 or 80 columns. Memory is shared between video and CPU; when the video
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is accessing it the CPU may not.
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*/
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class VideoOutput {
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public:
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/*!
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Instantiates a VideoOutput that will read its pixels from @c memory.
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The pointer supplied should be to address 0 in the unexpanded Electron's memory map.
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*/
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VideoOutput(uint8_t *memory);
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/// Produces the next @c cycles of video output.
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void run_for(const Cycles cycles);
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/// Sets the destination for output.
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void set_scan_target(Outputs::Display::ScanTarget *scan_target);
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/// Gets the current scan status.
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Outputs::Display::ScanStatus get_scaled_scan_status() const;
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/// Sets the type of output.
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void set_display_type(Outputs::Display::DisplayType);
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/// Gets the type of output.
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Outputs::Display::DisplayType get_display_type() const;
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/*!
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Writes @c value to the register at @c address. May mutate the results of @c get_next_interrupt,
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@c get_cycles_until_next_ram_availability and @c get_memory_access_range.
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*/
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void write(int address, uint8_t value);
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/*!
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Describes an interrupt the video hardware will generate by its identity and scheduling time.
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*/
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struct Interrupt {
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/// The interrupt that will be signalled.
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Electron::Interrupt interrupt;
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/// The number of cycles until it is signalled.
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int cycles;
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};
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/*!
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@returns the next interrupt that should be generated as a result of the video hardware.
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The time until signalling returned is the number of cycles after the final one triggered
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by the most recent call to @c run_for.
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This result may be mutated by calls to @c write.
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*/
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Interrupt get_next_interrupt();
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/*!
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@returns the number of cycles after (final cycle of last run_for batch + @c from_time)
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before the video circuits will allow the CPU to access RAM.
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*/
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unsigned int get_cycles_until_next_ram_availability(int from_time);
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struct Range {
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uint16_t low_address, high_address;
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};
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/*!
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@returns the range of addresses that the video might read from.
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*/
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Range get_memory_access_range();
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private:
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inline void start_pixel_line();
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inline void end_pixel_line();
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inline void output_pixels(int number_of_cycles);
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inline void setup_base_address();
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int output_position_ = 0;
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uint8_t palette_[16];
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uint8_t screen_mode_ = 6;
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uint16_t screen_mode_base_address_ = 0;
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uint16_t start_screen_address_ = 0;
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uint8_t *ram_;
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struct {
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uint32_t forty1bpp[256];
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uint16_t forty2bpp[256];
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uint64_t eighty1bpp[256];
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uint32_t eighty2bpp[256];
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uint16_t eighty4bpp[256];
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} palette_tables_;
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// Display generation.
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uint16_t start_line_address_ = 0;
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uint16_t current_screen_address_ = 0;
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int current_pixel_line_ = -1;
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int current_pixel_column_ = 0;
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int current_character_row_ = 0;
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uint8_t last_pixel_byte_ = 0;
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bool is_blank_line_ = false;
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// CRT output
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uint8_t *current_output_target_ = nullptr;
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uint8_t *initial_output_target_ = nullptr;
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int current_output_divider_ = 1;
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Outputs::CRT::CRT crt_;
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struct DrawAction {
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enum Type {
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Sync, ColourBurst, Blank, Pixels
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} type;
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int length;
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DrawAction(Type type, int length) : type(type), length(length) {}
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};
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std::vector<DrawAction> screen_map_;
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void setup_screen_map();
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void emplace_blank_line();
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void emplace_pixel_line();
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std::size_t screen_map_pointer_ = 0;
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int cycles_into_draw_action_ = 0;
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};
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}
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#endif /* Video_hpp */
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