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424 lines
12 KiB
C++
424 lines
12 KiB
C++
//
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// 6522.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 06/06/2016.
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// Copyright © 2016 Thomas Harte. All rights reserved.
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//
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#ifndef _522_hpp
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#define _522_hpp
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#include <cstdint>
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#include <typeinfo>
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#include <cstdio>
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namespace MOS {
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/*!
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Implements a template for emulation of the MOS 6522 Versatile Interface Adaptor ('VIA').
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The VIA provides:
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* two timers, each of which may trigger interrupts and one of which may repeat;
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* two digial input/output ports; and
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* a serial-to-parallel shifter.
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Consumers should derive their own curiously-recurring-template-pattern subclass,
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implementing bus communications as required.
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*/
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template <class T> class MOS6522 {
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private:
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enum InterruptFlag: uint8_t {
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CA2ActiveEdge = 1 << 0,
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CA1ActiveEdge = 1 << 1,
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ShiftRegister = 1 << 2,
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CB2ActiveEdge = 1 << 3,
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CB1ActiveEdge = 1 << 4,
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Timer2 = 1 << 5,
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Timer1 = 1 << 6,
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};
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public:
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enum Port {
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A = 0,
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B = 1
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};
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enum Line {
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One = 0,
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Two = 1
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};
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/*! Sets a register value. */
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inline void set_register(int address, uint8_t value)
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{
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address &= 0xf;
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// printf("6522 [%s]: %0x <- %02x\n", typeid(*this).name(), address, value);
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switch(address)
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{
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case 0x0:
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registers_.output[1] = value;
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static_cast<T *>(this)->set_port_output(Port::B, value, registers_.data_direction[1]); // TODO: handshake
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registers_.interrupt_flags &= ~(InterruptFlag::CB1ActiveEdge | ((registers_.peripheral_control&0x20) ? 0 : InterruptFlag::CB2ActiveEdge));
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reevaluate_interrupts();
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break;
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case 0xf:
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case 0x1:
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registers_.output[0] = value;
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static_cast<T *>(this)->set_port_output(Port::A, value, registers_.data_direction[0]); // TODO: handshake
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registers_.interrupt_flags &= ~(InterruptFlag::CA1ActiveEdge | ((registers_.peripheral_control&0x02) ? 0 : InterruptFlag::CB2ActiveEdge));
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reevaluate_interrupts();
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break;
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// // No handshake, so write directly
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// registers_.output[0] = value;
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// static_cast<T *>(this)->set_port_output(0, value);
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// break;
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case 0x2:
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registers_.data_direction[1] = value;
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break;
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case 0x3:
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registers_.data_direction[0] = value;
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break;
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// Timer 1
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case 0x6: case 0x4: registers_.timer_latch[0] = (registers_.timer_latch[0]&0xff00) | value; break;
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case 0x5: case 0x7:
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registers_.timer_latch[0] = (registers_.timer_latch[0]&0x00ff) | (uint16_t)(value << 8);
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registers_.interrupt_flags &= ~InterruptFlag::Timer1;
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if(address == 0x05)
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{
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registers_.next_timer[0] = registers_.timer_latch[0];
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timer_is_running_[0] = true;
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}
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reevaluate_interrupts();
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break;
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// Timer 2
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case 0x8: registers_.timer_latch[1] = value; break;
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case 0x9:
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registers_.interrupt_flags &= ~InterruptFlag::Timer2;
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registers_.next_timer[1] = registers_.timer_latch[1] | (uint16_t)(value << 8);
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timer_is_running_[1] = true;
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reevaluate_interrupts();
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break;
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// Shift
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case 0xa: registers_.shift = value; break;
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// Control
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case 0xb:
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registers_.auxiliary_control = value;
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break;
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case 0xc:
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// printf("Peripheral control %02x\n", value);
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registers_.peripheral_control = value;
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// TODO: simplify below; trying to avoid improper logging of unimplemented warnings in input mode
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if(value & 0x08)
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{
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switch(value & 0x0e)
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{
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default: printf("Unimplemented control line mode %d\n", (value >> 1)&7); break;
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case 0x0c: static_cast<T *>(this)->set_control_line_output(Port::A, Line::Two, false); break;
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case 0x0e: static_cast<T *>(this)->set_control_line_output(Port::A, Line::Two, true); break;
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}
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}
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if(value & 0x80)
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{
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switch(value & 0xe0)
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{
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default: printf("Unimplemented control line mode %d\n", (value >> 5)&7); break;
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case 0xc0: static_cast<T *>(this)->set_control_line_output(Port::B, Line::Two, false); break;
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case 0xe0: static_cast<T *>(this)->set_control_line_output(Port::B, Line::Two, true); break;
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}
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}
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break;
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// Interrupt control
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case 0xd:
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registers_.interrupt_flags &= ~value;
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reevaluate_interrupts();
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break;
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case 0xe:
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if(value&0x80)
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registers_.interrupt_enable |= value;
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else
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registers_.interrupt_enable &= ~value;
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reevaluate_interrupts();
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break;
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}
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}
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/*! Gets a register value. */
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inline uint8_t get_register(int address)
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{
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address &= 0xf;
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// printf("6522 %p: %d\n", this, address);
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switch(address)
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{
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case 0x0:
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registers_.interrupt_flags &= ~(InterruptFlag::CB1ActiveEdge | InterruptFlag::CB2ActiveEdge);
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reevaluate_interrupts();
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return get_port_input(Port::B, registers_.data_direction[1], registers_.output[1]);
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case 0xf: // TODO: handshake, latching
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case 0x1:
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registers_.interrupt_flags &= ~(InterruptFlag::CA1ActiveEdge | InterruptFlag::CA2ActiveEdge);
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reevaluate_interrupts();
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return get_port_input(Port::A, registers_.data_direction[0], registers_.output[0]);
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case 0x2: return registers_.data_direction[1];
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case 0x3: return registers_.data_direction[0];
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// Timer 1
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case 0x4:
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registers_.interrupt_flags &= ~InterruptFlag::Timer1;
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reevaluate_interrupts();
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return registers_.timer[0] & 0x00ff;
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case 0x5: return registers_.timer[0] >> 8;
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case 0x6: return registers_.timer_latch[0] & 0x00ff;
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case 0x7: return registers_.timer_latch[0] >> 8;
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// Timer 2
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case 0x8:
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registers_.interrupt_flags &= ~InterruptFlag::Timer2;
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reevaluate_interrupts();
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return registers_.timer[1] & 0x00ff;
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case 0x9: return registers_.timer[1] >> 8;
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case 0xa: return registers_.shift;
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case 0xb: return registers_.auxiliary_control;
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case 0xc: return registers_.peripheral_control;
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case 0xd: return registers_.interrupt_flags | (get_interrupt_line() ? 0x80 : 0x00);
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case 0xe: return registers_.interrupt_enable | 0x80;
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}
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return 0xff;
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}
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inline void set_control_line_input(Port port, Line line, bool value)
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{
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switch(line)
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{
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case Line::One:
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if( value != control_inputs_[port].line_one &&
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value == !!(registers_.peripheral_control & (port ? 0x10 : 0x01))
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)
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{
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registers_.interrupt_flags |= port ? InterruptFlag::CB1ActiveEdge : InterruptFlag::CA1ActiveEdge;
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reevaluate_interrupts();
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}
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control_inputs_[port].line_one = value;
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break;
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case Line::Two:
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// TODO: output modes, but probably elsewhere?
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if( value != control_inputs_[port].line_two && // i.e. value has changed ...
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!(registers_.peripheral_control & (port ? 0x80 : 0x08)) && // ... and line is input ...
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value == !!(registers_.peripheral_control & (port ? 0x40 : 0x04)) // ... and it's either high or low, as required
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)
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{
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registers_.interrupt_flags |= port ? InterruptFlag::CB2ActiveEdge : InterruptFlag::CA2ActiveEdge;
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reevaluate_interrupts();
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}
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control_inputs_[port].line_two = value;
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break;
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}
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}
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#define phase2() \
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registers_.last_timer[0] = registers_.timer[0];\
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registers_.last_timer[1] = registers_.timer[1];\
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\
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if(registers_.timer_needs_reload)\
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{\
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registers_.timer_needs_reload = false;\
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registers_.timer[0] = registers_.timer_latch[0];\
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}\
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else\
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registers_.timer[0] --;\
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\
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registers_.timer[1] --; \
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if(registers_.next_timer[0] >= 0) { registers_.timer[0] = (uint16_t)registers_.next_timer[0]; registers_.next_timer[0] = -1; }\
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if(registers_.next_timer[1] >= 0) { registers_.timer[1] = (uint16_t)registers_.next_timer[1]; registers_.next_timer[1] = -1; }\
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// IRQ is raised on the half cycle after overflow
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#define phase1() \
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if((registers_.timer[1] == 0xffff) && !registers_.last_timer[1] && timer_is_running_[1])\
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{\
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timer_is_running_[1] = false;\
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registers_.interrupt_flags |= InterruptFlag::Timer2;\
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reevaluate_interrupts();\
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}\
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\
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if((registers_.timer[0] == 0xffff) && !registers_.last_timer[0] && timer_is_running_[0])\
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{\
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registers_.interrupt_flags |= InterruptFlag::Timer1;\
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reevaluate_interrupts();\
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\
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if(registers_.auxiliary_control&0x40)\
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registers_.timer_needs_reload = true;\
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else\
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timer_is_running_[0] = false;\
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}
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/*!
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Runs for a specified number of half cycles.
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Although the original chip accepts only a phase-2 input, timer reloads are specified as occuring
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1.5 cycles after the timer hits zero. It therefore may be necessary to emulate at half-cycle precision.
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The first emulated half-cycle will be the period between the trailing edge of a phase-2 input and the
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next rising edge. So it should align with a full system's phase-1. The next emulated half-cycle will be
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that which occurs during phase-2.
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Callers should decide whether they are going to use @c run_for_half_cycles or @c run_for_cycles, and not
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intermingle usage.
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*/
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inline void run_for_half_cycles(unsigned int number_of_cycles)
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{
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if(is_phase2_)
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{
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phase2();
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number_of_cycles--;
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}
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while(number_of_cycles >= 2)
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{
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phase1();
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phase2();
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number_of_cycles -= 2;
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}
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if(number_of_cycles)
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{
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phase1();
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is_phase2_ = true;
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}
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else
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{
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is_phase2_ = false;
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}
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}
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/*!
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Runs for a specified number of cycles.
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Callers should decide whether they are going to use @c run_for_half_cycles or @c run_for_cycles, and not
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intermingle usage.
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*/
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inline void run_for_cycles(unsigned int number_of_cycles)
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{
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while(number_of_cycles--)
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{
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phase1();
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phase2();
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}
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}
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#undef phase1
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#undef phase2
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/*! @returns @c true if the IRQ line is currently active; @c false otherwise. */
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inline bool get_interrupt_line()
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{
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uint8_t interrupt_status = registers_.interrupt_flags & registers_.interrupt_enable & 0x7f;
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return !!interrupt_status;
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}
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MOS6522() :
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timer_is_running_{false, false},
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last_posted_interrupt_status_(false),
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is_phase2_(false)
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{}
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private:
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// Expected to be overridden
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uint8_t get_port_input(Port port) { return 0xff; }
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void set_port_output(Port port, uint8_t value, uint8_t direction_mask) {}
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void set_control_line_output(Port port, Line line, bool value) {}
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void set_interrupt_status(bool status) {}
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// Input/output multiplexer
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uint8_t get_port_input(Port port, uint8_t output_mask, uint8_t output)
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{
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uint8_t input = static_cast<T *>(this)->get_port_input(port);
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return (input & ~output_mask) | (output & output_mask);
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}
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// Phase toggle
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bool is_phase2_;
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// Delegate and communications
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bool last_posted_interrupt_status_;
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inline void reevaluate_interrupts()
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{
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bool new_interrupt_status = get_interrupt_line();
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if(new_interrupt_status != last_posted_interrupt_status_)
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{
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last_posted_interrupt_status_ = new_interrupt_status;
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static_cast<T *>(this)->set_interrupt_status(new_interrupt_status);
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}
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}
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// The registers
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struct Registers {
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uint8_t output[2], input[2], data_direction[2];
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uint16_t timer[2], timer_latch[2], last_timer[2];
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int next_timer[2];
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uint8_t shift;
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uint8_t auxiliary_control, peripheral_control;
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uint8_t interrupt_flags, interrupt_enable;
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bool timer_needs_reload;
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// "A low reset (RES) input clears all R6522 internal registers to logic 0"
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Registers() :
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output{0, 0}, input{0, 0}, data_direction{0, 0},
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auxiliary_control(0), peripheral_control(0),
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interrupt_flags(0), interrupt_enable(0),
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last_timer{0, 0}, timer_needs_reload(false),
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next_timer{-1, -1} {}
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} registers_;
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// control state
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struct {
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bool line_one, line_two;
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} control_inputs_[2];
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// Internal state other than the registers
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bool timer_is_running_[2];
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};
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/*!
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Provided for optional composition with @c MOS6522, @c MOS6522IRQDelegate provides for a delegate
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that will receive IRQ line change notifications.
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*/
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class MOS6522IRQDelegate {
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public:
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class Delegate {
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public:
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virtual void mos6522_did_change_interrupt_status(void *mos6522) = 0;
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};
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inline void set_interrupt_delegate(Delegate *delegate)
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{
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delegate_ = delegate;
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}
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inline void set_interrupt_status(bool new_status)
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{
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if(delegate_) delegate_->mos6522_did_change_interrupt_status(this);
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}
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private:
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Delegate *delegate_;
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};
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}
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#endif /* _522_hpp */
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