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228 lines
7.5 KiB
Plaintext
228 lines
7.5 KiB
Plaintext
//
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// TestMachineZ80.m
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// Clock Signal
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//
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// Created by Thomas Harte on 16/05/2017.
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// Copyright © 2017 Thomas Harte. All rights reserved.
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//
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#import "TestMachineZ80.h"
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#include "Z80AllRAM.hpp"
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#import "TestMachine+ForSubclassEyesOnly.h"
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@interface CSTestMachineZ80 ()
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- (void)testMachineDidPerformBusOperation:(CPU::Z80::PartialMachineCycle::Operation)operation
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address:(uint16_t)address
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value:(uint8_t)value
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timeStamp:(int)time_stamp;
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@end
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#pragma mark - C++ delegate handlers
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class BusOperationHandler: public CPU::Z80::AllRAMProcessor::MemoryAccessDelegate {
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public:
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BusOperationHandler(CSTestMachineZ80 *targetMachine) : target_(targetMachine) {}
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void z80_all_ram_processor_did_perform_bus_operation(CPU::Z80::AllRAMProcessor &processor, CPU::Z80::PartialMachineCycle::Operation operation, uint16_t address, uint8_t value, int time_stamp) {
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[target_ testMachineDidPerformBusOperation:operation address:address value:value timeStamp:time_stamp];
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}
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private:
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CSTestMachineZ80 *target_;
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};
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#pragma mark - Register enum map
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static CPU::Z80::Register registerForRegister(CSTestMachineZ80Register reg) {
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switch (reg) {
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case CSTestMachineZ80RegisterAF: return CPU::Z80::Register::AF;
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case CSTestMachineZ80RegisterA: return CPU::Z80::Register::A;
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case CSTestMachineZ80RegisterF: return CPU::Z80::Register::Flags;
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case CSTestMachineZ80RegisterBC: return CPU::Z80::Register::BC;
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case CSTestMachineZ80RegisterB: return CPU::Z80::Register::B;
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case CSTestMachineZ80RegisterC: return CPU::Z80::Register::C;
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case CSTestMachineZ80RegisterDE: return CPU::Z80::Register::DE;
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case CSTestMachineZ80RegisterD: return CPU::Z80::Register::D;
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case CSTestMachineZ80RegisterE: return CPU::Z80::Register::E;
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case CSTestMachineZ80RegisterHL: return CPU::Z80::Register::HL;
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case CSTestMachineZ80RegisterH: return CPU::Z80::Register::H;
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case CSTestMachineZ80RegisterL: return CPU::Z80::Register::L;
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case CSTestMachineZ80RegisterAFDash: return CPU::Z80::Register::AFDash;
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case CSTestMachineZ80RegisterBCDash: return CPU::Z80::Register::BCDash;
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case CSTestMachineZ80RegisterDEDash: return CPU::Z80::Register::DEDash;
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case CSTestMachineZ80RegisterHLDash: return CPU::Z80::Register::HLDash;
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case CSTestMachineZ80RegisterIX: return CPU::Z80::Register::IX;
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case CSTestMachineZ80RegisterIY: return CPU::Z80::Register::IY;
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case CSTestMachineZ80RegisterI: return CPU::Z80::Register::I;
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case CSTestMachineZ80RegisterR: return CPU::Z80::Register::R;
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case CSTestMachineZ80RegisterIFF1: return CPU::Z80::Register::IFF1;
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case CSTestMachineZ80RegisterIFF2: return CPU::Z80::Register::IFF2;
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case CSTestMachineZ80RegisterIM: return CPU::Z80::Register::IM;
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case CSTestMachineZ80RegisterProgramCounter: return CPU::Z80::Register::ProgramCounter;
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case CSTestMachineZ80RegisterStackPointer: return CPU::Z80::Register::StackPointer;
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}
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}
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#pragma mark - Capture class
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@interface CSTestMachineZ80BusOperationCapture()
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@property(nonatomic, assign) CSTestMachineZ80BusOperationCaptureOperation operation;
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@property(nonatomic, assign) uint16_t address;
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@property(nonatomic, assign) uint8_t value;
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@property(nonatomic, assign) int timeStamp;
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@end
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@implementation CSTestMachineZ80BusOperationCapture
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- (NSString *)description {
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NSString *opName = @"";
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switch(self.operation) {
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case CSTestMachineZ80BusOperationCaptureOperationReadOpcode: opName = @"ro"; break;
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case CSTestMachineZ80BusOperationCaptureOperationRead: opName = @"r"; break;
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case CSTestMachineZ80BusOperationCaptureOperationWrite: opName = @"w"; break;
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case CSTestMachineZ80BusOperationCaptureOperationPortRead: opName = @"i"; break;
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case CSTestMachineZ80BusOperationCaptureOperationPortWrite: opName = @"o"; break;
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case CSTestMachineZ80BusOperationCaptureOperationInternalOperation: opName = @"iop"; break;
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}
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return [NSString stringWithFormat:@"%@ %04x %02x [%d]", opName, self.address, self.value, self.timeStamp];
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}
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@end
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#pragma mark - Test class
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@implementation CSTestMachineZ80 {
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CPU::Z80::AllRAMProcessor *_processor;
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BusOperationHandler *_busOperationHandler;
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NSMutableArray<CSTestMachineZ80BusOperationCapture *> *_busOperationCaptures;
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int _timeSeekingReadOpcode;
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}
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#pragma mark - Lifecycle
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- (instancetype)init {
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if(self = [super init]) {
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_processor = CPU::Z80::AllRAMProcessor::Processor();
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_processor->reset_power_on();
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_busOperationHandler = new BusOperationHandler(self);
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_busOperationCaptures = [[NSMutableArray alloc] init];
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}
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return self;
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}
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- (void)dealloc {
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delete _busOperationHandler;
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}
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#pragma mark - Accessors
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- (void)setData:(NSData *)data atAddress:(uint16_t)startAddress {
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_processor->set_data_at_address(startAddress, data.length, (const uint8_t *)data.bytes);
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}
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- (void)runForNumberOfCycles:(int)cycles {
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_processor->run_for(Cycles(cycles));
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}
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- (void)setValue:(uint16_t)value forRegister:(CSTestMachineZ80Register)reg {
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_processor->set_value_of_register(registerForRegister(reg), value);
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}
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- (void)setValue:(uint8_t)value atAddress:(uint16_t)address {
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_processor->set_data_at_address(address, 1, &value);
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}
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- (uint8_t)valueAtAddress:(uint16_t)address {
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uint8_t value;
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_processor->get_data_at_address(address, 1, &value);
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return value;
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}
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- (uint16_t)valueForRegister:(CSTestMachineZ80Register)reg {
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return _processor->get_value_of_register(registerForRegister(reg));
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}
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- (BOOL)isHalted {
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return _processor->get_halt_line() ? YES : NO;
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}
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- (int)completedCycles {
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return _processor->get_timestamp();
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}
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- (void)setNmiLine:(BOOL)nmiLine {
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_nmiLine = nmiLine;
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_processor->set_non_maskable_interrupt_line(nmiLine ? true : false);
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}
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- (void)setIrqLine:(BOOL)irqLine {
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_irqLine = irqLine;
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_processor->set_interrupt_line(irqLine ? true : false);
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}
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- (void)setWaitLine:(BOOL)waitLine {
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_waitLine = waitLine;
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_processor->set_wait_line(waitLine ? true : false);
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}
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- (CPU::AllRAMProcessor *)processor {
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return _processor;
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}
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#pragma mark - Bus operation accumulation
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- (void)setCaptureBusActivity:(BOOL)captureBusActivity {
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_captureBusActivity = captureBusActivity;
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_processor->set_memory_access_delegate(captureBusActivity ? _busOperationHandler : nullptr);
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}
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- (void)testMachineDidPerformBusOperation:(CPU::Z80::PartialMachineCycle::Operation)operation address:(uint16_t)address value:(uint8_t)value timeStamp:(int)timeStamp {
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if(self.captureBusActivity) {
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CSTestMachineZ80BusOperationCapture *capture = [[CSTestMachineZ80BusOperationCapture alloc] init];
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switch(operation) {
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case CPU::Z80::PartialMachineCycle::Write:
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capture.operation = CSTestMachineZ80BusOperationCaptureOperationWrite;
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break;
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case CPU::Z80::PartialMachineCycle::Read:
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capture.operation = CSTestMachineZ80BusOperationCaptureOperationRead;
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break;
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case CPU::Z80::PartialMachineCycle::Refresh:
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capture.operation = CSTestMachineZ80BusOperationCaptureOperationReadOpcode;
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break;
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case CPU::Z80::PartialMachineCycle::Input:
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capture.operation = CSTestMachineZ80BusOperationCaptureOperationPortRead;
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break;
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case CPU::Z80::PartialMachineCycle::Output:
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capture.operation = CSTestMachineZ80BusOperationCaptureOperationPortWrite;
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break;
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case CPU::Z80::PartialMachineCycle::Internal:
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capture.operation = CSTestMachineZ80BusOperationCaptureOperationInternalOperation;
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break;
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default: return;
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}
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capture.address = address;
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capture.value = value;
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capture.timeStamp = timeStamp;
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[_busOperationCaptures addObject:capture];
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}
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}
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- (NSArray<CSTestMachineZ80BusOperationCapture *> *)busOperationCaptures {
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return [_busOperationCaptures copy];
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}
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@end
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