Thomas Harte ebc7356db5 Reformulated the machine cycle slightly to support posting operation plus phase, thereby exposing the segue points at which waits might be inserted. So: to stick to the rule that CPUs expose the minimum amount of information sufficient completely to reconstruct bus activity. This breaks the Z80 for now.		2017-06-18 12:21:27 -04:00
..
6502	Eliminated the function call inherent to every decode, and also moved the fixed table of operations into a non-templated base class.	2017-06-03 22:19:35 -04:00
Z80	Reformulated the machine cycle slightly to support posting operation plus phase, thereby exposing the segue points at which waits might be inserted. So: to stick to the rule that CPUs expose the minimum amount of information sufficient completely to reconstruct bus activity. This breaks the Z80 for now.	2017-06-18 12:21:27 -04:00
AllRAMProcessor.cpp	Eliminates the 6502's specialised jam handler in favour of the generic trap handler, and simplifies the lookup costs of that as it's otherwise doubling execution costs.	2017-06-03 21:54:42 -04:00
AllRAMProcessor.hpp	Eliminates the 6502's specialised jam handler in favour of the generic trap handler, and simplifies the lookup costs of that as it's otherwise doubling execution costs.	2017-06-03 21:54:42 -04:00
RegisterSizes.hpp	Noodled around with initial state.	2017-05-29 19:25:08 -04:00