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AllSuiteA
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Atari ROMs
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Added a readme, as is traditional for folders I'm excluding from Git.
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2017-03-12 22:16:12 -04:00 |
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BCDTest
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Bridges
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Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable.
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2017-08-21 21:56:42 -04:00 |
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FUSE
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After hitting my head against the wall of trying to use [NS]Scanner as a parser some more, have given up and transcoded the two tests files to JSON.
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2017-05-25 18:20:13 -04:00 |
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Klaus Dormann
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Wolfgang Lorenz 6502 test suite
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Zexall
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Imported the Zexall.com tester, as a first thing to throw at the Z80 to be.
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2017-05-16 21:37:09 -04:00 |
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6502InterruptTests.swift
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Renamed TestMachine to TestMachine6502 since there's going to be multiple of them.
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2017-05-15 08:18:57 -04:00 |
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6502TimingTests.swift
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Corrected timestamp return, and its testing by the 6502 timing tests.
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2017-07-27 21:19:16 -04:00 |
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6522Tests.swift
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6532Tests.swift
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Tested against public ROMs and corrected. Also moved the deferred adjustment into a more canonical place.
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2017-03-04 17:00:28 -05:00 |
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AllSuiteATests.swift
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Adjusted slightly to adapt to latest Swift warnings.
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2017-05-17 07:49:48 -04:00 |
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ArrayBuilderTests.mm
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AtariStaticAnalyserTests.mm
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Added an attempt to distinguish the MegaBoy (now with proper capitalisation) and a test for it.
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2017-03-13 20:43:12 -04:00 |
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BCDTest.swift
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Completed fixture of the 6502 BCD test.
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2017-07-25 22:55:45 -04:00 |
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C1540Tests.swift
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CRCTests.mm
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Made steps towards proper CRC generation. Am currently comparing against Oric disk images, as — amongst other things — they include precomputed CRCs.
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2016-12-28 18:29:37 -05:00 |
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DPLLTests.swift
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Fixed the DigitalPhaseLockedLoopBridge bridge, once again fixing tests.
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2017-07-16 20:55:57 -04:00 |
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FUSETests.swift
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Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests.
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2017-07-27 20:17:13 -04:00 |
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Info.plist
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KlausDormannTests.swift
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Adjusted slightly to adapt to latest Swift warnings.
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2017-05-17 07:49:48 -04:00 |
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PCMPatchedTrackTests.mm
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Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable.
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2017-08-21 21:56:42 -04:00 |
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PCMSegmentEventSourceTests.mm
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PCMTrackTests.mm
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Implemented a very basic PCMTrack test, nevertheless revealing an oversight in PCMSegmentEventSource related to improperly counting to the index hole if the final bit is set. Took that as a message that I should comment and document the event source.
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2016-12-18 22:53:24 -05:00 |
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TIATests.mm
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The TIA is now a ClockReceiver.
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2017-07-24 21:48:34 -04:00 |
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TimeTests.mm
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Added saturation test, fixed code as indicated.
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2016-12-24 23:29:37 -05:00 |
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WolfgangLorenzTests.swift
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Eliminates the 6502's specialised jam handler in favour of the generic trap handler, and simplifies the lookup costs of that as it's otherwise doubling execution costs.
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2017-06-03 21:54:42 -04:00 |
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Z80InterruptTests.swift
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Introduced an NMI/wait interrupt timing test, and adjusted the Z80 to conform to information posted by Wilf Rigter.
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2017-06-22 21:09:26 -04:00 |
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Z80MachineCycleTests.swift
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Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests.
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2017-07-27 20:17:13 -04:00 |
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Z80MemptrTests.swift
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Added test for 16-bit arithmetic, and fixed implementation.
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2017-07-26 19:04:52 -04:00 |
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ZexallTests.swift
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Reinstated manual-by-stealth secondary usage of the Zexall test as a benchmarking tool.
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2017-06-04 15:46:35 -04:00 |
