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CLK
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ee71be0e7e
CLK
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Processors
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Z80
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Thomas Harte
ee71be0e7e
Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable.
2017-08-21 21:56:42 -04:00
..
Z80.cpp
Z80.hpp
Allows Z80 users to opt out of support for the bus request line. Which both now do.
2017-08-21 20:43:12 -04:00
Z80AllRAM.cpp
Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable.
2017-08-21 21:56:42 -04:00
Z80AllRAM.hpp
Standardises on
const [Half]Cycles
as the thing called and returned, rather than
const [Half]Cycles &
as it's explicitly defined to be only one
int
in size, so using a reference is overly weighty.
2017-07-27 22:05:29 -04:00