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558 lines
14 KiB
Plaintext
558 lines
14 KiB
Plaintext
//
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// 68000ControlFlowTests.m
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// Clock SignalTests
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//
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// Created by Thomas Harte on 28/06/2019.
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//
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// Largely ported from the tests of the Portable 68k Emulator.
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//
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#import <XCTest/XCTest.h>
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#include "TestRunner68000.hpp"
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@interface M68000ControlFlowTests : XCTestCase
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@end
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@implementation M68000ControlFlowTests {
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std::unique_ptr<RAM68000> _machine;
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}
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- (void)setUp {
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_machine.reset(new RAM68000());
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}
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- (void)tearDown {
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_machine.reset();
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}
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// MARK: Bcc
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- (void)performBccb:(uint16_t)opcode {
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_machine->set_program({
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uint16_t(opcode | 6) // Bcc.b +6
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});
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_machine->run_for_instructions(1);
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}
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- (void)performBccw:(uint16_t)opcode {
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_machine->set_program({
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opcode, 0x0006 // Bcc.w +6
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});
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_machine->run_for_instructions(1);
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}
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- (void)testBHIb {
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[self performBccb:0x6200];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.program_counter, 0x1008 + 4);
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XCTAssertEqual(_machine->get_cycle_count(), 10);
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}
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- (void)testBLOb {
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[self performBccb:0x6500];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.program_counter, 0x1002 + 4);
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XCTAssertEqual(_machine->get_cycle_count(), 8);
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}
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- (void)testBHIw {
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[self performBccw:0x6200];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.program_counter, 0x1008 + 4);
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XCTAssertEqual(_machine->get_cycle_count(), 10);
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}
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- (void)testBLOw {
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[self performBccw:0x6500];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.program_counter, 0x1004 + 4);
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XCTAssertEqual(_machine->get_cycle_count(), 12);
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}
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// MARK: BRA
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- (void)testBRAb {
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_machine->set_program({
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0x6004 // BRA.b +4
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});
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.program_counter, 0x1006 + 4);
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XCTAssertEqual(_machine->get_cycle_count(), 10);
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}
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- (void)testBRAw {
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_machine->set_program({
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0x6000, 0x0004 // BRA.b +4
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});
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.program_counter, 0x1006 + 4);
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XCTAssertEqual(_machine->get_cycle_count(), 10);
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}
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// MARK: BSR
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- (void)testBSRw {
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_machine->set_program({
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0x6100, 0x0006 // BSR.w $1008
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});
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_machine->set_initial_stack_pointer(0x3000);
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.program_counter, 0x1008 + 4);
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XCTAssertEqual(state.stack_pointer(), 0x2ffc);
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XCTAssertEqual(state.status & Flag::ConditionCodes, 0);
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XCTAssertEqual(*_machine->ram_at(0x2ffc), 0);
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XCTAssertEqual(*_machine->ram_at(0x2ffe), 0x1004);
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XCTAssertEqual(_machine->get_cycle_count(), 18);
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}
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- (void)testBSRb {
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_machine->set_program({
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0x6106 // BSR.b $1008
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});
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_machine->set_initial_stack_pointer(0x3000);
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.program_counter, 0x1008 + 4);
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XCTAssertEqual(state.stack_pointer(), 0x2ffc);
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XCTAssertEqual(state.status & Flag::ConditionCodes, 0);
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XCTAssertEqual(*_machine->ram_at(0x2ffc), 0);
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XCTAssertEqual(*_machine->ram_at(0x2ffe), 0x1002);
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XCTAssertEqual(_machine->get_cycle_count(), 18);
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}
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// MARK: CHK
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- (void)performCHKd1:(uint32_t)d1 d2:(uint32_t)d2 {
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_machine->set_program({
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0x4581 // CHK D1, D2
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});
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auto state = _machine->get_processor_state();
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state.data[1] = d1;
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state.data[2] = d2;
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state.status |= Flag::ConditionCodes;
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_machine->set_initial_stack_pointer(0);
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_machine->set_processor_state(state);
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_machine->run_for_instructions(1);
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state = _machine->get_processor_state();
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XCTAssertEqual(state.data[1], d1);
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XCTAssertEqual(state.data[2], d2);
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}
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- (void)testCHK_1111v1111 {
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[self performCHKd1:0x1111 d2:0x1111];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.program_counter, 0x1002 + 4);
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XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend);
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XCTAssertEqual(10, _machine->get_cycle_count());
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}
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- (void)testCHK_1111v0000 {
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[self performCHKd1:0x1111 d2:0x0000];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.program_counter, 0x1002 + 4);
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XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Zero);
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XCTAssertEqual(10, _machine->get_cycle_count());
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}
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- (void)testCHK_8000v8001 {
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[self performCHKd1:0x8000 d2:0x8001];
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const auto state = _machine->get_processor_state();
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XCTAssertNotEqual(state.program_counter, 0x1002 + 4);
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XCTAssertEqual(state.stack_pointer(), 0xfffffffa);
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XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend);
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XCTAssertEqual(42, _machine->get_cycle_count());
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}
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- (void)testCHK_8000v8000 {
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[self performCHKd1:0x8000 d2:0x8000];
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const auto state = _machine->get_processor_state();
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XCTAssertNotEqual(state.program_counter, 0x1002 + 4);
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XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Negative);
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XCTAssertEqual(44, _machine->get_cycle_count());
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}
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// MARK: DBcc
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- (void)performDBccTestOpcode:(uint16_t)opcode status:(uint16_t)status d2Outcome:(uint32_t)d2Output {
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_machine->set_program({
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opcode, 0x0008 // DBcc D2, +8
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});
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auto state = _machine->get_processor_state();
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state.status = status;
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state.data[2] = 1;
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_machine->set_processor_state(state);
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_machine->run_for_instructions(1);
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state = _machine->get_processor_state();
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XCTAssertEqual(state.data[2], d2Output);
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XCTAssertEqual(state.status, status);
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}
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- (void)testDBT {
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[self performDBccTestOpcode:0x50ca status:0 d2Outcome:1];
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}
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- (void)testDBF {
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[self performDBccTestOpcode:0x51ca status:0 d2Outcome:0];
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}
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- (void)testDBHI {
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[self performDBccTestOpcode:0x52ca status:0 d2Outcome:1];
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}
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- (void)testDBHI_Carry {
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[self performDBccTestOpcode:0x52ca status:Flag::Carry d2Outcome:0];
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}
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- (void)testDBHI_Zero {
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[self performDBccTestOpcode:0x52ca status:Flag::Zero d2Outcome:0];
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}
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- (void)testDBLS_CarryOverflow {
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[self performDBccTestOpcode:0x53ca status:Flag::Carry | Flag::Overflow d2Outcome:1];
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}
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- (void)testDBLS_Carry {
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[self performDBccTestOpcode:0x53ca status:Flag::Carry d2Outcome:1];
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}
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- (void)testDBLS_Overflow {
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[self performDBccTestOpcode:0x53ca status:Flag::Overflow d2Outcome:0];
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}
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- (void)testDBCC_Carry {
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[self performDBccTestOpcode:0x54ca status:Flag::Carry d2Outcome:0];
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}
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- (void)testDBCC {
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[self performDBccTestOpcode:0x54ca status:0 d2Outcome:1];
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}
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- (void)testDBCS {
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[self performDBccTestOpcode:0x55ca status:0 d2Outcome:0];
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}
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- (void)testDBCS_Carry {
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[self performDBccTestOpcode:0x55ca status:Flag::Carry d2Outcome:1];
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}
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- (void)testDBNE {
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[self performDBccTestOpcode:0x56ca status:0 d2Outcome:1];
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}
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- (void)testDBNE_Zero {
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[self performDBccTestOpcode:0x56ca status:Flag::Zero d2Outcome:0];
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}
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- (void)testDBEQ {
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[self performDBccTestOpcode:0x57ca status:0 d2Outcome:0];
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}
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- (void)testDBEQ_Zero {
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[self performDBccTestOpcode:0x57ca status:Flag::Zero d2Outcome:1];
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}
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- (void)testDBVC {
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[self performDBccTestOpcode:0x58ca status:0 d2Outcome:1];
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}
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- (void)testDBVC_Overflow {
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[self performDBccTestOpcode:0x58ca status:Flag::Overflow d2Outcome:0];
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}
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- (void)testDBVS {
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[self performDBccTestOpcode:0x59ca status:0 d2Outcome:0];
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}
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- (void)testDBVS_Overflow {
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[self performDBccTestOpcode:0x59ca status:Flag::Overflow d2Outcome:1];
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}
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- (void)testDBPL {
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[self performDBccTestOpcode:0x5aca status:0 d2Outcome:1];
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}
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- (void)testDBPL_Negative {
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[self performDBccTestOpcode:0x5aca status:Flag::Negative d2Outcome:0];
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}
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- (void)testDBMI {
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[self performDBccTestOpcode:0x5bca status:0 d2Outcome:0];
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}
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- (void)testDBMI_Negative {
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[self performDBccTestOpcode:0x5bca status:Flag::Negative d2Outcome:1];
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}
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- (void)testDBGE_NegativeOverflow {
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[self performDBccTestOpcode:0x5cca status:Flag::Negative | Flag::Overflow d2Outcome:1];
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}
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- (void)testDBGE {
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[self performDBccTestOpcode:0x5cca status:0 d2Outcome:1];
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}
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- (void)testDBGE_Negative {
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[self performDBccTestOpcode:0x5cca status:Flag::Negative d2Outcome:0];
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}
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- (void)testDBGE_Overflow {
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[self performDBccTestOpcode:0x5cca status:Flag::Overflow d2Outcome:0];
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}
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- (void)testDBLT_NegativeOverflow {
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[self performDBccTestOpcode:0x5dca status:Flag::Negative | Flag::Overflow d2Outcome:0];
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}
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- (void)testDBLT {
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[self performDBccTestOpcode:0x5dca status:0 d2Outcome:0];
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}
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- (void)testDBLT_Negative {
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[self performDBccTestOpcode:0x5dca status:Flag::Negative d2Outcome:1];
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}
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- (void)testDBLT_Overflow {
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[self performDBccTestOpcode:0x5dca status:Flag::Overflow d2Outcome:1];
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}
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- (void)testDBGT {
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[self performDBccTestOpcode:0x5eca status:0 d2Outcome:1];
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}
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- (void)testDBGT_ZeroNegativeOverflow {
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[self performDBccTestOpcode:0x5eca status:Flag::Zero | Flag::Negative | Flag::Overflow d2Outcome:0];
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}
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- (void)testDBGT_NegativeOverflow {
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[self performDBccTestOpcode:0x5eca status:Flag::Negative | Flag::Overflow d2Outcome:1];
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}
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- (void)testDBGT_Zero {
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[self performDBccTestOpcode:0x5eca status:Flag::Zero d2Outcome:0];
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}
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- (void)testDBLE {
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[self performDBccTestOpcode:0x5fca status:0 d2Outcome:0];
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}
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- (void)testDBLE_Zero {
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[self performDBccTestOpcode:0x5fca status:Flag::Zero d2Outcome:1];
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}
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- (void)testDBLE_Negative {
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[self performDBccTestOpcode:0x5fca status:Flag::Negative d2Outcome:1];
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}
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- (void)testDBLE_NegativeOverflow {
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[self performDBccTestOpcode:0x5fca status:Flag::Negative | Flag::Overflow d2Outcome:0];
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}
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/* Further DBF tests omitted; they seemed to be duplicative, assuming I'm not suffering a failure of comprehension. */
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// MARK: JMP
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- (void)testJMP_A1 {
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_machine->set_program({
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0x4ed1 // JMP (A1)
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});
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auto state = _machine->get_processor_state();
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state.address[1] = 0x3000;
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_machine->set_processor_state(state);
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_machine->run_for_instructions(1);
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state = _machine->get_processor_state();
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XCTAssertEqual(state.address[1], 0x3000);
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XCTAssertEqual(state.program_counter, 0x3000 + 4);
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XCTAssertEqual(8, _machine->get_cycle_count());
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}
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- (void)testJMP_PC {
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_machine->set_program({
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0x4efa, 0x000a // JMP PC+a (i.e. to 0x100c)
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});
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.program_counter, 0x100c + 4);
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XCTAssertEqual(10, _machine->get_cycle_count());
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}
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// MARK: JSR
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- (void)testJSR_PC {
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_machine->set_program({
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0x4eba, 0x000a // JSR (+a)PC ; JSR to $100c
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});
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_machine->set_initial_stack_pointer(0x2000);
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.stack_pointer(), 0x1ffc);
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XCTAssertEqual(state.program_counter, 0x100c + 4);
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XCTAssertEqual(*_machine->ram_at(0x1ffc), 0x0000);
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XCTAssertEqual(*_machine->ram_at(0x1ffe), 0x1004);
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XCTAssertEqual(18, _machine->get_cycle_count());
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}
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- (void)testJSR_XXXl {
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_machine->set_program({
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0x4eb9, 0x0000, 0x1008 // JSR ($1008).l
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});
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_machine->set_initial_stack_pointer(0x2000);
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.stack_pointer(), 0x1ffc);
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XCTAssertEqual(state.program_counter, 0x1008 + 4);
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XCTAssertEqual(*_machine->ram_at(0x1ffc), 0x0000);
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XCTAssertEqual(*_machine->ram_at(0x1ffe), 0x1006);
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XCTAssertEqual(20, _machine->get_cycle_count());
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}
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// MARK: NOP
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- (void)testNOP {
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_machine->set_program({
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0x4e71 // NOP
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});
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_machine->run_for_instructions(1);
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XCTAssertEqual(4, _machine->get_cycle_count());
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}
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// MARK: RTR
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- (void)testRTR {
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_machine->set_program({
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0x4e77 // RTR
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});
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_machine->set_initial_stack_pointer(0x2000);
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*_machine->ram_at(0x2000) = 0x7fff;
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*_machine->ram_at(0x2002) = 0;
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*_machine->ram_at(0x2004) = 0xc;
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.stack_pointer(), 0x2006);
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XCTAssertEqual(state.program_counter, 0x10);
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XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::ConditionCodes);
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XCTAssertEqual(20, _machine->get_cycle_count());
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}
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// MARK: RTS
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- (void)testRTS {
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_machine->set_program({
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0x4e75 // RTS
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});
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_machine->set_initial_stack_pointer(0x2000);
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*_machine->ram_at(0x2000) = 0x0000;
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*_machine->ram_at(0x2002) = 0x000c;
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.stack_pointer(), 0x2004);
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XCTAssertEqual(state.program_counter, 0x000c + 4);
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XCTAssertEqual(16, _machine->get_cycle_count());
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}
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// MARK: TRAP
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- (void)testTRAP {
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_machine->set_program({
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0x4e41 // TRAP #1
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});
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auto state = _machine->get_processor_state();
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state.status = 0x700;
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state.user_stack_pointer = 0x200;
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state.supervisor_stack_pointer = 0x206;
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*_machine->ram_at(0x84) = 0xfffe;
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*_machine->ram_at(0xfffe) = 0x4e71;
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|
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_machine->set_processor_state(state);
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_machine->run_for_instructions(1);
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|
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state = _machine->get_processor_state();
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XCTAssertEqual(state.status, 0x2700);
|
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XCTAssertEqual(*_machine->ram_at(0x200), 0x700);
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XCTAssertEqual(*_machine->ram_at(0x202), 0x0000);
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XCTAssertEqual(*_machine->ram_at(0x204), 0x1002);
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XCTAssertEqual(state.supervisor_stack_pointer, 0x200);
|
|
XCTAssertEqual(34, _machine->get_cycle_count());
|
|
}
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|
|
|
// MARK: TRAPV
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|
|
|
- (void)testTRAPV_taken {
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|
_machine->set_program({
|
|
0x4e76 // TRAPV
|
|
});
|
|
_machine->set_initial_stack_pointer(0x206);
|
|
|
|
auto state = _machine->get_processor_state();
|
|
state.status = 0x702;
|
|
state.supervisor_stack_pointer = 0x206;
|
|
*_machine->ram_at(0x1e) = 0xfffe;
|
|
*_machine->ram_at(0xfffe) = 0x4e71;
|
|
|
|
_machine->set_processor_state(state);
|
|
_machine->run_for_instructions(1);
|
|
|
|
state = _machine->get_processor_state();
|
|
XCTAssertEqual(state.status, 0x2702);
|
|
XCTAssertEqual(state.stack_pointer(), 0x200);
|
|
XCTAssertEqual(*_machine->ram_at(0x202), 0x0000);
|
|
XCTAssertEqual(*_machine->ram_at(0x204), 0x1002);
|
|
XCTAssertEqual(*_machine->ram_at(0x200), 0x702);
|
|
XCTAssertEqual(34, _machine->get_cycle_count());
|
|
}
|
|
|
|
- (void)testTRAPV_untaken {
|
|
_machine->set_program({
|
|
0x4e76 // TRAPV
|
|
});
|
|
|
|
_machine->run_for_instructions(1);
|
|
|
|
const auto state = _machine->get_processor_state();
|
|
XCTAssertEqual(state.program_counter, 0x1002 + 4);
|
|
XCTAssertEqual(4, _machine->get_cycle_count());
|
|
}
|
|
|
|
@end
|