1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-12-02 02:49:28 +00:00
CLK/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-0.CSL
2024-06-28 21:52:04 -04:00

96 lines
1.7 KiB
XML

;
; Fichier de script CSL
; Execution du module SHAKE26C du DSK SHAKER26.DSK en CRTC 0
; Le module genere des instructions au format SSM
;
csl_version 1.0
crtc_select 0
reset
wait 3000000
disk_insert 'shaker26.dsk'
key_delay 70000 70000 400000
key_output 'RUN"SHAKE26C"\(RET)'
wait 10000000
;
; test 5 Parity Check Select CRTC 0, 2
key_output '5'
wait 10000000
key_output ' '
wait 1000000 ; menu
; test prevu pour CRTC 2 mais disp autre crc Last Line cond
key_output '7'
wait 64000000
key_output ' '
wait 1000000 ; menu
; test crtc 2 vma' sur R1=0
key_output 'T'
wait 1100000
key_output ' '
wait 1200000
key_output ' '
wait 1200000
key_output ' '
wait 1200000
key_output ' '
wait 1000000 ; menu
; crtc 2 ghost vsync vs Last Line (others crtc welcome)
key_output '\(RET)'
wait 5000000
key_output ' '
wait 2000000
key_output ' '
wait 1000000 ; menu
; Add Line R5 on last line
key_output 'E'
wait 10000000
key_output ' '
wait 5000000
key_output ' '
wait 1000000 ; menu
; Add line R8
key_output 'P'
wait 12000000
key_output ' '
wait 1000000 ; menu
; r5 additional line in interlace mode
key_output 'S'
wait 2000000
key_output ' '
wait 1000000 ; menu
; CRTC 0,3,4 Interlace vsync nightmare (2 1er test uniqu CRTC1)
key_output 'O'
wait 4000000
key_output ' '
wait 6000000
key_output ' '
wait 1000000
wait 8000000
key_output ' '
wait 9000000
key_output ' '
wait 9000000
key_output ' '
wait 10000000
key_output ' '
wait 9000000
key_output ' '
wait 10000000
key_output ' '
wait 10000000
key_output ' '
wait 1000000 ; menu
; R9/R4 UPD LAST LIMIT
key_output 'R'
wait 5000000
key_output ' '
wait 10000000 ; menu
csl_load 'SHAKE26C-1'