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191 lines
5.5 KiB
C++
191 lines
5.5 KiB
C++
//
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// 6532.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 19/06/2016.
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// Copyright 2016 Thomas Harte. All rights reserved.
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//
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#ifndef _532_hpp
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#define _532_hpp
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#include <cstdint>
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#include <cstdio>
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#include "../../ClockReceiver/ClockReceiver.hpp"
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namespace MOS {
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/*!
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Implements a template for emulation of the MOS 6532 RAM-I/O-Timer ('RIOT').
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The RIOT provides:
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* 128 bytes of static RAM;
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* an interval timer; and
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* two digital input/output ports.
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Consumers should derive their own curiously-recurring-template-pattern subclass,
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implementing bus communications as required.
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*/
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template <class T> class MOS6532 {
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public:
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inline void set_ram(uint16_t address, uint8_t value) { ram_[address&0x7f] = value; }
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inline uint8_t get_ram(uint16_t address) { return ram_[address & 0x7f]; }
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inline void set_register(int address, uint8_t value) {
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const uint8_t decodedAddress = address & 0x07;
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switch(decodedAddress) {
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// Port output
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case 0x00: case 0x02:
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port_[decodedAddress / 2].output = value;
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static_cast<T *>(this)->set_port_output(decodedAddress / 2, port_[decodedAddress/2].output, port_[decodedAddress / 2].output_mask);
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set_port_did_change(decodedAddress / 2);
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break;
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case 0x01: case 0x03:
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port_[decodedAddress / 2].output_mask = value;
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static_cast<T *>(this)->set_port_output(decodedAddress / 2, port_[decodedAddress/2].output, port_[decodedAddress / 2].output_mask);
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set_port_did_change(decodedAddress / 2);
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break;
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// The timer and edge detect control
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case 0x04: case 0x05: case 0x06: case 0x07:
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if(address & 0x10) {
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timer_.writtenShift = timer_.activeShift = (decodedAddress - 0x04) * 3 + (decodedAddress / 0x07); // i.e. 0, 3, 6, 10
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timer_.value = (static_cast<unsigned int>(value) << timer_.activeShift) ;
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timer_.interrupt_enabled = !!(address&0x08);
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interrupt_status_ &= ~InterruptFlag::Timer;
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evaluate_interrupts();
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} else {
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a7_interrupt_.enabled = !!(address&0x2);
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a7_interrupt_.active_on_positive = !!(address & 0x01);
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}
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break;
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}
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}
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inline uint8_t get_register(int address) {
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const uint8_t decodedAddress = address & 0x7;
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switch(decodedAddress) {
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// Port input
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case 0x00: case 0x02: {
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const int port = decodedAddress / 2;
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uint8_t input = static_cast<T *>(this)->get_port_input(port);
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return (input & ~port_[port].output_mask) | (port_[port].output & port_[port].output_mask);
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}
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break;
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case 0x01: case 0x03:
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return port_[decodedAddress / 2].output_mask;
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break;
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// Timer and interrupt control
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case 0x04: case 0x06: {
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uint8_t value = static_cast<uint8_t>(timer_.value >> timer_.activeShift);
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timer_.interrupt_enabled = !!(address&0x08);
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interrupt_status_ &= ~InterruptFlag::Timer;
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evaluate_interrupts();
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if(timer_.activeShift != timer_.writtenShift) {
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unsigned int shift = timer_.writtenShift - timer_.activeShift;
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timer_.value = (timer_.value << shift) | ((1 << shift) - 1);
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timer_.activeShift = timer_.writtenShift;
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}
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return value;
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}
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break;
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case 0x05: case 0x07: {
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uint8_t value = interrupt_status_;
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interrupt_status_ &= ~InterruptFlag::PA7;
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evaluate_interrupts();
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return value;
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}
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break;
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}
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return 0xff;
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}
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inline void run_for(const Cycles cycles) {
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unsigned int number_of_cycles = static_cast<unsigned int>(cycles.as_int());
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// permit counting _to_ zero; counting _through_ zero initiates the other behaviour
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if(timer_.value >= number_of_cycles) {
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timer_.value -= number_of_cycles;
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} else {
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number_of_cycles -= timer_.value;
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timer_.value = (0x100 - number_of_cycles) & 0xff;
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timer_.activeShift = 0;
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interrupt_status_ |= InterruptFlag::Timer;
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evaluate_interrupts();
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}
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}
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MOS6532() {
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timer_.value = static_cast<unsigned int>((rand() & 0xff) << 10);
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}
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inline void set_port_did_change(int port) {
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if(!port) {
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uint8_t new_port_a_value = (get_port_input(0) & ~port_[0].output_mask) | (port_[0].output & port_[0].output_mask);
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uint8_t difference = new_port_a_value ^ a7_interrupt_.last_port_value;
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a7_interrupt_.last_port_value = new_port_a_value;
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if(difference&0x80) {
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if(
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((new_port_a_value&0x80) && a7_interrupt_.active_on_positive) ||
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(!(new_port_a_value&0x80) && !a7_interrupt_.active_on_positive)
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) {
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interrupt_status_ |= InterruptFlag::PA7;
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evaluate_interrupts();
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}
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}
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}
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}
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inline bool get_inerrupt_line() {
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return interrupt_line_;
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}
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private:
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uint8_t ram_[128];
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struct {
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unsigned int value;
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unsigned int activeShift = 10, writtenShift = 10;
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bool interrupt_enabled = false;
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} timer_;
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struct {
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bool enabled = false;
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bool active_on_positive = false;
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uint8_t last_port_value = 0;
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} a7_interrupt_;
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struct {
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uint8_t output_mask = 0, output = 0;
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} port_[2];
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uint8_t interrupt_status_ = 0;
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enum InterruptFlag: uint8_t {
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Timer = 0x80,
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PA7 = 0x40
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};
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bool interrupt_line_ = false;
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// expected to be overridden
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uint8_t get_port_input(int port) { return 0xff; }
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void set_port_output(int port, uint8_t value, uint8_t output_mask) {}
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void set_irq_line(bool new_value) {}
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inline void evaluate_interrupts() {
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interrupt_line_ =
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((interrupt_status_&InterruptFlag::Timer) && timer_.interrupt_enabled) ||
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((interrupt_status_&InterruptFlag::PA7) && a7_interrupt_.enabled);
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set_irq_line(interrupt_line_);
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}
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};
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}
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#endif /* _532_hpp */
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