From 3163a1ea9155be4e12f0e11e97dd48a038c8fe4a Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Tue, 15 Jun 2021 11:34:57 -0400 Subject: [PATCH] Initial version: what I know so far. --- The-Enterprise.md | 50 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 The-Enterprise.md diff --git a/The-Enterprise.md b/The-Enterprise.md new file mode 100644 index 0000000..30064b5 --- /dev/null +++ b/The-Enterprise.md @@ -0,0 +1,50 @@ +The Enterprise is a late-generation Z80-based computer with custom audio and video chips. + +## Nick + +Nick is the Enterprise's video chip, offering text and pixel modes at up to 8 bits per pixel output; it uses a line parameter table potentially to obtain a unique mode and palette for every line of the display. Unusually for a computer of the period, it runs asynchronously from the processor. + +### Line Timings + +Nick provides 57 slots per line, each slot being 16 cycles wide, for a total of 912 cycles/line. In its highest resolution mode it can output one pixel per cycle. + +It is stated to be 'phaselocked' with the PAL colour subcarrier on PAL machines; taking that to mean that 912 cycles equates to a slightly-overlong line of exactly 284 colour cycles: + +1. each line should last 284*64/283.7516 µs = 45440000/709379 µs ≈ 64.06µs; +2. therefore there are 1000000 / (45440000/709379) = 709379000000/45440000 = 17734475/1136 ≈ 15611.33 lines/second; +3. which implies an ideal clock rate of 912*17734475/1136 = 1010865075/71 Hz ≈ 14,237,536.27 Hz. + +That gives (1010865075/71) / 4000000 = 1010865075/284000000 = 40434603/11360000 ≈ 3.56 Nick cycles for every Z80 cycle. + +### Z80 Access + +Nick marshals 64kb of memory; if the Z80 wants to access that 64kb or to access one of Nick's registers then it must wait for an access window. + +Each 16-cycle Nick slot is divided as: + +* five cycles for a first VRAM read; +* five cycles for a second VRAM read; and +* six cycles for a Z80 access. + +The Z80's clock will be paused in order to align its access with the available window; the clock can be held only in multiples of a half cycle. + +Since six Nick cycles are around 1.69 Z80 cycles, meaning that in the first case just less than 1.19 Z80 cycles will be available after waiting for a half-cycle to begin, I assume this means that the final cycle of any affected Z80 bus cycle is held until the first half-cycle that is wholly inside an access window. + +## Dave + +Dave is the Enterprise's audio and IO chip, providing three tone channels and one noise, along with high-pass filtering and ring modulation. It is also responsible for interrupt status, and manipulations of the memory map. + +### Memory Map + +Dave uses a four-entry table to map the top 2 bits of the Z80's 16-bit address bus to 8 bits, producing a total address space of 22 bits, i.e. 4 megabytes, pageable in 16kb chunks. + +Specifically it provides four read/write registers at ports B0–B3, representing the 16kb region to map in the Z80's [0000, 3FFF], [4000, 7FFF], [8000, BFFF] and [C000, FFFF] regions. + +The unexpanded 64kb machine divides this up as: + +* Banks 0 and 1: the built-in EXOS ROM; and +* Banks FC–FF: the 64kb of RAM shared with Nick. + +The 128kb machine adds a further four banks of RAM at F8–FB; further expansion RAM usually populates the 4mb address space downward from there. + +At reset all four paging registers are cleared to 0, making the first 16kb of the EXOS ROM visible in all four segments of the Z80's addressing space. \ No newline at end of file