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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-24 10:31:15 +00:00

Minor copy fixes; no new substance.

Thomas Harte 2024-01-23 10:29:33 -05:00
parent 3d271f785a
commit 36b9d020a2

@ -3,11 +3,11 @@ The Mockingboards are a series of audio expansions for the Apple II, the most co
## AY-3-8910s
Each AY is connected to its 6522:
* the 6522 port A connected to the AY's data pins;
* bit 0 of the 6522's port B connected to the AY's BC1;
* bit 1 of the 6522's port B connected to the AY's BCDIR;
* BC2 connected to +5v; and
* bit 2 of the 6522's port B connected to the AY's reset.
* port A is connected to the AY's data pins;
* bit 0 of port B is connected to the AY's BC1;
* bit 1 of port B is connected to the AY's BCDIR;
* BC2 is connected to +5v; and
* bit 2 of port B is connected to the AY's reset.
The three channels from each AY are mixed together with equal volume.
@ -15,7 +15,7 @@ The three channels from each AY are mixed together with equal volume.
The 6522s are exposed to the processor's bus:
* the four register select lines are connected to address lines 0 to 3; and
* the reset and data lines connected as expected.
* the reset and data lines connect as expected.
The 6522 for the left channel:
* is selected when address line 7 is low; and
@ -27,16 +27,15 @@ The 6522 for the right channel:
Both also require the board's IOSEL to be active — they appear only in the ordinary IO area for their board.
## SSI-263s
The SSI-263s are more directly connected to the processor's bus.
Both SSIs:
* are connected directly to the processor's data bus;
* have their three register select lines connected to the low three bits of the address bus;
* connect their data bus directly to the processor's data bus;
* connect their three register select lines to the low three bits of the address bus;
* use IOSELECT as a prerequisite for chip selection; and
* have their A/R output (i.e. the signal that "may be used as an interrupt request for new phoneme data") connected to the corresponding 6522's CA1.
* connect their A/R output (i.e. the signal that "may be used as an interrupt request for new phoneme data") to the corresponding 6522's CA1.
The left channel SSI-263:
* is selected when A5 is high.
@ -46,4 +45,4 @@ The right channel SSI-263:
## Clock Rate
All chips are clocked according to the Apple card's phase 1 clock input. So they are clocked at the same rate as the CPU.
All chips are clocked according to the Apple card's phase 1 clock input. So they are clocked at the same rate as the CPU.