6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-02-19 07:31:15 +00:00
Code Issues Projects Releases Wiki Activity

Added description of RDC8ROM.

Thomas Harte 2018-07-31 09:55:27 -04:00
parent cfce5c10df
commit aaac55b703
1 changed files with 10 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
Apple-IIe-Memory-Paging.md

@ -1,4 +1,4 @@
Apple provides multiple overlapping paging mechanisms which in total divide an Apple IIe's address space up into 12 distinct segments.
Apple provides multiple overlapping paging mechanisms which in total divide an Apple IIe's address space up into thirteen distinct segments.
# Segments
## [0000, 0200)
@ -6,6 +6,7 @@ Reading and writing: contains auxiliary RAM if `ALTZP` is set. Contains base RAM
## [0300, 0400); [0800, 2000); [4000, C000)
Reading: contains base RAM if `RAMRD` is reset; contains auxiliary RAM otherwise.
Writing: as per reading, but regarding `RAMWRT` rather than `RAMRD`.
## [0400, 0800)
@ -21,11 +22,16 @@ Writing: as per reading, but regarding `RAMWRT` rather than `RAMRD`.
## [C000, C100)
Never mapped to RAM. Always contains the internal and card IO.
## [C100, C300); [C400, D000)
## [C100, C300); [C400, C800)
Contains ROM if `RDCXROM` is set. Otherwise is unmapped, allowing cards to respond.
## [C300, C400)
Contains ROM if `RDCXROM` is set or `INTC3ROM` is reset. Otherwise is unmapped, allowing card 3 to respond.
Contains ROM if `RDCXROM` is set or `SLOTC3ROM` is reset. Otherwise is unmapped, allowing card 3 to respond.
## [C800, D000)
Contains ROM if `RDCXROM` or `RDC8ROM` is set. Otherwise is unmapped, allowing cards to respond.
`RDC8ROM` is documented only implicitly; it is set by any access within the C3 page while `SLOTC3ROM` is reset. It is reset by an access to `CFFF`, or by system reset.
## [D000, E000)
Reading: contains ROM if the language card `read` flip flop is *disabled*. Contains base RAM if the flip flop is enabled and `ALTZP` is reset. Otherwise contains auxiliary RAM.
@ -46,7 +52,7 @@ This selects which of two 4kb segments will appear in the region [D000, E000); i
## Read [enable]
This selects whether RAM or ROM will be read in the language card area. When it is **enabled**, RAM is read.
Any `(address%4)` equal to `0` or `3` enables RAM. `(address%4)` equal to `1` or `2` enables ROM.
Any access with address line 0 = address line 1 enables RAM. Accesses where the two address lines are not equal enable ROM.
## Write [disable]
This selects whether RAM will be written to by writes to the language card area. When it is **disabled**, RAM can be written to. So it acts like a write-protect switch.