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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-21 21:33:54 +00:00

Added some content on the language-card switches.

Thomas Harte 2018-07-30 16:14:06 -04:00
parent fe509bfab2
commit ae55b2f2a4

@ -1,37 +1,61 @@
Apple provides multiple overlapping paging mechanisms which in total divide an Apple IIe's address space up into 12 distinct segments. Those are: Apple provides multiple overlapping paging mechanisms which in total divide an Apple IIe's address space up into 12 distinct segments.
# 00000200 # Segments
## [0000, 0200)
Reading and writing: contains auxiliary RAM if `ALTZP` is set. Contains base RAM otherwise. Reading and writing: contains auxiliary RAM if `ALTZP` is set. Contains base RAM otherwise.
# 03000400; 08001000; 2000C000 ## [0300, 0400); [0800, 1000); [2000, C000)
Reading: contains base RAM if `RAMRD` is reset; contains auxiliary RAM otherwise. Reading: contains base RAM if `RAMRD` is reset; contains auxiliary RAM otherwise.
Writing: as per reading, but regarding `RAMWRT` rather than `RAMRD`. Writing: as per reading, but regarding `RAMWRT` rather than `RAMRD`.
# 04000800 ## [0400, 0800)
Reading: contains auxiliary RAM if either (i) both `80STORE` and `PAGE2` are set; or (ii) `80STORE` is reset and `RAMRD` is set. Contains base RAM otherwise. Reading: contains auxiliary RAM if either (i) both `80STORE` and `PAGE2` are set; or (ii) `80STORE` is reset and `RAMRD` is set. Contains base RAM otherwise.
Writing: as per reading, but regarding `RAMWRT` rather than `RAMRD`. Writing: as per reading, but regarding `RAMWRT` rather than `RAMRD`.
# 10002000 ## [1000, 2000)
Reading: contains auxiliary RAM if either (i) `80STORE` and `PAGE2` are set, and `TEXT` is reset; or (ii) `80STORE` is reset and `RAMRD` is set. Contains base RAM otherwise. Reading: contains auxiliary RAM if either (i) `80STORE` and `PAGE2` are set, and `TEXT` is reset; or (ii) `80STORE` is reset and `RAMRD` is set. Contains base RAM otherwise.
Writing: as per reading, but regarding `RAMWRT` rather than `RAMRD`. Writing: as per reading, but regarding `RAMWRT` rather than `RAMRD`.
# C000C100 ## [C000, C100)
Never mapped to RAM. Always contains the internal and card IO. Never mapped to RAM. Always contains the internal and card IO.
# C100C300; C400D000 ## [C100, C300); [C400, D000)
Contains ROM if `RDCXROM` is set. Otherwise is unmapped, allowing cards to respond. Contains ROM if `RDCXROM` is set. Otherwise is unmapped, allowing cards to respond.
# C300C400 ## [C300, C400)
Contains ROM if `RDCXROM` is set or `INTC3ROM` is reset. Otherwise is unmapped, allowing card 3 to respond. Contains ROM if `RDCXROM` is set or `INTC3ROM` is reset. Otherwise is unmapped, allowing card 3 to respond.
# D000E000 ## [D000, E000)
Reading: contains ROM if the language card `read` flip flop is *disabled*. Contains base RAM if the flip flop is enabled and `ALTZP` is reset. Otherwise contains auxiliary RAM. Reading: contains ROM if the language card `read` flip flop is *disabled*. Contains base RAM if the flip flop is enabled and `ALTZP` is reset. Otherwise contains auxiliary RAM.
Writing: empty if the language card `write` flip flop is *enabled*. Contains base RAM if the flip flop is disabled and `ALTZP` is reset. Otherwise contains auxiliary RAM. Writing: empty if the language card `write` flip flop is *enabled*. Contains base RAM if the flip flop is disabled and `ALTZP` is reset. Otherwise contains auxiliary RAM.
The portion of RAM accessed depends upon the language card's `BANK2` flip flop. The portion of RAM accessed depends upon the language card's `BANK2` flip flop.
# E000— ## [E000, FFFF]
As per D000—E000 except that `BANK2` does not affect the portion of RAM exposed. As per D000—E000 except that `BANK2` does not affect the portion of RAM exposed.
# Language Card Control
The language card contains four flip flops: `BANK2`, `read`, `write` and `prewrite`.
## BANK2
This selects which of two 4kb segments will appear in the region [D000, E000); it is set directly by address line 3 upon any access of the language-card switches.
## Read [enable]
This selects whether RAM or ROM will be read in the language card area. When it is **enabled**, RAM is read.
Any `(address%4)` equal to `0` or `3` enables RAM. `(address%4)` equal to `1` or `2` enables ROM.
## Write [disable]
This selects whether RAM will be written to by writes to the language card area. When it is **disabled**, RAM can be written to. So it acts like a write-protect switch.
It is **reset** if: (i) pre-write is set; and (ii) a read occurs to an odd address.
It is **set** if: a read occurs to an even address.
Otherwise it does not change value.
## Pre-write
This switch affects the write flip flop; it is set to the value of address line 1 upon any access of the language-card switches, after any change to write has occurred.