1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-24 10:31:15 +00:00

Added mention of ZX81 ROM size.

Thomas Harte 2017-06-14 14:48:24 -04:00
parent 1195b97b68
commit c33f8e2f1a

@ -6,6 +6,8 @@ The Z80 is clocked at 3.25Mhz and its display is generated programmatically.
The ZX80 has a 4kb ROM. That ROM is mapped from address 0x0000. It has 1kb RAM which appears at 0x4000. The RAM is mirrored to 0x8000.
The ZX81 has an 8kb ROM, which also is mapped from address 0x0000. The ZX81 ROM is intentionally also compatible with the ZX80, but the ZX80 ROM will fail 50% of the time when used in a ZX81 as whether the NMI generator (see below) is enabled at startup is undefined.
# Video Generation on the ZX80
Programmatic sync is used for vertical synchronisation. Reading from any port which had an address with the low bit clear causes the synchronisation signal to begin. Writing to any port causes it to end.