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Add bit plane fetch orders.

Thomas Harte 2021-07-28 09:18:35 -04:00
parent 8217755d52
commit eddd6301d3
1 changed files with 29 additions and 5 deletions
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Amiga-Graphics:-Fragments-of-Facts.md

@ -1,9 +1,9 @@
Relative to the internal counters: Relative to the internal counters:
* NTSC: 262 lines, or 262/263 in interlaced mode; lines are alternately 227 and 228 cycles long; * NTSC: 262 lines, or 262/263 in interlaced mode; lines are alternately 227 and 228 slots long;
* PAL: 312 lines, or 312/313 in interlaced mode; lines are 227 cycles long. * PAL: 312 lines, or 312/313 in interlaced mode; lines are 227 slots long.
Each cycle being two processor clock ticks, or one NTSC-rate colour cycle — i.e. one chip RAM access window. Each 'slot' being two processor clock ticks, or one NTSC-rate colour cycle — i.e. one chip RAM access window.
Fixed slot per-line cycle access breakdown: Fixed slot per-line cycle access breakdown:
@ -18,9 +18,33 @@ Bitmap data fetch start time is programmable but may not begin earlier than slot
## DMA Priority ## DMA Priority
1. Bitplane fetching 1. Bitplane fetching (or disk/sprite/refresh, per line region)
2. Copper 2. Copper
3. Blitter 3. Blitter
4. CPU 4. CPU
The Blitter will yield every fourth slot if BLTPRI in DMACON is clear. The Blitter will yield every fourth slot if BLTPRI in DMACON is clear.
## Bitplane Fetches
### Low-resolution
An eight-slot fetch pattern is followed:
1. [unused]
2. bit plane 4
3. bit plane 6
4. bit plane 2
5. [unused]
6. bit plane 3
7. bit plane 5
8. bit plane 1
### High-resolution
Four-slot fetch pattern:
1. bit plane 4
2. bit plane 2
3. bit plane 3
4. bit plane 1