2018-08-07 02:14:36 +00:00
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#ifndef __COMMON_H
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#define __COMMON_H
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2018-08-07 13:30:11 +00:00
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; Using four byte quantities aabbccdd with sign bit, overflow bit, 20 bits significand, 10 bits
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; fraction. The quantity is valid if the overflow bit agrees with the sign bit. The intent is
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2018-08-07 10:38:40 +00:00
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; to be able to recognize an overflow/underflow situation, rescale the arguments, and repeat the
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; calculation.
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2018-08-07 02:14:36 +00:00
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2018-09-01 14:40:57 +00:00
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; Largest value: $3fffffff or +1048575.999(5)
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; Plus one: $00000400
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; Zero: $00000000
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2018-09-12 00:40:28 +00:00
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; Minus one: $fffffc00
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2018-09-01 14:40:57 +00:00
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; Smallest value: $c0000000 or -1048576.000(0)
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2018-08-07 02:14:36 +00:00
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; Instructions
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; SET r aabbcc.dd 1r dd cc bb aa Rr <- aabbccdd - set register
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2018-09-08 10:41:37 +00:00
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; LDD r xxyy 2r yy xx Rr <- (xxyy) - load register directly from address
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; SVD r xxyy 3r yy xx (xxyy) <- Rr - save register directly to address
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; PSH r 4r RS <- Rr - push onto stack
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; POP r 5r Rr <- RS - pop from stack
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; EXC r 6r Rr <-> RS - exchange Rr with stack
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; INR r 7r Rr <- Rr + 1.0 - increment register
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; DCR r 8r Rr <- Rr - 1.0 - decrement register
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2018-09-01 14:40:57 +00:00
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; TST r 9r F <- Rr <=> 0.0 - test register
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2018-08-07 02:14:36 +00:00
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; ADD r pq ar pq Rr <- Rp + Rq - addition
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; SUB r pq br pq Rr <- Rp - Rq - subtraction
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; MUL r pq cr pq Rr <- Rp * Rq - multiplication
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; DIV r pq dr pq Rr <- Rp / Rq - division
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; MOD r pq er pq Rr <- Rp % Rq - modulus
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; EXT z ... fz ... - system and user defined functions
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; ESC 00 - escape back into regular assembler
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; RTN 01 - return from subroutine
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; BRS xxyy 02 yy xx PC <- PC + xxyy - branch to subroutine
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; BRA xxyy 03 yy xx PC <- PC + xxyy - branch always
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; BRE xxyy 04 yy xx PC <- PC + xxyy - branch if Rp = Rq (after CMR)
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; BRG xxyy 05 yy xx PC <- PC + xxyy - branch if Rp > Rq (after CMR)
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; BRL xxyy 06 yy xx PC <- PC + xxyy - branch if Rp < Rq (after CMR)
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; BRZ xxyy 07 yy xx PC <- PC + xxyy - branch if Rr = 0.0 (after TST)
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; BRP xxyy 08 yy xx PC <- PC + xxyy - branch if Rr > 0.0 (after TST)
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; BRN xxyy 09 yy xx PC <- PC + xxyy - branch if Rr < 0.0 (after TST)
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; BRO xxyy 0a yy xx PC <- PC + xxyy - branch if overflow (after arithmetic operations)
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; BRU xxyy 0b yy xx PC <- PC + xxyy - branch if underflow (after arithmetic operations)
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; CPR pq 0c pq Rp <- Rq - copy register
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2019-03-30 13:31:51 +00:00
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; LDI pq 0d pq Rp <- (int(Rq)) - load indirect via allocated memory offset
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; SVI pq 0e pq (int(Rp)) <- Rq - save indirect via allocated memory offset
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2018-08-07 02:14:36 +00:00
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; CMR pq 0f pq F <- Rp <=> Rq - compare registers
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2018-08-21 13:14:16 +00:00
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; 40 bytes in page zero for common registers
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2018-10-30 07:38:42 +00:00
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_R0 = $100 - 4 * (10 + 10)
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2018-08-07 02:14:36 +00:00
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_R1 = _R0 + 4
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_R2 = _R1 + 4
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_R3 = _R2 + 4
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_R4 = _R3 + 4
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_R5 = _R4 + 4
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_R6 = _R5 + 4
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_R7 = _R6 + 4
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_R8 = _R7 + 4
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_R9 = _R8 + 4
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2018-10-30 07:38:42 +00:00
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; 40 bytes in page zero for internal registers
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2018-10-05 01:03:55 +00:00
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_I0 = _R9 + 4 ; workspace
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2018-08-21 13:14:16 +00:00
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_I1 = _I0 + 4
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_I2 = _I1 + 4
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_I3 = _I2 + 4
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_I4 = _I3 + 4
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_I5 = _I4 + 4
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2018-09-08 10:41:37 +00:00
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_I6 = _I5 + 4 ; register I6 maintains common status
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2019-04-27 00:37:50 +00:00
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_I7 = _I6 + 4 ; register I7 maintains locations of code and allocated memory
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_I8 = _I7 + 4 ; register I8 is reserved for future use, e.g. context switching
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2018-10-30 07:38:42 +00:00
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_I9 = _I8 + 4 ; register I9 saves/restores processor status
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2018-08-21 13:14:16 +00:00
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; register I6 maintains common status
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2018-08-07 02:14:36 +00:00
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; (dd cc bb aa) aa: index for register stack RS / ccbb: program counter PC / dd: flags F UONPZLGE
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2018-09-08 10:41:37 +00:00
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_RSI = _I6 ; register stack index
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_PCL = _RSI + 1 ; program counter low
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_PCH = _PCL + 1 ; program counter high
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_F = _PCH + 1 ; flags
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_PC = _PCL ; program counter
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2018-08-07 02:14:36 +00:00
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; bits for flags
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2018-09-08 10:41:37 +00:00
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_F_E = 1 ; if Rp = Rq (after CMP)
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_F_G = 2 ; if Rp > Rq (after CMP)
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_F_L = 4 ; if Rp < Rq (after CMP)
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_F_Z = 8 ; if Rr = 0.0 (after TST)
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_F_P = 16 ; if Rr > 0.0 (after TST)
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_F_N = 32 ; if Rr < 0.0 (after TST)
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_F_O = 64 ; if overflow (after arithmetic operations)
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_F_U = 128 ; if underflow (after arithmetic operations)
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2018-08-07 02:14:36 +00:00
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2019-04-27 00:37:50 +00:00
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; register I7 maintains locations of code and allocated memory
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2019-03-30 02:22:15 +00:00
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_CRL = _I7 ; code low and high bytes
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_CRH = _CRL + 1
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_ARL = _CRH + 1 ; allocated low and high bytes
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_ARH = _ARL + 1
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2019-04-27 00:37:50 +00:00
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_CR = _CRL ; code memory address
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_AR = _ARL ; allocated memory address
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2018-10-30 07:38:42 +00:00
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2019-04-27 00:37:50 +00:00
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; register I8 is reserved for future use, e.g. context switching
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2018-10-05 01:03:55 +00:00
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2018-10-30 07:38:42 +00:00
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; register I9 saves/restores processor status
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2018-08-07 02:14:36 +00:00
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; (dd cc bb aa) aa: accumulator, bb: index X, cc: index Y, dd: processor status
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2018-10-30 07:38:42 +00:00
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_ACC = _I9 ; saved accumulator to restore
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2018-09-08 10:41:37 +00:00
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_IDX = _ACC + 1 ; saved index X to restore
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_IDY = _IDX + 1 ; saved index Y to restore
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_PS = _IDY + 1 ; saved processor status to restore
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2018-08-07 02:14:36 +00:00
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2018-10-05 01:03:55 +00:00
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; 6502 stack resides on page one
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; using some of page two for register stack
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2018-09-08 10:41:37 +00:00
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_RS = $200 ; register stack
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2019-04-27 00:37:50 +00:00
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_RSS = FN_FX - _RS ; register stack size
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2019-03-30 02:22:15 +00:00
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2019-04-27 00:37:50 +00:00
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; system & user functions
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2019-03-30 02:22:15 +00:00
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2019-04-27 00:37:50 +00:00
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; 32 bytes at the end of page two
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2018-10-05 01:03:55 +00:00
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FN_FX = $300 - 2 * 16 ; list of system and user functions
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2018-08-07 02:14:36 +00:00
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; function constants
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_ESC_C = $00
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_RTN_C = $01
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_BRS_C = $02
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_BRA_C = $03
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_BRE_C = $04
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_BRG_C = $05
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_BRL_C = $06
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_BRZ_C = $07
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_BRP_C = $08
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_BRN_C = $09
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_BRO_C = $0a
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_BRU_C = $0b
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_CPR_C = $0c
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_LDI_C = $0d
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_SVI_C = $0e
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_CMR_C = $0f
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_SET_C = $10
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2018-09-08 10:41:37 +00:00
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_LDD_C = $20
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_SVD_C = $30
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_PSH_C = $40
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_POP_C = $50
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_EXC_C = $60
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_INR_C = $70
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_DCR_C = $80
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2018-09-01 14:40:57 +00:00
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_TST_C = $90
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2018-08-07 02:14:36 +00:00
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_ADD_C = $a0
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_SUB_C = $b0
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_MUL_C = $c0
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_DIV_C = $d0
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_MOD_C = $e0
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_EXT_C = $f0
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; common constants
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2018-09-08 10:41:37 +00:00
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_MSK_O = %11000000 ; mask for overflow
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_MSK_R = %00111100 ; mask for registers
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2018-10-30 07:38:42 +00:00
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_MSK_T = (_F_Z + _F_P + _F_N) ^ $ff ; mask for TST
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_MSK_C = (_F_E + _F_G + _F_L) ^ $ff ; mask for CMP
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2018-08-08 01:36:06 +00:00
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2019-04-27 00:37:50 +00:00
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; section identifiers
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CODE = %10101010 ; to indicate CODE section
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DATA = %01010101 ; to indicate DATA section
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2018-08-07 02:14:36 +00:00
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#endif /* __COMMON_H */
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