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Merge pull request #33 from Russell-S-Harper/development
Adding CMR instruction.
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commit
26fd53959a
@ -416,12 +416,9 @@ _ADD .( ; ADD r pq ar pq Rr <- Rp + Rq - addition
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JMP _RETI0X ; pull X, transfer I0 to r register, let it handle the return
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JMP _RETI0X ; pull X, transfer I0 to r register, let it handle the return
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.)
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.)
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_SUB .( ; SUB r pq br pq Rr <- Rp - Rq - subtraction
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_SBXYI0 .( ; set I0 to register pointed by X - register pointed by Y
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TXA
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LDA _R0,X ; set I0 to Rp - Rq
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PHA ; save r register for later
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SEC
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JSR _GETPQF
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SEC ; set I0 to Rp - Rq
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LDA _R0,X
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SBC _R0,Y
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SBC _R0,Y
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STA _I0
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STA _I0
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LDA _R0+1,X
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LDA _R0+1,X
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@ -433,12 +430,20 @@ _SUB .( ; SUB r pq br pq Rr <- Rp - Rq - subtraction
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LDA _R0+3,X
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LDA _R0+3,X
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SBC _R0+3,Y
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SBC _R0+3,Y
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STA _I0+3
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STA _I0+3
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RTS
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.)
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_SUB .( ; SUB r pq br pq Rr <- Rp - Rq - subtraction
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TXA
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PHA ; save r register for later
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JSR _GETPQF
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JSR _SBXYI0
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JMP _RETI0X ; pull X, transfer I0 to r register, let it handle the return
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JMP _RETI0X ; pull X, transfer I0 to r register, let it handle the return
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.)
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.)
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_NEGX .( ; negates register at X
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_NEGX .( ; negates register at X
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SEC
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LDA #0
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LDA #0
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SEC
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SBC _R0,X
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SBC _R0,X
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STA _R0,X
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STA _R0,X
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LDA #0
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LDA #0
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@ -704,8 +709,8 @@ _1 RTS
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.)
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.)
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_UPDDM .( ; update DIV and MOD
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_UPDDM .( ; update DIV and MOD
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SEC ; I0/I1 -= I2/I3
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LDA _I0 ; I0/I1 -= I2/I3
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LDA _I0
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SEC
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SBC _I2
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SBC _I2
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STA _I0
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STA _I0
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LDA _I0+1
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LDA _I0+1
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@ -987,6 +992,24 @@ _SVI .( ; SVI pq 0e pq (Rp:bbcc) <- Rq - save indirect to memory
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.)
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.)
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_CMR .( ; CMR pq 0f pq F <- Rp <=> Rq - compare registers
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_CMR .( ; CMR pq 0f pq F <- Rp <=> Rq - compare registers
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JSR _GETPQF
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JSR _SBXYI0
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LDA _F
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AND #_MSK_C ; clear CMR bits
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STA _F
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LDA _I0+3 ; check highest byte
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BMI _1 ; is less than
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ORA _I0+2 ; could be greater than or equal to, OR with all other bytes
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ORA _I0+1
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ORA _I0
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BNE _2 ; is greater than
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LDA #_F_E ; set equal to flag
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BNE _3
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_1 LDA #_F_L ; set less than flag
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BNE _3
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_2 LDA #_F_G ; set greater than flag
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_3 ORA _F
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STA _F
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RTS
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RTS
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.)
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.)
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@ -138,5 +138,6 @@ _EXT_C = $f0
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_MSK_O = %11000000 ; mask for overflow
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_MSK_O = %11000000 ; mask for overflow
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_MSK_R = %00111100 ; mask for registers
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_MSK_R = %00111100 ; mask for registers
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_MSK_T = (_F_Z + _F_P + _F_N)^$ff ; mask for TST
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_MSK_T = (_F_Z + _F_P + _F_N)^$ff ; mask for TST
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_MSK_C = (_F_E + _F_G + _F_L)^$ff ; mask for CMP
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#endif /* __COMMON_H */
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#endif /* __COMMON_H */
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@ -6,7 +6,9 @@
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HDR(DEMO)
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HDR(DEMO)
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CMN
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CMN
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BRA(FACTORIAL)
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SET(R0, 999999.999)
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SET(R1, -999999.999)
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CMR(R0, R1)
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ESC
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ESC
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BRK
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BRK
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