Revising INR and DCR to use common routines.

This commit is contained in:
Russell-S-Harper 2018-08-07 09:30:11 -04:00
parent af463d57d3
commit 41e1ff48d2
2 changed files with 43 additions and 52 deletions

View File

@ -181,26 +181,25 @@ _EXC .( ; EXC r 4r Rr <-> RS - exchange Rr with stack
RTS RTS
.) .)
_INR .( ; INR r 5r Rr <- Rr + 1.0 - increment register _ADDRD .( ; add RD to register indexed by X
LDA _R0+3,X LDA _R0+3,X
AND #_MSK_O ; check for existing overflow condition AND #_MSK_O ; check for existing overflow condition
BEQ _4 BEQ _4
EOR #_MSK_O EOR #_MSK_O
BEQ _4 BNE _3 ; existing overflow, skip decrement operation
BNE _3 ; existing overflow, skip increment operation _4 CLC ; adding RD
_4 LDA #_PLS_1 ; adding plus one LDA _RD
CLC ADC _R0,X
STA _R0,X
LDA _RD+1
ADC _R0+1,X ADC _R0+1,X
STA _R0+1,X STA _R0+1,X
BCC _1 LDA _RD+2
LDA #0
ADC _R0+2,X ADC _R0+2,X
STA _R0+2,X STA _R0+2,X
BCC _1 LDA _RD+3
LDA #0
ADC _R0+3,X ADC _R0+3,X
STA _R0+3,X STA _R0+3,X
_1 LDA _R0+3,X
AND #_MSK_O ; check for overflow AND #_MSK_O ; check for overflow
BEQ _2 BEQ _2
EOR #_MSK_O EOR #_MSK_O
@ -215,36 +214,26 @@ _2 LDA _F ; clear overflow
_5 RTS _5 RTS
.) .)
_INR .( ; INR r 5r Rr <- Rr + 1.0 - increment register
LDA #0 ; set RD to plus one
STA _RD
LDA #_PLS_1
STA _RD+1
LDA #0
STA _RD+2
STA _RD+3
BEQ _ADDRD
.)
_DCR .( ; DCR r 6r Rr <- Rr - 1.0 - decrement register _DCR .( ; DCR r 6r Rr <- Rr - 1.0 - decrement register
LDA _R0+3,X LDA #0 ; set RD to minus one
AND #_MSK_U ; check for existing underflow condition STA _RD
BEQ _4 LDA #_MNS_1
EOR #_MSK_U STA _RD+1
BEQ _4
BNE _3 ; existing underflow, skip decrement operation
_4 LDA #_MNS_1 ; adding minus one
CLC
ADC _R0+1,X
STA _R0+1,X
LDA #$FF LDA #$FF
ADC _R0+2,X STA _RD+2
STA _R0+2,X STA _RD+3
LDA #$FF BNE _ADDRD
ADC _R0+3,X
STA _R0+3,X
_1 LDA _R0+3,X
AND #_MSK_U ; check for underflow
BEQ _2
EOR #_MSK_U
BEQ _2
_3 LDA _F ; set underflow
ORA #_F_U
STA _F
BNE _5
_2 LDA _F ; clear underflow
AND #_F_U^$FF
STA _F
_5 RTS
.) .)
_TST .( ; TST r 7r F <- Rr <=> 0.0 - test register _TST .( ; TST r 7r F <- Rr <=> 0.0 - test register
@ -298,6 +287,19 @@ _BRA .( ; BRA xxyy 03 yy xx PC <- PC + xxyy - branch always
RTS RTS
.) .)
_BRX .( ; generic branch testing
AND _F ; check the bit
BNE _BRA ; if set, branch
CLC ; not set, advance the program counter over the xxyy offset
LDA #2
ADC _PCL
STA _PCL
LDA #0
ADC _PCH
STA _PCH
RTS
.)
_BRE .( ; BRE xxyy 04 yy xx PC <- PC + xxyy - branch if Rp = Rq (after CMP) _BRE .( ; BRE xxyy 04 yy xx PC <- PC + xxyy - branch if Rp = Rq (after CMP)
LDA #_F_E LDA #_F_E
BNE _BRX BNE _BRX
@ -335,16 +337,7 @@ _BRO .( ; BRO xxyy 0a yy xx PC <- PC + xxyy - branch if overflow (after arithm
_BRU .( ; BRU xxyy 0b yy xx PC <- PC + xxyy - branch if underflow (after arithmetic operations) _BRU .( ; BRU xxyy 0b yy xx PC <- PC + xxyy - branch if underflow (after arithmetic operations)
LDA #_F_U LDA #_F_U
BNE _BRX ; (TODO) this line can probably be removed BNE _BRX
.)
_BRX .( ; generic branch testing
AND _F ; check the bit
BNE _BRA ; if set, branch
INC _PCL ; not set, advance the program counter
BNE _1
INC _PCH
_1 RTS
.) .)
_CPR .( ; CPR pq 0c pq Rp <- Rq - copy register _CPR .( ; CPR pq 0c pq Rp <- Rq - copy register

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@ -1,8 +1,8 @@
#ifndef __COMMON_H #ifndef __COMMON_H
#define __COMMON_H #define __COMMON_H
; Using four byte quantities aabbccdd with sign bit, overflow/underflow bit, 20 bits significand, 10 bits ; Using four byte quantities aabbccdd with sign bit, overflow bit, 20 bits significand, 10 bits
; fraction. The quantity is valid if the overflow/underflow bit agrees with the sign bit. The intent is ; fraction. The quantity is valid if the overflow bit agrees with the sign bit. The intent is
; to be able to recognize an overflow/underflow situation, rescale the arguments, and repeat the ; to be able to recognize an overflow/underflow situation, rescale the arguments, and repeat the
; calculation. ; calculation.
@ -135,8 +135,6 @@ _EXT_C = $f0
_PLS_1 = %00000100 ; i.e. the $04 part of $00000400 _PLS_1 = %00000100 ; i.e. the $04 part of $00000400
_MNS_1 = %11111100 ; i.e. the $FC part of $FFFFFC00 _MNS_1 = %11111100 ; i.e. the $FC part of $FFFFFC00
; masks for overflow and underflow
_MSK_O = %11000000 ; mask for overflow _MSK_O = %11000000 ; mask for overflow
_MSK_U = %11000000 ; mask for underflow - yes, the same!
#endif /* __COMMON_H */ #endif /* __COMMON_H */