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Merge pull request #51 from Russell-S-Harper/development
Bounds checking for LDI/SVI.
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commit
4ace64c9af
@ -977,14 +977,23 @@ _CPR .( ; CPR pq 0c pq Rp <- Rq - copy register
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_INILS .( ; common initialization for LDI and SVI
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_INILS .( ; common initialization for LDI and SVI
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JSR _CPYI1 ; copy q to I1
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JSR _CPYI1 ; copy q to I1
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LDA _I1+3 ; check for negative offsets
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BMI _1
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CLC ; add the allocated memory offset
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CLC ; add the allocated memory offset
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LDA _ARL
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LDA _ARLL
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ADC _I1+1
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ADC _I1+1
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STA _I1+1
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STA _I1+1
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LDA _ARH
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LDA _ARLH
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ADC _I1+2
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ADC _I1+2
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STA _I1+2
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STA _I1+2
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RTS
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CMP _ARUH ; compare against upper limit
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BCC _2 ; for sure less
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BNE _1 ; not equal, must be more
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LDA _I1+1
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CMP _ARUL
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BCC _2 ; for sure less
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_1 BRK ; accessing out of bounds, abort and call exception handler (TODO)
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_2 RTS
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.)
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.)
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_LDI .( ; LDI pq 0d pq Rp <- (Rq:bbcc) - load indirect from memory
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_LDI .( ; LDI pq 0d pq Rp <- (Rq:bbcc) - load indirect from memory
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@ -88,13 +88,12 @@ _F_N = 32 ; if Rr < 0.0 (after TST)
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_F_O = 64 ; if overflow (after arithmetic operations)
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_F_O = 64 ; if overflow (after arithmetic operations)
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_F_U = 128 ; if underflow (after arithmetic operations)
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_F_U = 128 ; if underflow (after arithmetic operations)
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; register I7 maintains locations of code and allocated memory
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; register I7 maintains locations of allocated memory
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_CRL = _I7 ; code low and high bytes
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_ARLL = _I7 ; allocated low and high bytes
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_CRH = _CRL + 1
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_ARLH = _ARLL + 1
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_ARL = _CRH + 1 ; allocated low and high bytes
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_ARUL = _ARLH + 1 ; allocated upper limit
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_ARH = _ARL + 1
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_ARUH = _ARUL + 1
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_CR = _CRL ; code memory address
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_AR = _ARLL ; allocated memory address
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_AR = _ARL ; allocated memory address
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; register I8 is reserved for future use, e.g. context switching
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; register I8 is reserved for future use, e.g. context switching
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@ -8,7 +8,7 @@ CODE(DEMO)
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START
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START
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CMN
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CMN
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SET(R0, 9.4662)
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SET(R0, 9.4662)
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SET(R1, 2)
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SET(R1, 5)
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LDI(R7, R1)
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LDI(R7, R1)
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MUL(R7, R7, R7)
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MUL(R7, R7, R7)
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SVI(R1, R0)
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SVI(R1, R0)
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@ -17,13 +17,12 @@
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#define _F _PCH + 1 /* flags */
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#define _F _PCH + 1 /* flags */
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#define _PC _PCL /* program counter */
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#define _PC _PCL /* program counter */
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/* register I7 maintains locations of code and allocated memory */
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/* register I7 maintains locations of allocated */
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#define _CRL _I7 /* code low and high bytes */
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#define _ARLL _I7 /* allocated low and high bytes */
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#define _CRH _CRL + 1
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#define _ARLH _ARLL + 1
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#define _ARL _CRH + 1 /* allocated low and high bytes */
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#define _ARUL _ARLH + 1 /* allocated upper limit */
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#define _ARH _ARL + 1
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#define _ARUH _ARUL + 1
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#define _CR _CRL /* code memory address */
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#define _AR _ARLL /* allocated memory address */
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#define _AR _ARL /* allocated memory address */
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/* section modifiers */
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/* section modifiers */
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#define _SM_FXD 0x01
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#define _SM_FXD 0x01
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@ -91,8 +90,8 @@ int main() {
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/* offset the starting address */
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/* offset the starting address */
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entity += index;
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entity += index;
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/* save the starting address */
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/* save the starting address */
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memory[_CRL] = entity & 0xff;
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memory[_PCL] = entity & 0xff;
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memory[_CRH] = entity >> 8;
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memory[_PCH] = entity >> 8;
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/* advance to the end of the section */
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/* advance to the end of the section */
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index += length;
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index += length;
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}
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}
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@ -102,18 +101,18 @@ int main() {
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/* entity is the length of zeroed data, length is the length of preset data */
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/* entity is the length of zeroed data, length is the length of preset data */
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if (fread(memory + index, length, 1, stdin)) {
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if (fread(memory + index, length, 1, stdin)) {
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/* save the start of the data */
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/* save the start of the data */
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memory[_ARL] = index & 0xff;
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memory[_ARLL] = index & 0xff;
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memory[_ARH] = index >> 8;
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memory[_ARLH] = index >> 8;
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/* advance to the end of the section */
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/* advance to the end of the section */
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index += entity + length;
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index += entity + length;
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/* save the end of the data */
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memory[_ARUL] = index & 0xff;
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memory[_ARUH] = index >> 8;
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}
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}
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break;
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break;
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}
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}
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}
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}
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memory[_PCL] = memory[_CRL];
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memory[_PCH] = memory[_CRH];
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hookexternal(hook);
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hookexternal(hook);
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reset6502();
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reset6502();
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