Merge pull request #51 from Russell-S-Harper/development

Bounds checking for LDI/SVI.
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Russell-S-Harper 2019-05-02 17:06:20 -04:00 committed by GitHub
commit 4ace64c9af
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4 changed files with 33 additions and 26 deletions

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@ -977,14 +977,23 @@ _CPR .( ; CPR pq 0c pq Rp <- Rq - copy register
_INILS .( ; common initialization for LDI and SVI _INILS .( ; common initialization for LDI and SVI
JSR _CPYI1 ; copy q to I1 JSR _CPYI1 ; copy q to I1
LDA _I1+3 ; check for negative offsets
BMI _1
CLC ; add the allocated memory offset CLC ; add the allocated memory offset
LDA _ARL LDA _ARLL
ADC _I1+1 ADC _I1+1
STA _I1+1 STA _I1+1
LDA _ARH LDA _ARLH
ADC _I1+2 ADC _I1+2
STA _I1+2 STA _I1+2
RTS CMP _ARUH ; compare against upper limit
BCC _2 ; for sure less
BNE _1 ; not equal, must be more
LDA _I1+1
CMP _ARUL
BCC _2 ; for sure less
_1 BRK ; accessing out of bounds, abort and call exception handler (TODO)
_2 RTS
.) .)
_LDI .( ; LDI pq 0d pq Rp <- (Rq:bbcc) - load indirect from memory _LDI .( ; LDI pq 0d pq Rp <- (Rq:bbcc) - load indirect from memory

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@ -88,13 +88,12 @@ _F_N = 32 ; if Rr < 0.0 (after TST)
_F_O = 64 ; if overflow (after arithmetic operations) _F_O = 64 ; if overflow (after arithmetic operations)
_F_U = 128 ; if underflow (after arithmetic operations) _F_U = 128 ; if underflow (after arithmetic operations)
; register I7 maintains locations of code and allocated memory ; register I7 maintains locations of allocated memory
_CRL = _I7 ; code low and high bytes _ARLL = _I7 ; allocated low and high bytes
_CRH = _CRL + 1 _ARLH = _ARLL + 1
_ARL = _CRH + 1 ; allocated low and high bytes _ARUL = _ARLH + 1 ; allocated upper limit
_ARH = _ARL + 1 _ARUH = _ARUL + 1
_CR = _CRL ; code memory address _AR = _ARLL ; allocated memory address
_AR = _ARL ; allocated memory address
; register I8 is reserved for future use, e.g. context switching ; register I8 is reserved for future use, e.g. context switching

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@ -2,13 +2,13 @@
#include "macros.h" #include "macros.h"
#include "globals.h" #include "globals.h"
* = $1000 ; any address outside of page zero is okay * = $1000 ; any address outside of page zero is okay
CODE(DEMO) CODE(DEMO)
START START
CMN CMN
SET(R0, 9.4662) SET(R0, 9.4662)
SET(R1, 2) SET(R1, 5)
LDI(R7, R1) LDI(R7, R1)
MUL(R7, R7, R7) MUL(R7, R7, R7)
SVI(R1, R0) SVI(R1, R0)

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@ -17,13 +17,12 @@
#define _F _PCH + 1 /* flags */ #define _F _PCH + 1 /* flags */
#define _PC _PCL /* program counter */ #define _PC _PCL /* program counter */
/* register I7 maintains locations of code and allocated memory */ /* register I7 maintains locations of allocated */
#define _CRL _I7 /* code low and high bytes */ #define _ARLL _I7 /* allocated low and high bytes */
#define _CRH _CRL + 1 #define _ARLH _ARLL + 1
#define _ARL _CRH + 1 /* allocated low and high bytes */ #define _ARUL _ARLH + 1 /* allocated upper limit */
#define _ARH _ARL + 1 #define _ARUH _ARUL + 1
#define _CR _CRL /* code memory address */ #define _AR _ARLL /* allocated memory address */
#define _AR _ARL /* allocated memory address */
/* section modifiers */ /* section modifiers */
#define _SM_FXD 0x01 #define _SM_FXD 0x01
@ -91,8 +90,8 @@ int main() {
/* offset the starting address */ /* offset the starting address */
entity += index; entity += index;
/* save the starting address */ /* save the starting address */
memory[_CRL] = entity & 0xff; memory[_PCL] = entity & 0xff;
memory[_CRH] = entity >> 8; memory[_PCH] = entity >> 8;
/* advance to the end of the section */ /* advance to the end of the section */
index += length; index += length;
} }
@ -102,18 +101,18 @@ int main() {
/* entity is the length of zeroed data, length is the length of preset data */ /* entity is the length of zeroed data, length is the length of preset data */
if (fread(memory + index, length, 1, stdin)) { if (fread(memory + index, length, 1, stdin)) {
/* save the start of the data */ /* save the start of the data */
memory[_ARL] = index & 0xff; memory[_ARLL] = index & 0xff;
memory[_ARH] = index >> 8; memory[_ARLH] = index >> 8;
/* advance to the end of the section */ /* advance to the end of the section */
index += entity + length; index += entity + length;
/* save the end of the data */
memory[_ARUL] = index & 0xff;
memory[_ARUH] = index >> 8;
} }
break; break;
} }
} }
memory[_PCL] = memory[_CRL];
memory[_PCH] = memory[_CRH];
hookexternal(hook); hookexternal(hook);
reset6502(); reset6502();