2017-06-04 21:38:34 +01:00
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#pragma once
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// Auxiliary carry logic from https://github.com/begoon/i8080-core
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2017-10-22 21:57:01 +01:00
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#include <cstdint>
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#include <stdexcept>
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2017-11-05 12:47:42 +00:00
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#include <Bus.h>
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#include <InputOutput.h>
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2017-09-03 23:51:01 +01:00
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#include <IntelProcessor.h>
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2017-10-22 21:57:01 +01:00
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#include <Signal.h>
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#include <Register.h>
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2017-06-04 21:38:34 +01:00
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namespace EightBit {
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2017-12-10 21:41:48 +00:00
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class Intel8080 final : public IntelProcessor {
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2017-06-04 21:38:34 +01:00
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public:
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2017-06-16 01:58:12 +01:00
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enum StatusBits {
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SF = Bit7,
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ZF = Bit6,
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AC = Bit4,
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PF = Bit2,
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CF = Bit0,
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};
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2017-09-06 13:22:23 +01:00
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Intel8080(Bus& bus, InputOutput& ports);
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2017-06-04 21:38:34 +01:00
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Signal<Intel8080> ExecutingInstruction;
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2018-08-25 01:34:30 +01:00
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Signal<Intel8080> ExecutedInstruction;
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2017-06-04 21:38:34 +01:00
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2017-12-10 21:41:48 +00:00
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virtual int execute(uint8_t opcode) final;
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virtual int step() final;
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2017-06-04 21:38:34 +01:00
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2017-12-10 21:41:48 +00:00
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virtual register16_t& AF() final;
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virtual register16_t& BC() final;
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virtual register16_t& DE() final;
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virtual register16_t& HL() final;
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2017-06-04 21:38:34 +01:00
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2017-12-10 21:41:48 +00:00
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protected:
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2018-08-25 01:34:30 +01:00
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virtual void handleRESET() final;
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virtual void handleINT() final;
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2017-12-04 23:41:49 +00:00
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2017-06-04 21:38:34 +01:00
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private:
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2017-12-02 23:50:59 +00:00
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bool m_interruptEnable = false;
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2017-12-03 00:57:47 +00:00
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2017-06-04 22:59:56 +01:00
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InputOutput& m_ports;
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2017-06-04 21:38:34 +01:00
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2017-06-16 01:58:12 +01:00
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register16_t af;
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2018-06-16 00:55:32 +01:00
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register16_t bc = 0xffff;
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register16_t de = 0xffff;
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register16_t hl = 0xffff;
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2017-06-04 21:38:34 +01:00
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2018-06-11 23:02:27 +01:00
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uint8_t R(int r) {
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2017-07-24 22:00:49 +01:00
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switch (r) {
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case 0b000:
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return B();
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case 0b001:
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return C();
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case 0b010:
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return D();
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case 0b011:
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return E();
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case 0b100:
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return H();
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case 0b101:
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return L();
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case 0b110:
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return BUS().read(HL());
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case 0b111:
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return A();
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2017-07-24 22:00:49 +01:00
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default:
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UNREACHABLE;
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}
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}
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2018-06-11 23:02:27 +01:00
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void R(int r, uint8_t value) {
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2017-08-06 17:06:48 +01:00
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switch (r) {
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case 0b000:
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B() = value;
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break;
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case 0b001:
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C() = value;
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break;
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case 0b010:
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D() = value;
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break;
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case 0b011:
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E() = value;
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break;
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case 0b100:
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H() = value;
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break;
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case 0b101:
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L() = value;
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break;
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case 0b110:
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2018-03-10 01:53:57 +00:00
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BUS().write(HL(), value);
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2017-08-06 17:06:48 +01:00
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break;
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case 0b111:
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A() = value;
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2017-08-06 17:06:48 +01:00
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break;
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default:
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2017-09-03 21:30:46 +01:00
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UNREACHABLE;
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2017-08-06 17:06:48 +01:00
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}
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}
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2017-07-24 22:00:49 +01:00
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register16_t& RP(int rp) {
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switch (rp) {
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case 0b00:
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return BC();
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case 0b01:
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return DE();
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case 0b10:
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return HL();
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case 0b11:
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return SP();
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default:
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2017-09-03 21:30:46 +01:00
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UNREACHABLE;
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2017-07-24 22:00:49 +01:00
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}
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}
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register16_t& RP2(int rp) {
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switch (rp) {
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case 0b00:
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return BC();
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case 0b01:
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return DE();
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case 0b10:
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return HL();
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case 0b11:
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return AF();
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default:
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2017-09-03 21:30:46 +01:00
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UNREACHABLE;
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2017-07-24 22:00:49 +01:00
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}
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}
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2017-06-04 21:38:34 +01:00
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2017-06-19 13:53:00 +01:00
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static void adjustAuxiliaryCarryAdd(uint8_t& f, uint8_t before, uint8_t value, int calculation) {
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setFlag(f, AC, calculateHalfCarryAdd(before, value, calculation));
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2017-06-04 21:38:34 +01:00
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}
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2017-06-19 13:53:00 +01:00
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static void adjustAuxiliaryCarrySub(uint8_t& f, uint8_t before, uint8_t value, int calculation) {
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clearFlag(f, AC, calculateHalfCarrySub(before, value, calculation));
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2017-06-04 21:38:34 +01:00
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}
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2018-06-11 23:02:27 +01:00
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void subtract(uint8_t& operand, uint8_t value, int carry = 0);
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2017-06-04 21:38:34 +01:00
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2018-06-11 23:02:27 +01:00
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void execute(int x, int y, int z, int p, int q);
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2017-06-04 21:38:34 +01:00
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2018-06-11 23:02:27 +01:00
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void increment(uint8_t& operand);
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void decrement(uint8_t& operand);
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2017-06-04 21:38:34 +01:00
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2017-11-03 22:05:01 +00:00
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void di();
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void ei();
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2018-06-11 23:02:27 +01:00
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bool returnConditionalFlag(int flag);
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bool jumpConditionalFlag(int flag);
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bool callConditionalFlag(int flag);
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2017-06-04 21:38:34 +01:00
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2018-06-11 23:02:27 +01:00
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void add(register16_t value);
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2017-07-25 19:26:21 +01:00
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2018-06-11 23:02:27 +01:00
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void add(uint8_t value, int carry = 0);
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void adc(uint8_t value);
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void sbb(uint8_t value);
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void andr(uint8_t value);
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void xorr(uint8_t value);
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void orr(uint8_t value);
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void compare(uint8_t value);
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2017-06-04 21:38:34 +01:00
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2018-06-11 23:02:27 +01:00
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void rlc();
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void rrc();
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void rl();
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void rr();
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2017-06-04 21:38:34 +01:00
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2018-06-11 23:02:27 +01:00
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void daa();
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2017-06-04 21:38:34 +01:00
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2018-06-11 23:02:27 +01:00
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void cma();
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void stc();
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void cmc();
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2017-07-24 22:00:49 +01:00
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2018-06-11 23:02:27 +01:00
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void xhtl();
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2017-06-04 21:38:34 +01:00
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2018-06-11 23:02:27 +01:00
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void writePort(uint8_t port);
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2017-11-03 22:05:01 +00:00
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void writePort();
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2017-06-04 21:38:34 +01:00
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2018-06-11 23:02:27 +01:00
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uint8_t readPort(uint8_t port);
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uint8_t readPort();
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2017-06-04 21:38:34 +01:00
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};
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}
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