2018-08-26 19:09:34 +01:00
|
|
|
#include "stdafx.h"
|
|
|
|
#include "Board.h"
|
|
|
|
|
|
|
|
Board::Board(const Configuration& configuration)
|
|
|
|
: m_configuration(configuration),
|
|
|
|
m_cpu(EightBit::mc6809(*this)),
|
2018-10-20 20:52:41 +01:00
|
|
|
m_disassembler(*this, m_cpu) {
|
2018-09-16 19:49:52 +01:00
|
|
|
std::vector<uint8_t> content(m_unused2000.size());
|
|
|
|
std::fill(content.begin(), content.end(), 0xff);
|
|
|
|
m_unused2000.load(content);
|
|
|
|
}
|
2018-08-26 19:09:34 +01:00
|
|
|
|
|
|
|
void Board::initialise() {
|
|
|
|
|
2018-09-29 14:31:50 +01:00
|
|
|
// Load our BASIC interpreter
|
2018-08-26 19:09:34 +01:00
|
|
|
const auto directory = m_configuration.getRomDirectory() + "\\";
|
2018-09-15 14:35:59 +01:00
|
|
|
loadHexFile(directory + "ExBasROM.hex");
|
2018-08-26 19:09:34 +01:00
|
|
|
|
2018-09-29 14:31:50 +01:00
|
|
|
// Get the CPU ready for action
|
|
|
|
CPU().powerOn();
|
|
|
|
CPU().raise(CPU().NMI());
|
|
|
|
CPU().raise(CPU().FIRQ());
|
|
|
|
CPU().reset();
|
2018-08-26 19:09:34 +01:00
|
|
|
|
2018-09-29 14:31:50 +01:00
|
|
|
// Get the ACIA ready for action
|
2018-10-20 22:54:10 +01:00
|
|
|
ADDRESS() = 0b1010000000000000;
|
2018-09-29 14:31:50 +01:00
|
|
|
ACIA().DATA() = EightBit::mc6850::CR0 | EightBit::mc6850::CR1; // Master reset
|
2018-10-20 22:54:10 +01:00
|
|
|
updateAciaPins(EightBit::Chip::PinLevel::Low);
|
|
|
|
ACIA().powerOn();
|
2018-09-30 23:10:03 +01:00
|
|
|
ACIA().access();
|
2018-09-29 14:31:50 +01:00
|
|
|
|
|
|
|
// Once the reset has completed, we can wire the ACIA event handlers...
|
2018-09-25 23:57:20 +01:00
|
|
|
ACIA().Transmitting.connect(std::bind(&Board::Acia_Transmitting, this, std::placeholders::_1));
|
|
|
|
|
2018-09-29 14:31:50 +01:00
|
|
|
// Wire bus events...
|
|
|
|
WrittenByte.connect(std::bind(&Board::Bus_WrittenByte_Acia, this, std::placeholders::_1));
|
|
|
|
ReadingByte.connect(std::bind(&Board::Bus_ReadingByte_Acia, this, std::placeholders::_1));
|
2018-09-23 13:14:10 +01:00
|
|
|
|
2018-09-29 14:31:50 +01:00
|
|
|
// Wire CPU events
|
|
|
|
CPU().ExecutedInstruction.connect(std::bind(&Board::Cpu_ExecutedInstruction_Acia, this, std::placeholders::_1));
|
|
|
|
if (m_configuration.isDebugMode()) {
|
|
|
|
CPU().ExecutingInstruction.connect(std::bind(&Board::Cpu_ExecutingInstruction_Debug, this, std::placeholders::_1));
|
|
|
|
CPU().ExecutedInstruction.connect(std::bind(&Board::Cpu_ExecutedInstruction_Debug, this, std::placeholders::_1));
|
|
|
|
}
|
2018-10-21 10:28:33 +01:00
|
|
|
if (m_configuration.terminatesEarly())
|
|
|
|
CPU().ExecutingInstruction.connect(std::bind(&Board::Cpu_ExecutedInstruction_Terminator, this, std::placeholders::_1));
|
2018-08-26 19:09:34 +01:00
|
|
|
}
|
|
|
|
|
2018-08-27 10:43:12 +01:00
|
|
|
void Board::Cpu_ExecutingInstruction_Debug(EightBit::mc6809&) {
|
2018-08-30 01:37:09 +01:00
|
|
|
m_disassembleAt = CPU().PC();
|
|
|
|
m_ignoreDisassembly = m_disassembler.ignore();
|
|
|
|
}
|
|
|
|
|
|
|
|
void Board::Cpu_ExecutedInstruction_Debug(EightBit::mc6809&) {
|
|
|
|
if (!m_ignoreDisassembly)
|
2018-09-30 23:10:03 +01:00
|
|
|
std::cout << m_disassembler.trace(m_disassembleAt) << " " << ACIA().dumpStatus() << std::endl;
|
2018-09-21 00:17:25 +01:00
|
|
|
}
|
|
|
|
|
2018-09-15 14:35:59 +01:00
|
|
|
EightBit::MemoryMapping Board::mapping(uint16_t address) {
|
2018-08-26 19:09:34 +01:00
|
|
|
|
|
|
|
if (address < 0x8000)
|
2018-09-15 14:35:59 +01:00
|
|
|
return { m_ram, 0x0000, EightBit::MemoryMapping::ReadWrite };
|
2018-08-26 19:09:34 +01:00
|
|
|
|
2018-09-16 19:49:52 +01:00
|
|
|
if (address < 0xa000)
|
|
|
|
return { m_unused2000, 0x8000, EightBit::MemoryMapping::ReadOnly };
|
|
|
|
|
2018-08-26 19:09:34 +01:00
|
|
|
if (address < 0xc000)
|
2018-09-16 19:49:52 +01:00
|
|
|
return { m_io, 0xa000, EightBit::MemoryMapping::ReadWrite };
|
2018-08-26 19:09:34 +01:00
|
|
|
|
2018-09-15 14:35:59 +01:00
|
|
|
return { m_rom, 0xc000, EightBit::MemoryMapping::ReadOnly };
|
2018-08-26 19:09:34 +01:00
|
|
|
}
|
2018-09-23 13:14:10 +01:00
|
|
|
|
2018-09-29 14:31:50 +01:00
|
|
|
void Board::Bus_WrittenByte_Acia(EightBit::EventArgs&) {
|
2018-09-23 20:31:55 +01:00
|
|
|
updateAciaPins(EightBit::Chip::Low);
|
2018-09-30 23:10:03 +01:00
|
|
|
if (ACIA().selected()) {
|
2018-09-29 14:31:50 +01:00
|
|
|
ACIA().DATA() = peek(ADDRESS());
|
2018-09-30 23:10:03 +01:00
|
|
|
ACIA().access();
|
|
|
|
}
|
2018-09-23 13:14:10 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void Board::Bus_ReadingByte_Acia(EightBit::EventArgs&) {
|
2018-09-23 20:31:55 +01:00
|
|
|
updateAciaPins(EightBit::Chip::High);
|
2018-09-30 23:10:03 +01:00
|
|
|
if (ACIA().access())
|
2018-09-29 10:06:02 +01:00
|
|
|
poke(ADDRESS(), ACIA().DATA());
|
2018-09-23 13:14:10 +01:00
|
|
|
}
|
|
|
|
|
2018-09-23 20:31:55 +01:00
|
|
|
void Board::updateAciaPins(const EightBit::Chip::PinLevel rw) {
|
|
|
|
ACIA().RW() = rw;
|
2018-09-23 13:14:10 +01:00
|
|
|
ACIA().DATA() = DATA();
|
2018-10-21 19:42:20 +01:00
|
|
|
ACIA().match(ACIA().RS(), ADDRESS().word & EightBit::Chip::Bit0);
|
|
|
|
ACIA().match(ACIA().CS0(), ADDRESS().word & EightBit::Chip::Bit15);
|
|
|
|
ACIA().match(ACIA().CS1(), ADDRESS().word & EightBit::Chip::Bit13);
|
|
|
|
ACIA().match(ACIA().CS2(), ADDRESS().word & EightBit::Chip::Bit14);
|
2018-09-23 13:14:10 +01:00
|
|
|
}
|
|
|
|
|
2018-10-21 10:28:33 +01:00
|
|
|
void Board::Cpu_ExecutedInstruction_Terminator(EightBit::mc6809&) {
|
|
|
|
if (m_totalCycleCount > Configuration::TerminationCycles)
|
|
|
|
CPU().powerOff();
|
|
|
|
}
|
|
|
|
|
2018-09-23 13:14:10 +01:00
|
|
|
void Board::Cpu_ExecutedInstruction_Acia(EightBit::mc6809&) {
|
2018-10-20 16:57:32 +01:00
|
|
|
const auto cycles = CPU().cycles();
|
|
|
|
m_totalCycleCount += cycles;
|
2018-10-21 10:28:33 +01:00
|
|
|
m_frameCycleCount -= cycles;
|
|
|
|
if (m_frameCycleCount < 0) {
|
|
|
|
if (_kbhit()) {
|
|
|
|
ACIA().RDR() = _getch();
|
|
|
|
ACIA().markReceiveStarting();
|
2018-10-20 16:57:32 +01:00
|
|
|
}
|
2018-10-21 10:28:33 +01:00
|
|
|
m_frameCycleCount = Configuration::FrameCycleInterval;
|
2018-09-24 08:29:11 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-09-25 23:57:20 +01:00
|
|
|
void Board::Acia_Transmitting(EightBit::EventArgs&) {
|
|
|
|
std::cout << ACIA().TDR();
|
|
|
|
ACIA().markTransmitComplete();
|
|
|
|
}
|