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Add implementations of ROL/ROR for the 6809 processor

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Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
This commit is contained in:
Adrian Conlon 2018-08-22 09:11:02 +01:00
parent 6f6e88f003
commit 07248972bf
2 changed files with 35 additions and 0 deletions
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2
MC6809/inc/mc6809.h
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@ -250,6 +250,8 @@ namespace EightBit {
void pshu(uint8_t data);
void puls(uint8_t data);
void pulu(uint8_t data);
uint8_t rol(uint8_t operand);
uint8_t ror(uint8_t operand);
register16_t m_d;
register16_t m_x;

33
MC6809/src/mc6809.cpp
View File

@ -280,6 +280,20 @@ int EightBit::mc6809::executeUnprefixed(uint8_t opcode) {
case 0x35: addCycles(5); puls(AM_immediate_byte()); break; // PUL (PULS immediate)
case 0x37: addCycles(5); pulu(AM_immediate_byte()); break; // PUL (PULU immediate)
// ROL
case 0x09: addCycles(6); BUS().write(rol(AM_direct_byte())); break; // ROL (direct)
case 0x49: addCycles(2); A() = rol(A()); break; // ROL (ROLA inherent)
case 0x59: addCycles(2); B() = rol(B()); break; // ROL (ROLB inherent)
case 0x69: addCycles(6); BUS().write(rol(AM_indexed_byte())); break; // ROL (indexed)
case 0x79: addCycles(7); BUS().write(rol(AM_extended_byte())); break; // ROL (extended)
// ROR
case 0x06: addCycles(6); BUS().write(ror(AM_direct_byte())); break; // ROR (direct)
case 0x46: addCycles(2); A() = ror(A()); break; // ROR (RORA inherent)
case 0x56: addCycles(2); B() = ror(B()); break; // ROR (RORB inherent)
case 0x66: addCycles(6); BUS().write(ror(AM_indexed_byte())); break; // ROR (indexed)
case 0x76: addCycles(7); BUS().write(ror(AM_extended_byte())); break; // ROR (extended)
default:
UNREACHABLE;
}
@ -857,3 +871,22 @@ void EightBit::mc6809::pulu(uint8_t data) {
PC() = popWordU();
}
}
uint8_t EightBit::mc6809::rol(uint8_t operand) {
const auto carry = CC() & CF;
setFlag(CC(), CF, operand & Bit7);
setFlag(CC(), VF, ((operand & Bit7) >> 7) ^ ((operand & Bit6) >> 6));
operand <<= 1;
operand |= carry;
adjustNZ(operand);
return operand;
}
uint8_t EightBit::mc6809::ror(uint8_t operand) {
const auto carry = CC() & CF;
setFlag(CC(), CF, operand & Bit0);
operand >>= 1;
operand |= (carry << 7);
adjustNZ(operand);
return operand;
}