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Fetching bytes/words and stack access are more processor specific than I thought.

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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
This commit is contained in:
Adrian.Conlon 2017-07-07 09:27:06 +01:00
parent 7cd0f324de
commit 3c0a1697fd
7 changed files with 22 additions and 21 deletions
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8
Intel8080/inc/Intel8080.h
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@ -274,9 +274,9 @@ namespace EightBit {
m_memory.reference() = data;
}
void lxi_b() { Processor::fetchWord(BC()); }
void lxi_d() { Processor::fetchWord(DE()); }
void lxi_h() { Processor::fetchWord(HL()); }
void lxi_b() { fetchWord(BC()); }
void lxi_d() { fetchWord(DE()); }
void lxi_h() { fetchWord(HL()); }
void stax_r(register16_t& destination) {
m_memory.ADDRESS() = destination;
@ -350,7 +350,7 @@ namespace EightBit {
}
void lxi_sp() {
Processor::fetchWord(SP());
fetchWord(SP());
}
void inx_sp() { ++SP().word; }

2
LR35902/src/LR35902.cpp
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@ -524,7 +524,7 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) {
case 1: // 16-bit load immediate/add
switch (q) {
case 0: // LD rp,nn
Processor::fetchWord(RP(p));
fetchWord(RP(p));
cycles += 3;
break;
case 1: // ADD HL,rp

2
Z80/src/Z80.cpp
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@ -1160,7 +1160,7 @@ void EightBit::Z80::executeOther(int x, int y, int z, int p, int q) {
case 1: // 16-bit load immediate/add
switch (q) {
case 0: // LD rp,nn
Processor::fetchWord(RP(p));
fetchWord(RP(p));
cycles += 10;
break;
case 1: // ADD HL,rp

15
inc/IntelProcessor.h
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@ -13,6 +13,8 @@ namespace EightBit {
virtual void initialise();
register16_t& SP() { return sp; }
virtual register16_t& AF() = 0;
uint8_t& A() { return AF().high; }
uint8_t& F() { return AF().low; }
@ -105,6 +107,16 @@ namespace EightBit {
return m_halfCarryTableSub[index & Mask3];
}
uint8_t fetchByte() {
m_memory.ADDRESS().word = PC().word++;
return m_memory.reference();
}
void fetchWord(register16_t& output) {
output.low = fetchByte();
output.high = fetchByte();
}
void push(uint8_t value) {
m_memory.ADDRESS().word = --SP().word;
m_memory.reference() = value;
@ -126,7 +138,7 @@ namespace EightBit {
}
void fetchWord() {
Processor::fetchWord(MEMPTR());
fetchWord(MEMPTR());
}
//
@ -205,5 +217,6 @@ namespace EightBit {
private:
register16_t m_memptr;
register16_t sp;
};
}

12
inc/Processor.h
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@ -47,7 +47,6 @@ namespace EightBit {
const Memory& getMemory() const { return m_memory; }
register16_t& PC() { return pc; }
register16_t& SP() { return sp; }
bool isHalted() const { return m_halted; }
void halt() { --PC().word; m_halted = true; }
@ -62,19 +61,8 @@ namespace EightBit {
Memory& m_memory;
int cycles;
uint8_t fetchByte() {
m_memory.ADDRESS().word = PC().word++;
return m_memory.reference();
}
void fetchWord(register16_t& output) {
output.low = fetchByte();
output.high = fetchByte();
}
private:
register16_t pc;
register16_t sp;
bool m_halted;
};
}

2
src/IntelProcessor.cpp
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@ -4,9 +4,11 @@
EightBit::IntelProcessor::IntelProcessor(Memory& memory)
: Processor(memory) {
MEMPTR().word = 0;
SP().word = 0xffff;
}
void EightBit::IntelProcessor::initialise() {
Processor::initialise();
MEMPTR().word = 0;
SP().word = 0xffff;
}

2
src/Processor.cpp
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@ -5,7 +5,6 @@ EightBit::Processor::Processor(Memory& memory)
: m_memory(memory),
cycles(0),
m_halted(false) {
SP().word = 0xffff;
PC().word = 0;
}
@ -14,6 +13,5 @@ void EightBit::Processor::reset() {
}
void EightBit::Processor::initialise() {
SP().word = 0xffff;
reset();
}