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More likely/unlikely macro usages.

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Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
This commit is contained in:
Adrian Conlon 2017-12-02 14:53:35 +00:00
parent facb36d25f
commit 55b989fe13
2 changed files with 16 additions and 16 deletions
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2
Z80/inc/Z80.h
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@ -259,7 +259,7 @@ namespace EightBit {
} }
register16_t& HL2() { register16_t& HL2() {
if (!m_displaced) if (LIKELY(!m_displaced))
return HL(); return HL();
if (m_prefixDD) if (m_prefixDD)
return IX(); return IX();

30
Z80/src/Z80.cpp
View File

@ -693,7 +693,7 @@ int EightBit::Z80::execute(const uint8_t opcode) {
if (UNLIKELY(!M1())) if (UNLIKELY(!M1()))
throw std::logic_error("M1 cannot be high"); throw std::logic_error("M1 cannot be high");
if (!(m_prefixCB && m_displaced)) { if (LIKELY(!(m_prefixCB && m_displaced))) {
++REFRESH(); ++REFRESH();
M1() = false; M1() = false;
} }
@ -762,10 +762,10 @@ void EightBit::Z80::executeCB(const int x, const int y, const int z) {
adjustSZP<Z80>(f, operand); adjustSZP<Z80>(f, operand);
if (LIKELY(!m_displaced)) { if (LIKELY(!m_displaced)) {
R(z, a, operand); R(z, a, operand);
if (z == 6) if (UNLIKELY(z == 6))
addCycles(7); addCycles(7);
} else { } else {
if (z != 6) if (LIKELY(z != 6))
R2(z, a, operand); R2(z, a, operand);
setByte(operand); setByte(operand);
addCycles(15); addCycles(15);
@ -776,7 +776,7 @@ void EightBit::Z80::executeCB(const int x, const int y, const int z) {
addCycles(8); addCycles(8);
if (LIKELY(!m_displaced)) { if (LIKELY(!m_displaced)) {
const auto operand = bit(f, y, R(z, a)); const auto operand = bit(f, y, R(z, a));
if (z == 6) { if (UNLIKELY(z == 6)) {
adjustXY<Z80>(f, MEMPTR().high); adjustXY<Z80>(f, MEMPTR().high);
addCycles(4); addCycles(4);
} else { } else {
@ -792,7 +792,7 @@ void EightBit::Z80::executeCB(const int x, const int y, const int z) {
addCycles(8); addCycles(8);
if (LIKELY(!m_displaced)) { if (LIKELY(!m_displaced)) {
R(z, a, res(y, R(z, a))); R(z, a, res(y, R(z, a)));
if (z == 6) if (UNLIKELY(z == 6))
addCycles(7); addCycles(7);
} else { } else {
auto operand = getByte(displacedAddress()); auto operand = getByte(displacedAddress());
@ -806,7 +806,7 @@ void EightBit::Z80::executeCB(const int x, const int y, const int z) {
addCycles(8); addCycles(8);
if (LIKELY(!m_displaced)) { if (LIKELY(!m_displaced)) {
R(z, a, set(y, R(z, a))); R(z, a, set(y, R(z, a)));
if (z == 6) if (UNLIKELY(z == 6))
addCycles(7); addCycles(7);
} else { } else {
auto operand = getByte(displacedAddress()); auto operand = getByte(displacedAddress());
@ -835,7 +835,7 @@ void EightBit::Z80::executeED(const int x, const int y, const int z, const int p
MEMPTR() = BUS().ADDRESS() = BC(); MEMPTR() = BUS().ADDRESS() = BC();
MEMPTR().word++; MEMPTR().word++;
readPort(); readPort();
if (y != 6) // IN r[y],(C) if (LIKELY(y != 6)) // IN r[y],(C)
R(y, a, BUS().DATA()); R(y, a, BUS().DATA());
adjustSZPXY<Z80>(f, BUS().DATA()); adjustSZPXY<Z80>(f, BUS().DATA());
clearFlag(f, NF | HC); clearFlag(f, NF | HC);
@ -844,7 +844,7 @@ void EightBit::Z80::executeED(const int x, const int y, const int z, const int p
case 1: // Output to port with 16-bit address case 1: // Output to port with 16-bit address
MEMPTR() = BUS().ADDRESS() = BC(); MEMPTR() = BUS().ADDRESS() = BC();
MEMPTR().word++; MEMPTR().word++;
if (y == 6) // OUT (C),0 if (UNLIKELY(y == 6)) // OUT (C),0
BUS().placeDATA(0); BUS().placeDATA(0);
else // OUT (C),r[y] else // OUT (C),r[y]
BUS().placeDATA(R(y, a)); BUS().placeDATA(R(y, a));
@ -1073,7 +1073,7 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
addCycles(4); addCycles(4);
break; break;
case 2: // DJNZ d case 2: // DJNZ d
if (jrConditional(--B())) if (LIKELY(jrConditional(--B())))
addCycles(5); addCycles(5);
addCycles(8); addCycles(8);
break; break;
@ -1199,7 +1199,7 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
decrement(f, operand); decrement(f, operand);
R(y, a, operand); R(y, a, operand);
addCycles(4); addCycles(4);
if (y == 6) if (UNLIKELY(y == 6))
addCycles(7); addCycles(7);
break; break;
} case 6: // 8-bit load immediate } case 6: // 8-bit load immediate
@ -1207,7 +1207,7 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
fetchDisplacement(); fetchDisplacement();
R(y, a, fetchByte()); // LD r,n R(y, a, fetchByte()); // LD r,n
addCycles(7); addCycles(7);
if (y == 6) if (UNLIKELY(y == 6))
addCycles(3); addCycles(3);
break; break;
case 7: // Assorted operations on accumulator/flags case 7: // Assorted operations on accumulator/flags
@ -1264,7 +1264,7 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
break; break;
} }
} }
if (y == 6) { if (UNLIKELY(y == 6)) {
fetchDisplacement(); fetchDisplacement();
switch (z) { switch (z) {
case 4: case 4:
@ -1278,9 +1278,9 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
} }
} }
} }
if (normal) if (LIKELY(normal))
R(y, a, R(z, a)); R(y, a, R(z, a));
if ((y == 6) || (z == 6)) // M operations if (UNLIKELY((y == 6) || (z == 6))) // M operations
addCycles(3); addCycles(3);
} }
addCycles(4); addCycles(4);
@ -1317,7 +1317,7 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
UNREACHABLE; UNREACHABLE;
} }
addCycles(4); addCycles(4);
if (z == 6) if (UNLIKELY(z == 6))
addCycles(3); addCycles(3);
break; break;
case 3: case 3: