mirror of
https://github.com/MoleskiCoder/EightBit.git
synced 2025-01-11 17:29:57 +00:00
Add some GB IO register information in the disassembler. Nothing fancy!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
This commit is contained in:
parent
1eb127ed72
commit
711d4f4384
@ -20,10 +20,18 @@ namespace EightBit {
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static std::string hex(uint16_t value);
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static std::string hex(uint16_t value);
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static std::string binary(uint8_t value);
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static std::string binary(uint8_t value);
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static std::string decimal(uint8_t value);
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static std::string decimal(uint8_t value);
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static std::string io(uint8_t value);
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static std::string invalid(uint8_t value);
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static std::string invalid(uint8_t value);
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private:
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private:
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enum IoRegister {
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Abbreviated, // FF00 + dd
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Absolute, // FFdd
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Register, // C
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Unused, // Unused!
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};
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mutable boost::format m_formatter;
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mutable boost::format m_formatter;
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bool m_prefixCB;
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bool m_prefixCB;
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@ -44,6 +52,7 @@ namespace EightBit {
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uint16_t pc,
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uint16_t pc,
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std::string& specification,
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std::string& specification,
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int& dumpCount,
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int& dumpCount,
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IoRegister& ioRegister,
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int x, int y, int z,
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int x, int y, int z,
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int p, int q);
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int p, int q);
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@ -167,6 +167,7 @@ void EightBit::Disassembler::disassemble(std::ostringstream& output, LR35902& cp
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auto indexedImmediate = memory.peek(pc + 1);
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auto indexedImmediate = memory.peek(pc + 1);
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auto dumpCount = 0;
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auto dumpCount = 0;
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auto ioRegister = IoRegister::Unused;
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std::string specification = "";
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std::string specification = "";
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@ -178,7 +179,7 @@ void EightBit::Disassembler::disassemble(std::ostringstream& output, LR35902& cp
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else
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else
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disassembleOther(
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disassembleOther(
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output, cpu, pc,
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output, cpu, pc,
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specification, dumpCount,
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specification, dumpCount, ioRegister,
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x, y, z, p, q);
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x, y, z, p, q);
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for (int i = 0; i < dumpCount; ++i)
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for (int i = 0; i < dumpCount; ++i)
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@ -187,6 +188,22 @@ void EightBit::Disassembler::disassemble(std::ostringstream& output, LR35902& cp
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output << '\t';
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output << '\t';
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m_formatter.parse(specification);
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m_formatter.parse(specification);
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output << m_formatter % (int)immediate % (int)absolute % relative % (int)displacement % indexedImmediate;
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output << m_formatter % (int)immediate % (int)absolute % relative % (int)displacement % indexedImmediate;
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switch (ioRegister) {
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case Abbreviated:
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output << "; register " << io(immediate);
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break;
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case Absolute:
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output << "; register (Absolute)";
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break;
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case Register:
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output << "; register C:" << io(cpu.C());
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break;
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case Unused:
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break;
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default:
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__assume(0);
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}
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}
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}
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void EightBit::Disassembler::disassembleCB(
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void EightBit::Disassembler::disassembleCB(
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@ -245,6 +262,7 @@ void EightBit::Disassembler::disassembleOther(
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uint16_t pc,
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uint16_t pc,
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std::string& specification,
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std::string& specification,
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int& dumpCount,
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int& dumpCount,
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IoRegister& ioRegister,
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int x, int y, int z,
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int x, int y, int z,
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int p, int q) {
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int p, int q) {
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@ -392,6 +410,7 @@ void EightBit::Disassembler::disassembleOther(
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break;
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break;
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case 4:
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case 4:
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specification = "LD (FF00H+%1$02XH),A";
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specification = "LD (FF00H+%1$02XH),A";
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ioRegister = IoRegister::Abbreviated;
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dumpCount++;
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dumpCount++;
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break;
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break;
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case 5:
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case 5:
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@ -400,6 +419,7 @@ void EightBit::Disassembler::disassembleOther(
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break;
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break;
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case 6:
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case 6:
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specification = "LD A,(FF00H+%1$02XH)";
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specification = "LD A,(FF00H+%1$02XH)";
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ioRegister = IoRegister::Abbreviated;
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dumpCount++;
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dumpCount++;
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break;
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break;
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case 7:
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case 7:
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@ -441,6 +461,7 @@ void EightBit::Disassembler::disassembleOther(
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break;
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break;
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case 4:
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case 4:
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specification = "LD (FF00H+C),A";
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specification = "LD (FF00H+C),A";
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ioRegister = IoRegister::Register;
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break;
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break;
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case 5:
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case 5:
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specification = "LD (%2$04XH),A";
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specification = "LD (%2$04XH),A";
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@ -448,6 +469,7 @@ void EightBit::Disassembler::disassembleOther(
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break;
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break;
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case 6:
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case 6:
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specification = "LD A,(FF00H+C)";
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specification = "LD A,(FF00H+C)";
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ioRegister = IoRegister::Register;
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break;
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break;
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case 7:
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case 7:
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specification = "LD A,(%2$04XH)";
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specification = "LD A,(%2$04XH)";
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@ -551,4 +573,113 @@ std::string EightBit::Disassembler::invalid(uint8_t value) {
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std::ostringstream output;
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std::ostringstream output;
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output << "Invalid instruction: " << hex(value) << "(" << binary(value) << ")";
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output << "Invalid instruction: " << hex(value) << "(" << binary(value) << ")";
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return output.str();
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return output.str();
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}
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}
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std::string EightBit::Disassembler::io(uint8_t value) {
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switch (value) {
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// Port/Mode Registers
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case Bus::P1:
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return "P1";
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case Bus::SB:
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return "SB";
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case Bus::SC:
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return "SC";
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case Bus::DIV:
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return "DIV";
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case Bus::TIMA:
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return "TIMA";
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case Bus::TMA:
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return "TMA";
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case Bus::TAC:
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return "TAC";
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// Interrupt Flags
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case Bus::IF:
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return "IF";
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case Bus::IE:
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return "IE";
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// LCD Display Registers
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case Bus::LCDC:
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return "LCDC";
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case Bus::STAT:
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return "STAT";
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case Bus::SCY:
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return "SCY";
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case Bus::SCX:
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return "SCX";
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case Bus::LY:
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return "LY";
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case Bus::LYC:
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return "LYC";
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case Bus::DMA:
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return "DMA";
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case Bus::BGP:
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return "BGP";
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case Bus::OBP0:
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return "OBP0";
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case Bus::OBP1:
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return "OBP1";
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case Bus::WY:
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return "WY";
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case Bus::WX:
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return "WX";
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// Sound Registers
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case Bus::NR10:
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return "NR10";
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case Bus::NR11:
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return "NR11";
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case Bus::NR12:
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return "NR12";
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case Bus::NR13:
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return "NR13";
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case Bus::NR14:
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return "NR14";
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case Bus::NR21:
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return "NR21";
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case Bus::NR22:
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return "NR22";
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case Bus::NR23:
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return "NR23";
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case Bus::NR24:
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return "NR24";
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case Bus::NR30:
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return "NR30";
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case Bus::NR31:
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return "NR31";
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case Bus::NR32:
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return "NR32";
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case Bus::NR33:
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return "NR33";
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case Bus::NR34:
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return "NR34";
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case Bus::NR41:
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return "NR41";
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case Bus::NR42:
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return "NR42";
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case Bus::NR43:
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return "NR43";
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case Bus::NR44:
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return "NR44";
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case Bus::NR50:
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return "NR50";
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case Bus::NR51:
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return "NR51";
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case Bus::NR52:
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return "NR52";
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case Bus::WPRAM_START:
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return "WPRAM_START";
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case Bus::WPRAM_END:
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return "WPRAM_END";
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// Boot rom control
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case Bus::BOOT_DISABLE:
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return "BOOT_DISABLE";
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default:
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return hex(value);
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}
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}
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