From b7b7c93a77a4b774d0d7acc3dc2040c61dfd8c0f Mon Sep 17 00:00:00 2001 From: Adrian Conlon Date: Sun, 6 Jan 2019 22:34:53 +0000 Subject: [PATCH] This tidies the last of 6502 cycle accurate instruction implementations. Signed-off-by: Adrian Conlon --- M6502/src/mos6502.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/M6502/src/mos6502.cpp b/M6502/src/mos6502.cpp index 8efb3e9..cabed23 100644 --- a/M6502/src/mos6502.cpp +++ b/M6502/src/mos6502.cpp @@ -107,7 +107,7 @@ int EightBit::MOS6502::execute() { case 0x08: busRead(); php(); break; // PHP (implied) case 0x09: A() = orr(A(), AM_Immediate()); break; // ORA (immediate) case 0x0a: busRead(); A() = asl(A()); break; // ASL A (implied) - case 0x0b: addCycle(); anc(AM_Immediate()); break; // *ANC (immediate) + case 0x0b: anc(AM_Immediate()); break; // *ANC (immediate) case 0x0c: AM_Absolute(); break; // *NOP (absolute) case 0x0d: A() = orr(A(), AM_Absolute()); break; // ORA (absolute) case 0x0e: busReadModifyWrite(asl(AM_Absolute())); break; // ASL (absolute) @@ -141,7 +141,7 @@ int EightBit::MOS6502::execute() { case 0x28: busRead(); getBytePaged(1, S()); plp(); break; // PLP (implied) case 0x29: A() = andr(A(), AM_Immediate()); break; // AND (immediate) case 0x2a: busRead(); A() = rol(A()); break; // ROL A (implied) - case 0x2b: addCycle(); anc(AM_Immediate()); break; // *ANC (immediate) + case 0x2b: anc(AM_Immediate()); break; // *ANC (immediate) case 0x2c: bit(A(), AM_Absolute()); break; // BIT (absolute) case 0x2d: A() = andr(A(), AM_Absolute()); break; // AND (absolute) case 0x2e: busReadModifyWrite(rol(AM_Absolute())); break; // ROL (absolute) @@ -209,7 +209,7 @@ int EightBit::MOS6502::execute() { case 0x68: busRead(); getBytePaged(1, S()); A() = through(pop()); break; // PLA (implied) case 0x69: A() = adc(A(), AM_Immediate()); break; // ADC (immediate) case 0x6a: busRead(); A() = ror(A()); break; // ROR A (implied) - case 0x6b: addCycle(); arr(AM_Immediate()); break; // *ARR (immediate) + case 0x6b: arr(AM_Immediate()); break; // *ARR (immediate) case 0x6c: jump(Address_Indirect()); break; // JMP (indirect) case 0x6d: A() = adc(A(), AM_Absolute()); break; // ADC (absolute) case 0x6e: busReadModifyWrite(ror(AM_Absolute())); break; // ROR (absolute)