From beca76d73361c571cad7a5150989bc43010a68ca Mon Sep 17 00:00:00 2001 From: "Adrian.Conlon" Date: Fri, 21 Jul 2017 13:33:17 +0100 Subject: [PATCH] Share instruction decoding mechanism between Intel derived processors. Signed-off-by: Adrian.Conlon --- LR35902/src/LR35902.cpp | 46 ++++++++++++++++++++++++++++++++++++----- Z80/inc/Z80.h | 23 --------------------- Z80/src/Z80.cpp | 6 +----- inc/IntelProcessor.h | 27 ++++++++++++++++++++++++ src/IntelProcessor.cpp | 5 +++++ 5 files changed, 74 insertions(+), 33 deletions(-) diff --git a/LR35902/src/LR35902.cpp b/LR35902/src/LR35902.cpp index 6f21dbc..e52ac2a 100644 --- a/LR35902/src/LR35902.cpp +++ b/LR35902/src/LR35902.cpp @@ -383,12 +383,14 @@ int EightBit::LR35902::step() { int EightBit::LR35902::execute(uint8_t opcode) { - auto x = (opcode & 0b11000000) >> 6; - auto y = (opcode & 0b111000) >> 3; - auto z = (opcode & 0b111); + const auto& decoded = getDecodedOpcode(opcode); - auto p = (y & 0b110) >> 1; - auto q = (y & 1); + auto x = decoded.x; + auto y = decoded.y; + auto z = decoded.z; + + auto p = decoded.p; + auto q = decoded.q; if (m_prefixCB) executeCB(x, y, z, p, q); @@ -431,6 +433,8 @@ void EightBit::LR35902::executeCB(int x, int y, int z, int p, int q) { case 7: adjustZero(f, srl(f, R(z, a))); break; + default: + __assume(0); } cycles += 2; if (z == 6) { @@ -462,6 +466,8 @@ void EightBit::LR35902::executeCB(int x, int y, int z, int p, int q) { cycles += 2; } break; + default: + __assume(0); } } @@ -497,6 +503,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) { cycles++; cycles += 2; break; + default: + __assume(0); } break; case 1: // 16-bit load immediate/add @@ -509,6 +517,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) { add(f, HL(), RP(p)); cycles += 2; break; + default: + __assume(0); } break; case 2: // Indirect loading @@ -531,6 +541,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) { m_memory.write(HL().word--, a); cycles += 2; break; + default: + __assume(0); } break; case 1: @@ -551,6 +563,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) { a = m_memory.read(HL().word--); cycles += 2; break; + default: + __assume(0); } break; } @@ -563,6 +577,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) { case 1: // DEC rp --RP(p).word; break; + default: + __assume(0); } cycles += 2; break; @@ -614,6 +630,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) { case 7: ccf(a, f); break; + default: + __assume(0); } cycles++; break; @@ -660,6 +678,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) { case 7: // CP r compare(f, a, R(z, a)); break; + default: + __assume(0); } cycles++; if (z == 6) { @@ -709,6 +729,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) { } cycles += 3; break; + default: + __assume(0); } break; case 1: // POP & various ops @@ -735,7 +757,12 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) { SP() = HL(); cycles += 2; break; + default: + __assume(0); } + break; + default: + __assume(0); } break; case 2: // Conditional jump @@ -765,6 +792,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) { a = m_bus.read(MEMPTR().word); cycles += 4; break; + default: + __assume(0); } break; case 3: // Assorted operations @@ -807,6 +836,9 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) { cycles += 6; break; } + break; + default: + __assume(0); } break; case 6: // Operate on accumulator and immediate operand: alu[y] n @@ -835,6 +867,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) { case 7: // CP n compare(f, a, fetchByte()); break; + default: + __assume(0); } cycles += 2; break; @@ -842,6 +876,8 @@ void EightBit::LR35902::executeOther(int x, int y, int z, int p, int q) { restart(y << 3); cycles += 4; break; + default: + __assume(0); } break; } diff --git a/Z80/inc/Z80.h b/Z80/inc/Z80.h index b27b73d..fe32944 100644 --- a/Z80/inc/Z80.h +++ b/Z80/inc/Z80.h @@ -29,27 +29,6 @@ namespace EightBit { } }; - struct opcode_decoded_t { - - int x; - int y; - int z; - int p; - int q; - - opcode_decoded_t() { - x = y = z = p = q = 0; - } - - opcode_decoded_t(uint8_t opcode) { - x = (opcode & 0b11000000) >> 6; // 0 - 3 - y = (opcode & 0b00111000) >> 3; // 0 - 7 - z = (opcode & 0b00000111); // 0 - 7 - p = (y & 0b110) >> 1; // 0 - 3 - q = (y & 1); // 0 - 1 - } - }; - enum StatusBits { SF = Bit7, ZF = Bit6, @@ -154,8 +133,6 @@ namespace EightBit { int8_t m_displacement; bool m_displaced; - std::array m_decodedOpcodes; - int fetchExecute() { M1() = true; return execute(fetchByte()); diff --git a/Z80/src/Z80.cpp b/Z80/src/Z80.cpp index 87956dd..f855525 100644 --- a/Z80/src/Z80.cpp +++ b/Z80/src/Z80.cpp @@ -34,10 +34,6 @@ void EightBit::Z80::initialise() { IntelProcessor::initialise(); - for (int i = 0; i < 0x100; ++i) { - m_decodedOpcodes[i] = i; - } - IM() = 0; AF().word = 0xffff; @@ -774,7 +770,7 @@ int EightBit::Z80::execute(uint8_t opcode) { M1() = false; } - const auto& decoded = m_decodedOpcodes[opcode]; + const auto& decoded = getDecodedOpcode(opcode); auto x = decoded.x; auto y = decoded.y; diff --git a/inc/IntelProcessor.h b/inc/IntelProcessor.h index 92c5063..088c0b6 100644 --- a/inc/IntelProcessor.h +++ b/inc/IntelProcessor.h @@ -9,6 +9,31 @@ namespace EightBit { class IntelProcessor : public Processor { public: + struct opcode_decoded_t { + + int x; + int y; + int z; + int p; + int q; + + opcode_decoded_t() { + x = y = z = p = q = 0; + } + + opcode_decoded_t(uint8_t opcode) { + x = (opcode & 0b11000000) >> 6; // 0 - 3 + y = (opcode & 0b00111000) >> 3; // 0 - 7 + z = (opcode & 0b00000111); // 0 - 7 + p = (y & 0b110) >> 1; // 0 - 3 + q = (y & 1); // 0 - 1 + } + }; + + const opcode_decoded_t& getDecodedOpcode(const int i) const { + return m_decodedOpcodes[i]; + } + register16_t& MEMPTR() { return m_memptr; } virtual void initialise(); @@ -203,6 +228,8 @@ namespace EightBit { } private: + std::array m_decodedOpcodes; + register16_t m_memptr; register16_t sp; }; diff --git a/src/IntelProcessor.cpp b/src/IntelProcessor.cpp index 042bffc..d49abe6 100644 --- a/src/IntelProcessor.cpp +++ b/src/IntelProcessor.cpp @@ -9,6 +9,11 @@ EightBit::IntelProcessor::IntelProcessor(Memory& memory) void EightBit::IntelProcessor::initialise() { Processor::initialise(); + + for (int i = 0; i < 0x100; ++i) { + m_decodedOpcodes[i] = i; + } + MEMPTR().word = 0; SP().word = 0xffff; }