Reflect that the I/O for Intel style processors isn't part of the CPU, but attached to the Bus and access controlled by the CPU.

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
This commit is contained in:
Adrian Conlon committed 2020-02-09 11:51:58 +00:00
1 parent dc37d61797
commit c8bdabf34f
24 files changed
+410 -279

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+27 -12
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@@ -6,7 +6,6 @@
#include <stdexcept>
#include <Bus.h>
#include <InputOutput.h>
#include <IntelProcessor.h>
#include <EventArgs.h>
#include <Signal.h>
@@ -23,7 +22,7 @@ namespace EightBit {
CF = Bit0,
};
Intel8080(Bus& bus, InputOutput& ports);
Intel8080(Bus& bus);
Signal<Intel8080> ExecutingInstruction;
Signal<Intel8080> ExecutedInstruction;
@@ -36,14 +35,30 @@ namespace EightBit {
virtual register16_t& DE() final;
virtual register16_t& HL() final;
bool requestingIO() { return m_requestIO; }
bool requestingMemory() { return m_requestMemory; }
bool requestingRead() { return raised(DBIN()); }
bool requestingWrite() { return lowered(WR()); }
DECLARE_PIN_OUTPUT(DBIN) // Active high
DECLARE_PIN_OUTPUT(WR) // Active low
protected:
virtual void handleRESET() final;
virtual void handleINT() final;
void handleRESET() final;
void handleINT() final;
void memoryWrite() final;
uint8_t memoryRead() final;
void busWrite() final;
uint8_t busRead() final;
private:
bool m_interruptEnable = false;
bool m_requestIO = false;
bool m_requestMemory = false;
InputOutput& m_ports;
bool m_interruptEnable = false;
register16_t af;
register16_t bc = Mask16;
@@ -65,7 +80,7 @@ namespace EightBit {
case 0b101:
return L();
case 0b110:
return busRead(HL());
return IntelProcessor::memoryRead(HL());
case 0b111:
return A();
default:
@@ -94,7 +109,7 @@ namespace EightBit {
L() = value;
break;
case 0b110:
busWrite(HL(), value);
IntelProcessor::memoryWrite(HL(), value);
break;
case 0b111:
A() = value;
@@ -179,10 +194,10 @@ namespace EightBit {
void xhtl(register16_t& exchange);
void writePort(uint8_t port);
void writePort();
void portWrite(uint8_t port);
void portWrite();
uint8_t readPort(uint8_t port);
uint8_t readPort();
uint8_t portRead(uint8_t port);
uint8_t portRead();
};
}
+56 -25
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@@ -1,11 +1,13 @@
#include "stdafx.h"
#include "Intel8080.h"
EightBit::Intel8080::Intel8080(Bus& bus, InputOutput& ports)
: IntelProcessor(bus),
m_ports(ports) {
EightBit::Intel8080::Intel8080(Bus& bus)
: IntelProcessor(bus){
}
DEFINE_PIN_LEVEL_CHANGERS(DBIN, Intel8080);
DEFINE_PIN_LEVEL_CHANGERS(WR, Intel8080);
EightBit::register16_t& EightBit::Intel8080::AF() {
af.low = (af.low | Bit1) & ~(Bit5 | Bit3);
return af;
@@ -23,6 +25,31 @@ EightBit::register16_t& EightBit::Intel8080::HL() {
return hl;
}
void EightBit::Intel8080::memoryWrite() {
m_requestMemory = true;
IntelProcessor::memoryWrite();
m_requestMemory = false;
}
uint8_t EightBit::Intel8080::memoryRead() {
m_requestMemory = true;
return IntelProcessor::memoryRead();
m_requestMemory = false;
}
void EightBit::Intel8080::busWrite() {
lowerWR();
IntelProcessor::busWrite();
raiseWR();
}
uint8_t EightBit::Intel8080::busRead() {
raiseDBIN();
const auto returned = IntelProcessor::busRead();
lowerDBIN();
return returned;
}
void EightBit::Intel8080::handleRESET() {
IntelProcessor::handleRESET();
di();
@@ -236,33 +263,37 @@ void EightBit::Intel8080::cmc() {
}
void EightBit::Intel8080::xhtl(register16_t& exchange) {
MEMPTR().low = busRead(SP());
MEMPTR().low = IntelProcessor::memoryRead(SP());
++BUS().ADDRESS();
MEMPTR().high = busRead();
busWrite(exchange.high);
MEMPTR().high = memoryRead();
IntelProcessor::memoryWrite(exchange.high);
exchange.high = MEMPTR().high;
--BUS().ADDRESS();
busWrite(exchange.low);
IntelProcessor::memoryWrite(exchange.low);
exchange.low = MEMPTR().low;
}
void EightBit::Intel8080::writePort(const uint8_t port) {
BUS().ADDRESS() = register16_t(port, A());
BUS().DATA() = A();
writePort();
void EightBit::Intel8080::portWrite(const uint8_t port) {
BUS().ADDRESS() = { port, port };
portWrite();
}
void EightBit::Intel8080::writePort() {
m_ports.write(BUS().ADDRESS().low, BUS().DATA());
void EightBit::Intel8080::portWrite() {
m_requestIO = true;
busWrite();
m_requestIO = false;
}
uint8_t EightBit::Intel8080::readPort(const uint8_t port) {
BUS().ADDRESS() = register16_t(port, A());
return readPort();
uint8_t EightBit::Intel8080::portRead(const uint8_t port) {
BUS().ADDRESS() = { port, port };
return portRead();
}
uint8_t EightBit::Intel8080::readPort() {
return BUS().DATA() = m_ports.read(BUS().ADDRESS().low);
uint8_t EightBit::Intel8080::portRead() {
m_requestIO = true;
const auto returned = busRead();
m_requestIO = false;
return returned;
}
int EightBit::Intel8080::step() {
@@ -330,11 +361,11 @@ void EightBit::Intel8080::execute(const int x, const int y, const int z, const i
case 0:
switch (p) {
case 0: // LD (BC),A
busWrite(BC(), A());
IntelProcessor::memoryWrite(BC(), A());
tick(7);
break;
case 1: // LD (DE),A
busWrite(DE(), A());
IntelProcessor::memoryWrite(DE(), A());
tick(7);
break;
case 2: // LD (nn),HL
@@ -344,7 +375,7 @@ void EightBit::Intel8080::execute(const int x, const int y, const int z, const i
break;
case 3: // LD (nn),A
BUS().ADDRESS() = fetchWord();
busWrite(A());
IntelProcessor::memoryWrite(A());
tick(13);
break;
default:
@@ -354,11 +385,11 @@ void EightBit::Intel8080::execute(const int x, const int y, const int z, const i
case 1:
switch (p) {
case 0: // LD A,(BC)
A() = busRead(BC());
A() = IntelProcessor::memoryRead(BC());
tick(7);
break;
case 1: // LD A,(DE)
A() = busRead(DE());
A() = IntelProcessor::memoryRead(DE());
tick(7);
break;
case 2: // LD HL,(nn)
@@ -534,11 +565,11 @@ void EightBit::Intel8080::execute(const int x, const int y, const int z, const i
tick(10);
break;
case 2: // OUT (n),A
writePort(fetchByte());
portWrite(fetchByte());
tick(11);
break;
case 3: // IN A,(n)
A() = readPort(fetchByte());
A() = portRead(fetchByte());
tick(11);
break;
case 4: // EX (SP),HL
+1 -1
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@@ -6,7 +6,7 @@
Board::Board(const Configuration& configuration)
: m_configuration(configuration),
m_cpu(EightBit::Intel8080(*this, m_ports)),
m_cpu(EightBit::Intel8080(*this)),
m_disassembler(*this) {
}