Lots of miscellaneous cycle accurate updates

src/IntelProcessor.cpp

@@ -4,7 +4,7 @@
 std::array<int, 8> EightBit::IntelProcessor::m_halfCarryTableAdd = { { 0, 0, 1, 0, 1, 0, 1, 1 } };
 std::array<int, 8> EightBit::IntelProcessor::m_halfCarryTableSub = { { 0, 1, 1, 1, 0, 0, 0, 1 } };
 
-EightBit::IntelProcessor::IntelProcessor(Bus& bus)
+EightBit::IntelProcessor::IntelProcessor(Bus& bus) noexcept
 : LittleEndianProcessor(bus) {
 	for (int i = 0; i < 0x100; ++i)
 		m_decodedOpcodes.at(i) = i;
@@ -17,11 +17,9 @@ EightBit::IntelProcessor::IntelProcessor(Bus& bus)
 }
 
 EightBit::IntelProcessor::IntelProcessor(const IntelProcessor& rhs) noexcept
-: LittleEndianProcessor(rhs) {
-
-	m_sp = rhs.m_sp;
-	m_memptr = rhs.m_memptr;
-
+: LittleEndianProcessor(rhs),
+  m_sp(rhs.m_sp),
+  m_memptr(rhs.m_memptr) {
 	HALT() = rhs.HALT();
 }
 
@@ -31,73 +29,72 @@ void EightBit::IntelProcessor::resetWorkingRegisters() noexcept {
 
 DEFINE_PIN_LEVEL_CHANGERS(HALT, IntelProcessor);
 
-void EightBit::IntelProcessor::handleRESET() {
+void EightBit::IntelProcessor::handleRESET() noexcept {
 	Processor::handleRESET();
 	disableInterrupts();
 	Processor::jump(0);
 }
 
-void EightBit::IntelProcessor::handleINT() {
+void EightBit::IntelProcessor::handleINT() noexcept {
 	Processor::handleINT();
-	disableInterrupts();
 	raiseHALT();
+	disableInterrupts();
 }
 
-void EightBit::IntelProcessor::push(const uint8_t value) {
+void EightBit::IntelProcessor::push(const uint8_t value) noexcept {
 	memoryWrite(--SP(), value);
 }
 
-uint8_t EightBit::IntelProcessor::pop() {
+uint8_t EightBit::IntelProcessor::pop() noexcept {
 	return memoryRead(SP()++);
 }
 
-
-EightBit::register16_t& EightBit::IntelProcessor::incrementPC() {
-	if (raised(HALT()))
+EightBit::register16_t& EightBit::IntelProcessor::incrementPC() noexcept {
+	if (proceeding())
 		Processor::incrementPC();
 	return PC();
 }
 
-uint8_t EightBit::IntelProcessor::fetchInstruction() {
+uint8_t EightBit::IntelProcessor::fetchInstruction() noexcept {
 	const auto data = fetchByte();
-	return lowered(HALT()) ? (uint8_t)0 : data;
+	return proceeding() ? data : (uint8_t)0;
 }
 
-EightBit::register16_t EightBit::IntelProcessor::getWord() {
+EightBit::register16_t EightBit::IntelProcessor::getWord() noexcept {
 	const auto returned = LittleEndianProcessor::getWord();
 	MEMPTR() = BUS().ADDRESS();
 	return returned;
 }
 
-void EightBit::IntelProcessor::setWord(const register16_t value) {
+void EightBit::IntelProcessor::setWord(const register16_t value) noexcept {
 	LittleEndianProcessor::setWord(value);
 	MEMPTR() = BUS().ADDRESS();
 }
 
-void EightBit::IntelProcessor::restart(const uint8_t address) {
+void EightBit::IntelProcessor::restart(const uint8_t address) noexcept {
 	MEMPTR() = { address, 0 };
 	call();
 }
 
-void EightBit::IntelProcessor::callConditional(bool condition) {
+void EightBit::IntelProcessor::callConditional(bool condition) noexcept {
 	MEMPTR() = fetchWord();
 	if (condition)
 		call();
 }
 
-void EightBit::IntelProcessor::jumpConditional(bool condition) {
+void EightBit::IntelProcessor::jumpConditional(bool condition) noexcept {
 	MEMPTR() = fetchWord();
 	if (condition)
 		jump();
 }
 
-void EightBit::IntelProcessor::jumpRelativeConditional(bool condition) {
+void EightBit::IntelProcessor::jumpRelativeConditional(bool condition) noexcept {
 	const auto offset = fetchByte();
 	if (condition)
 		jumpRelative(offset);
 }
 
-void EightBit::IntelProcessor::returnConditional(bool condition) {
+void EightBit::IntelProcessor::returnConditional(bool condition) noexcept {
 	if (condition)
 		ret();
 }
@@ -107,42 +104,63 @@ void EightBit::IntelProcessor::jumpRelative(const int8_t offset) noexcept {
 	jump();
 }
 
-
-void EightBit::IntelProcessor::ret() {
+void EightBit::IntelProcessor::ret() noexcept {
 	LittleEndianProcessor::ret();
 	MEMPTR() = PC();
 }
 
-void EightBit::IntelProcessor::jumpIndirect() {
+void EightBit::IntelProcessor::jumpIndirect() noexcept {
 	MEMPTR() = fetchWord();
 	jump();
 }
 
-void EightBit::IntelProcessor::jump() {
+void EightBit::IntelProcessor::jump() noexcept {
 	Processor::jump(MEMPTR());
 }
 
-void EightBit::IntelProcessor::callIndirect() {
+void EightBit::IntelProcessor::callIndirect() noexcept {
 	MEMPTR() = fetchWord();
 	call();
 }
 
-void EightBit::IntelProcessor::call() {
+void EightBit::IntelProcessor::call() noexcept {
 	call(MEMPTR());
 }
 
-void EightBit::IntelProcessor::call(register16_t destination) {
+void EightBit::IntelProcessor::call(register16_t destination) noexcept {
 	Processor::call(destination);
 }
 
+void EightBit::IntelProcessor::jumpConditionalFlag(int flag) noexcept {
+	jumpConditional(convertCondition(flag));
+}
+
+void EightBit::IntelProcessor::jumpRelativeConditionalFlag(int flag) noexcept {
+	jumpRelativeConditional(convertCondition(flag));
+}
+
+void EightBit::IntelProcessor::returnConditionalFlag(int flag) noexcept {
+	returnConditional(convertCondition(flag));
+}
+
+void EightBit::IntelProcessor::callConditionalFlag(int flag) noexcept {
+	callConditional(convertCondition(flag));
+}
+
+void EightBit::IntelProcessor::cpl() noexcept {
+	A() = ~A();
+}
+
 bool EightBit::IntelProcessor::operator==(const EightBit::IntelProcessor& rhs) const noexcept {
+	auto& left = const_cast<IntelProcessor&>(*this);
+	auto& right = const_cast<IntelProcessor&>(rhs);
 	return
 		LittleEndianProcessor::operator==(rhs)
-		&& HALT() == rhs.HALT()
-		&& MEMPTR() == rhs.MEMPTR()
-		&& SP() == rhs.SP()
-		&& AF() == rhs.AF()
-		&& BC() == rhs.BC()
-		&& DE() == rhs.DE()
-		&& HL() == rhs.HL();
+		&& left.HALT() == right.HALT()
+		&& left.MEMPTR() == right.MEMPTR()
+		&& left.SP() == right.SP()
+		&& left.AF() == right.AF()
+		&& left.BC() == right.BC()
+		&& left.DE() == right.DE()
+		&& left.HL() == right.HL();
 }