mirror of
https://github.com/MoleskiCoder/EightBit.git
synced 2025-01-20 00:29:54 +00:00
MEMPTR is really only a concept of Intel style processors.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
This commit is contained in:
parent
97a121b8d4
commit
d818095815
@ -529,8 +529,7 @@ void EightBit::Intel8080::execute(uint8_t& a, uint8_t& f, int x, int y, int z, i
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case 3: // Assorted operations
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case 3: // Assorted operations
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switch (y) {
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switch (y) {
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case 0: // JP nn
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case 0: // JP nn
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MEMPTR() = fetchWord();
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jump(MEMPTR() = fetchWord());
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jump();
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addCycles(10);
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addCycles(10);
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break;
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break;
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case 2: // OUT (n),A
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case 2: // OUT (n),A
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@ -573,8 +572,7 @@ void EightBit::Intel8080::execute(uint8_t& a, uint8_t& f, int x, int y, int z, i
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case 1:
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case 1:
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switch (p) {
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switch (p) {
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case 0: // CALL nn
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case 0: // CALL nn
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MEMPTR() = fetchWord();
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call(MEMPTR() = fetchWord());
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call();
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addCycles(17);
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addCycles(17);
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break;
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break;
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}
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}
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@ -74,59 +74,54 @@ namespace EightBit {
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// Address resolution
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// Address resolution
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void Address_Absolute() {
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register16_t Address_Absolute() {
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MEMPTR() = fetchWord();
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return fetchWord();
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}
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}
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void Address_ZeroPage() {
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uint8_t Address_ZeroPage() {
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MEMPTR().low = fetchByte();
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return fetchByte();
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MEMPTR().high = 0;
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}
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}
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void Address_ZeroPageIndirect() {
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register16_t Address_ZeroPageIndirect() {
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Address_ZeroPage();
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return getWordPaged(0, Address_ZeroPage());
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MEMPTR() = getWordPaged(0, MEMPTR().low);
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}
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}
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void Address_Indirect() {
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register16_t Address_Indirect() {
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Address_Absolute();
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const auto address = Address_Absolute();
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MEMPTR() = getWordPaged(MEMPTR().high, MEMPTR().low);
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return getWordPaged(address.high, address.low);
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}
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}
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void Address_ZeroPageX() {
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uint8_t Address_ZeroPageX() {
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Address_ZeroPage();
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return Address_ZeroPage() + X();
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MEMPTR().low += X();
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}
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}
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void Address_ZeroPageY() {
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uint8_t Address_ZeroPageY() {
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Address_ZeroPage();
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return Address_ZeroPage() + Y();
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MEMPTR().low += Y();
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}
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}
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bool Address_AbsoluteX() {
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std::tuple<register16_t, bool> Address_AbsoluteX() {
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Address_Absolute();
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auto address = Address_Absolute();
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const auto page = MEMPTR().high;
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const auto page = address.high;
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MEMPTR().word += X();
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address.word += X();
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return MEMPTR().high != page;
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return std::tuple<register16_t, bool>(address, address.high != page);
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}
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}
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bool Address_AbsoluteY() {
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std::tuple<register16_t, bool> Address_AbsoluteY() {
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Address_Absolute();
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auto address = Address_Absolute();
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const auto page = MEMPTR().high;
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const auto page = address.high;
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MEMPTR().word += Y();
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address.word += Y();
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return MEMPTR().high != page;
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return std::tuple<register16_t, bool>(address, address.high != page);
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}
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}
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void Address_IndexedIndirectX() {
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register16_t Address_IndexedIndirectX() {
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Address_ZeroPageX();
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return getWordPaged(0, Address_ZeroPageX());
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MEMPTR() = getWordPaged(0, MEMPTR().low);
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}
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}
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bool Address_IndirectIndexedY() {
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std::tuple<register16_t, bool> Address_IndirectIndexedY() {
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Address_ZeroPageIndirect();
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auto address = Address_ZeroPageIndirect();
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const auto page = MEMPTR().high;
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const auto page = address.high;
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MEMPTR().word += Y();
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address.word += Y();
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return MEMPTR().high != page;
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return std::tuple<register16_t, bool>(address, address.high != page);
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}
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}
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// Addressing modes, read
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// Addressing modes, read
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@ -136,88 +131,78 @@ namespace EightBit {
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}
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}
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uint8_t AM_Absolute() {
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uint8_t AM_Absolute() {
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Address_Absolute();
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return BUS().read(Address_Absolute());
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return BUS().read(MEMPTR());
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}
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}
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uint8_t AM_ZeroPage() {
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uint8_t AM_ZeroPage() {
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Address_ZeroPage();
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return BUS().read(Address_ZeroPage());
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return BUS().read(MEMPTR());
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}
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}
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uint8_t AM_AbsoluteX() {
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uint8_t AM_AbsoluteX() {
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if (UNLIKELY(Address_AbsoluteX()))
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const auto ap = Address_AbsoluteX();
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if (UNLIKELY(std::get<1>(ap)))
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addCycle();
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addCycle();
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return BUS().read(MEMPTR());
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return BUS().read(std::get<0>(ap));
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}
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}
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uint8_t AM_AbsoluteY() {
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uint8_t AM_AbsoluteY() {
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if (UNLIKELY(Address_AbsoluteY()))
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const auto ap = Address_AbsoluteY();
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if (UNLIKELY(std::get<1>(ap)))
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addCycle();
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addCycle();
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return BUS().read(MEMPTR());
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return BUS().read(std::get<0>(ap));
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}
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}
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uint8_t AM_ZeroPageX() {
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uint8_t AM_ZeroPageX() {
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Address_ZeroPageX();
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return BUS().read(Address_ZeroPageX());
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return BUS().read(MEMPTR());
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}
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}
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uint8_t AM_ZeroPageY() {
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uint8_t AM_ZeroPageY() {
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Address_ZeroPageY();
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return BUS().read(Address_ZeroPageY());
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return BUS().read(MEMPTR());
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}
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}
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uint8_t AM_IndexedIndirectX() {
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uint8_t AM_IndexedIndirectX() {
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Address_IndexedIndirectX();
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return BUS().read(Address_IndexedIndirectX());
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return BUS().read(MEMPTR());
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}
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}
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uint8_t AM_IndirectIndexedY() {
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uint8_t AM_IndirectIndexedY() {
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if (UNLIKELY(Address_IndirectIndexedY()))
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const auto ap = Address_IndirectIndexedY();
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if (UNLIKELY(std::get<1>(ap)))
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addCycle();
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addCycle();
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return BUS().read(MEMPTR());
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return BUS().read(std::get<0>(ap));
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}
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}
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// Addressing modes, write
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// Addressing modes, write
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void AM_Absolute(uint8_t value) {
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void AM_Absolute(uint8_t value) {
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Address_Absolute();
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BUS().write(Address_Absolute(), value);
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BUS().write(MEMPTR(), value);
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}
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}
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void AM_ZeroPage(uint8_t value) {
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void AM_ZeroPage(uint8_t value) {
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Address_ZeroPage();
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BUS().write(Address_ZeroPage(), value);
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BUS().write(MEMPTR(), value);
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}
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}
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void AM_AbsoluteX(uint8_t value) {
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void AM_AbsoluteX(uint8_t value) {
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Address_AbsoluteX();
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BUS().write(std::get<0>(Address_AbsoluteX()), value);
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BUS().write(MEMPTR(), value);
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}
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}
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void AM_AbsoluteY(uint8_t value) {
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void AM_AbsoluteY(uint8_t value) {
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Address_AbsoluteY();
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BUS().write(std::get<0>(Address_AbsoluteY()), value);
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BUS().write(MEMPTR(), value);
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}
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}
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void AM_ZeroPageX(uint8_t value) {
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void AM_ZeroPageX(uint8_t value) {
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Address_ZeroPageX();
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BUS().write(Address_ZeroPageX(), value);
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BUS().write(MEMPTR(), value);
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}
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}
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void AM_ZeroPageY(uint8_t value) {
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void AM_ZeroPageY(uint8_t value) {
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Address_ZeroPageY();
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BUS().write(Address_ZeroPageY(), value);
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BUS().write(MEMPTR(), value);
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}
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}
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void AM_IndexedIndirectX(uint8_t value) {
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void AM_IndexedIndirectX(uint8_t value) {
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Address_IndexedIndirectX();
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BUS().write(Address_IndexedIndirectX(), value);
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BUS().write(MEMPTR(), value);
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}
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}
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void AM_IndirectIndexedY(uint8_t value) {
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void AM_IndirectIndexedY(uint8_t value) {
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Address_IndirectIndexedY();
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BUS().write(std::get<0>(Address_IndirectIndexedY()), value);
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BUS().write(MEMPTR(), value);
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}
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}
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// Operations
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// Operations
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@ -344,5 +329,7 @@ namespace EightBit {
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uint8_t p = 0; // processor status
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uint8_t p = 0; // processor status
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PinLevel m_soLine = Low;
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PinLevel m_soLine = Low;
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register16_t m_intermediate = { { 0, 0 } };;
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};
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};
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}
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}
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@ -408,7 +408,7 @@ uint8_t EightBit::MOS6502::SBC(const uint8_t operand, const uint8_t data) {
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const auto returned = SUB(operand, data, ~P() & CF);
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const auto returned = SUB(operand, data, ~P() & CF);
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const register16_t& difference = MEMPTR();
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const register16_t& difference = m_intermediate;
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adjustNZ(difference.low);
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adjustNZ(difference.low);
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setFlag(P(), VF, (operand ^ data) & (operand ^ difference.low) & NF);
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setFlag(P(), VF, (operand ^ data) & (operand ^ difference.low) & NF);
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clearFlag(P(), CF, difference.high);
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clearFlag(P(), CF, difference.high);
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@ -421,12 +421,12 @@ uint8_t EightBit::MOS6502::SUB(const uint8_t operand, const uint8_t data, const
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}
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}
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uint8_t EightBit::MOS6502::SUB_b(const uint8_t operand, const uint8_t data, const int borrow) {
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uint8_t EightBit::MOS6502::SUB_b(const uint8_t operand, const uint8_t data, const int borrow) {
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MEMPTR().word = operand - data - borrow;
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m_intermediate.word = operand - data - borrow;
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return MEMPTR().low;
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return m_intermediate.low;
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}
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}
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uint8_t EightBit::MOS6502::SUB_d(const uint8_t operand, const uint8_t data, const int borrow) {
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uint8_t EightBit::MOS6502::SUB_d(const uint8_t operand, const uint8_t data, const int borrow) {
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MEMPTR().word = operand - data - borrow;
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m_intermediate.word = operand - data - borrow;
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uint8_t low = lowNibble(operand) - lowNibble(data) - borrow;
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uint8_t low = lowNibble(operand) - lowNibble(data) - borrow;
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const auto lowNegative = low & NF;
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const auto lowNegative = low & NF;
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@ -450,7 +450,7 @@ void EightBit::MOS6502::CMP(uint8_t first, uint8_t second) {
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uint8_t EightBit::MOS6502::ADC(const uint8_t operand, const uint8_t data) {
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uint8_t EightBit::MOS6502::ADC(const uint8_t operand, const uint8_t data) {
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const auto returned = ADD(operand, data, P() & CF);
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const auto returned = ADD(operand, data, P() & CF);
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adjustNZ(MEMPTR().low);
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adjustNZ(m_intermediate.low);
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return returned;
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return returned;
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}
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}
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@ -459,17 +459,17 @@ uint8_t EightBit::MOS6502::ADD(uint8_t operand, uint8_t data, int carry) {
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}
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}
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uint8_t EightBit::MOS6502::ADD_b(uint8_t operand, uint8_t data, int carry) {
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uint8_t EightBit::MOS6502::ADD_b(uint8_t operand, uint8_t data, int carry) {
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MEMPTR().word = operand + data + carry;
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m_intermediate.word = operand + data + carry;
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setFlag(P(), VF, ~(operand ^ data) & (operand ^ MEMPTR().low) & NF);
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setFlag(P(), VF, ~(operand ^ data) & (operand ^ m_intermediate.low) & NF);
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setFlag(P(), CF, MEMPTR().high & CF);
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setFlag(P(), CF, m_intermediate.high & CF);
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return MEMPTR().low;
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return m_intermediate.low;
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}
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}
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uint8_t EightBit::MOS6502::ADD_d(uint8_t operand, uint8_t data, int carry) {
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uint8_t EightBit::MOS6502::ADD_d(uint8_t operand, uint8_t data, int carry) {
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MEMPTR().word = operand + data + carry;
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m_intermediate.word = operand + data + carry;
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uint8_t low = lowNibble(operand) + lowNibble(data) + carry;
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uint8_t low = lowNibble(operand) + lowNibble(data) + carry;
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if (low > 9)
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if (low > 9)
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@ -515,9 +515,9 @@ void EightBit::MOS6502::PLP() {
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//
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//
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void EightBit::MOS6502::JSR_abs() {
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void EightBit::MOS6502::JSR_abs() {
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Address_Absolute();
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const auto address = Address_Absolute();
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--PC().word;
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--PC().word;
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call();
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call(address);
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}
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}
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void EightBit::MOS6502::RTI() {
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void EightBit::MOS6502::RTI() {
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@ -531,13 +531,11 @@ void EightBit::MOS6502::RTS() {
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}
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}
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void EightBit::MOS6502::JMP_abs() {
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void EightBit::MOS6502::JMP_abs() {
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Address_Absolute();
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jump(Address_Absolute());
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jump();
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}
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}
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void EightBit::MOS6502::JMP_ind() {
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void EightBit::MOS6502::JMP_ind() {
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Address_Indirect();
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jump(Address_Indirect());
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jump();
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}
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}
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void EightBit::MOS6502::BRK() {
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void EightBit::MOS6502::BRK() {
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@ -117,6 +117,7 @@ bool EightBit::Z80::jumpConditionalFlag(uint8_t f, const int flag) {
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void EightBit::Z80::retn() {
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void EightBit::Z80::retn() {
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ret();
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ret();
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MEMPTR() = PC();
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IFF1() = IFF2();
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IFF1() = IFF2();
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}
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}
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@ -685,7 +686,7 @@ int EightBit::Z80::step() {
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case 2:
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case 2:
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MEMPTR().low = BUS().DATA();
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MEMPTR().low = BUS().DATA();
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MEMPTR().high = IV();
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MEMPTR().high = IV();
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call();
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call(MEMPTR());
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addCycles(19);
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addCycles(19);
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return cycles();
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return cycles();
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default:
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default:
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@ -1373,6 +1374,7 @@ void EightBit::Z80::executeOther(uint8_t& a, uint8_t& f, const int x, const int
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switch (p) {
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switch (p) {
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case 0: // RET
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case 0: // RET
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ret();
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ret();
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MEMPTR() = PC();
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addCycles(10);
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addCycles(10);
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break;
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break;
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case 1: // EXX
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case 1: // EXX
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@ -1402,8 +1404,7 @@ void EightBit::Z80::executeOther(uint8_t& a, uint8_t& f, const int x, const int
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case 3: // Assorted operations
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case 3: // Assorted operations
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switch (y) {
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switch (y) {
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case 0: // JP nn
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case 0: // JP nn
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MEMPTR() = fetchWord();
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jump(MEMPTR() = fetchWord());
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jump();
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addCycles(10);
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addCycles(10);
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break;
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break;
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case 1: // CB prefix
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case 1: // CB prefix
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@ -1455,8 +1456,7 @@ void EightBit::Z80::executeOther(uint8_t& a, uint8_t& f, const int x, const int
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case 1:
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case 1:
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switch (p) {
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switch (p) {
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case 0: // CALL nn
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case 0: // CALL nn
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MEMPTR() = fetchWord();
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call(MEMPTR() = fetchWord());
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call();
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addCycles(17);
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addCycles(17);
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break;
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break;
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case 1: // DD prefix
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case 1: // DD prefix
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@ -36,6 +36,8 @@ namespace EightBit {
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return m_decodedOpcodes[i];
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return m_decodedOpcodes[i];
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}
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}
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register16_t& MEMPTR() { return m_memptr; }
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register16_t& SP() { return m_sp; }
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register16_t& SP() { return m_sp; }
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virtual register16_t& AF() = 0;
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virtual register16_t& AF() = 0;
|
||||||
@ -128,32 +130,34 @@ namespace EightBit {
|
|||||||
void restart(uint8_t address) {
|
void restart(uint8_t address) {
|
||||||
MEMPTR().low = address;
|
MEMPTR().low = address;
|
||||||
MEMPTR().high = 0;
|
MEMPTR().high = 0;
|
||||||
call();
|
call(MEMPTR());
|
||||||
}
|
}
|
||||||
|
|
||||||
bool callConditional(int condition) {
|
bool callConditional(int condition) {
|
||||||
MEMPTR() = fetchWord();
|
MEMPTR() = fetchWord();
|
||||||
if (condition)
|
if (condition)
|
||||||
call();
|
call(MEMPTR());
|
||||||
return condition != 0;
|
return condition != 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
bool jumpConditional(int conditional) {
|
bool jumpConditional(int conditional) {
|
||||||
MEMPTR() = fetchWord();
|
MEMPTR() = fetchWord();
|
||||||
if (conditional)
|
if (conditional)
|
||||||
jump();
|
jump(MEMPTR());
|
||||||
return conditional != 0;
|
return conditional != 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
bool returnConditional(int condition) {
|
bool returnConditional(int condition) {
|
||||||
if (condition)
|
if (condition) {
|
||||||
ret();
|
ret();
|
||||||
|
MEMPTR() = PC();
|
||||||
|
}
|
||||||
return condition != 0;
|
return condition != 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void jr(int8_t offset) {
|
void jr(int8_t offset) {
|
||||||
MEMPTR().word = PC().word + offset;
|
MEMPTR().word = PC().word + offset;
|
||||||
jump();
|
jump(MEMPTR());
|
||||||
}
|
}
|
||||||
|
|
||||||
bool jrConditional(int conditional) {
|
bool jrConditional(int conditional) {
|
||||||
@ -166,5 +170,6 @@ namespace EightBit {
|
|||||||
private:
|
private:
|
||||||
std::array<opcode_decoded_t, 0x100> m_decodedOpcodes;
|
std::array<opcode_decoded_t, 0x100> m_decodedOpcodes;
|
||||||
register16_t m_sp = { { 0xff, 0xff } };
|
register16_t m_sp = { { 0xff, 0xff } };
|
||||||
|
register16_t m_memptr = { { 0, 0 } };
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
@ -67,7 +67,6 @@ namespace EightBit {
|
|||||||
Bus& BUS() { return m_bus; }
|
Bus& BUS() { return m_bus; }
|
||||||
|
|
||||||
register16_t& PC() { return m_pc; }
|
register16_t& PC() { return m_pc; }
|
||||||
register16_t& MEMPTR() { return m_memptr; }
|
|
||||||
|
|
||||||
PinLevel& RESET() { return m_resetLine; } // In
|
PinLevel& RESET() { return m_resetLine; } // In
|
||||||
PinLevel& HALT() { return m_haltLine; } // Out
|
PinLevel& HALT() { return m_haltLine; } // Out
|
||||||
@ -132,18 +131,17 @@ namespace EightBit {
|
|||||||
return returned;
|
return returned;
|
||||||
}
|
}
|
||||||
|
|
||||||
void jump() {
|
void jump(register16_t destination) {
|
||||||
PC() = MEMPTR();
|
PC() = destination;
|
||||||
}
|
}
|
||||||
|
|
||||||
void call() {
|
void call(register16_t destination) {
|
||||||
pushWord(PC());
|
pushWord(PC());
|
||||||
jump();
|
jump(destination);
|
||||||
}
|
}
|
||||||
|
|
||||||
void ret() {
|
void ret() {
|
||||||
MEMPTR() = popWord();
|
jump(popWord());
|
||||||
jump();
|
|
||||||
}
|
}
|
||||||
|
|
||||||
int cycles() const { return m_cycles; }
|
int cycles() const { return m_cycles; }
|
||||||
@ -155,7 +153,6 @@ namespace EightBit {
|
|||||||
Bus& m_bus;
|
Bus& m_bus;
|
||||||
int m_cycles = 0;
|
int m_cycles = 0;
|
||||||
register16_t m_pc = { { 0, 0 } };
|
register16_t m_pc = { { 0, 0 } };
|
||||||
register16_t m_memptr = { { 0, 0 } };
|
|
||||||
|
|
||||||
PinLevel m_intLine = Low;
|
PinLevel m_intLine = Low;
|
||||||
PinLevel m_nmiLine = Low;
|
PinLevel m_nmiLine = Low;
|
||||||
|
@ -11,7 +11,7 @@ void EightBit::Processor::reset() {
|
|||||||
raise(INT());
|
raise(INT());
|
||||||
raise(NMI());
|
raise(NMI());
|
||||||
raise(RESET());
|
raise(RESET());
|
||||||
PC().word = MEMPTR().word = 0;
|
PC().word = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int EightBit::Processor::run(int limit) {
|
int EightBit::Processor::run(int limit) {
|
||||||
|
Loading…
x
Reference in New Issue
Block a user