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Use explicit enumeration types (improves type safety) where appropriate.

Browse Source 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
This commit is contained in:
Adrian Conlon 2018-12-01 15:24:29 +00:00
parent cf0828c595
commit dc477cd050
18 changed files with 63 additions and 63 deletions
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2
Intel8080/test/Board.h
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@ -23,7 +23,7 @@ public:
protected:
virtual void initialise() final;
virtual EightBit::MemoryMapping mapping(uint16_t address) final {
return { m_ram, 0x0000, 0xffff, EightBit::MemoryMapping::ReadWrite };
return { m_ram, 0x0000, 0xffff, EightBit::MemoryMapping::AccessLevel::ReadWrite };
}
private:

2
LR35902/fusetest_LR35902/FuseTestRunner.h
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@ -37,7 +37,7 @@ namespace Fuse {
protected:
virtual EightBit::MemoryMapping mapping(uint16_t address) final {
return { m_ram, 0x0000, 0xffff, EightBit::MemoryMapping::ReadWrite };
return { m_ram, 0x0000, 0xffff, EightBit::MemoryMapping::AccessLevel::ReadWrite };
}
public:

2
LR35902/inc/Disassembler.h
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@ -31,7 +31,7 @@ namespace EightBit {
static std::string invalid(uint8_t value);
private:
enum IoRegister {
enum class IoRegister {
Abbreviated, // FF00 + dd
Absolute, // FFdd
Register, // C

8
LR35902/src/Disassembler.cpp
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@ -190,16 +190,16 @@ void EightBit::GameBoy::Disassembler::disassemble(std::ostringstream& output, LR
output << m_formatter % (int)immediate % (int)absolute % relative % (int)displacement % indexedImmediate;
switch (ioRegister) {
case Abbreviated:
case IoRegister::Abbreviated:
output << "; register " << io(immediate);
break;
case Absolute:
case IoRegister::Absolute:
output << "; register (Absolute)";
break;
case Register:
case IoRegister::Register:
output << "; register C:" << io(cpu.C());
break;
case Unused:
case IoRegister::Unused:
break;
default:
UNREACHABLE;

24
LR35902/src/GameBoyBus.cpp
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@ -163,31 +163,31 @@ void EightBit::GameBoy::Bus::validateCartridgeType() {
EightBit::MemoryMapping EightBit::GameBoy::Bus::mapping(uint16_t address) {
if ((address < 0x100) && IO().bootRomEnabled())
return { m_bootRom, 0x0000, 0xffff, MemoryMapping::ReadOnly };
return { m_bootRom, 0x0000, 0xffff, MemoryMapping::AccessLevel::ReadOnly };
if ((address < 0x4000) && gameRomEnabled())
return { m_gameRomBanks[0], 0x0000, 0xffff, MemoryMapping::ReadOnly };
return { m_gameRomBanks[0], 0x0000, 0xffff, MemoryMapping::AccessLevel::ReadOnly };
if ((address < 0x8000) && gameRomEnabled())
return { m_gameRomBanks[m_romBank], 0x4000, 0xffff, MemoryMapping::ReadOnly };
return { m_gameRomBanks[m_romBank], 0x4000, 0xffff, MemoryMapping::AccessLevel::ReadOnly };
if (address < 0xa000)
return { VRAM(), 0x8000, 0xffff, MemoryMapping::ReadWrite };
return { VRAM(), 0x8000, 0xffff, MemoryMapping::AccessLevel::ReadWrite };
if (address < 0xc000) {
if (m_ramBanks.size() == 0)
return { m_unmapped2000, 0xa000, 0xffff, MemoryMapping::ReadOnly };
return { m_unmapped2000, 0xa000, 0xffff, MemoryMapping::AccessLevel::ReadOnly };
else
return { m_ramBanks[m_ramBank], 0xa000, 0xffff, MemoryMapping::ReadWrite };
return { m_ramBanks[m_ramBank], 0xa000, 0xffff, MemoryMapping::AccessLevel::ReadWrite };
}
if (address < 0xe000)
return { m_lowInternalRam, 0xc000, 0xffff, MemoryMapping::ReadWrite };
return { m_lowInternalRam, 0xc000, 0xffff, MemoryMapping::AccessLevel::ReadWrite };
if (address < 0xfe00)
return { m_lowInternalRam, 0xe000, 0xffff, MemoryMapping::ReadWrite }; // Low internal RAM mirror
return { m_lowInternalRam, 0xe000, 0xffff, MemoryMapping::AccessLevel::ReadWrite }; // Low internal RAM mirror
if (address < 0xfea0)
return { OAMRAM(), 0xfe00, 0xffff, MemoryMapping::ReadWrite };
return { OAMRAM(), 0xfe00, 0xffff, MemoryMapping::AccessLevel::ReadWrite };
if (address < IoRegisters::BASE)
return { m_unmapped60, 0xfea0, 0xffff, MemoryMapping::ReadOnly };
return { m_unmapped60, 0xfea0, 0xffff, MemoryMapping::AccessLevel::ReadOnly };
if (address < 0xff80)
return { IO(), IoRegisters::BASE, 0xffff, MemoryMapping::ReadWrite };
return { m_highInternalRam, 0xff80, 0xffff, MemoryMapping::ReadWrite };
return { IO(), IoRegisters::BASE, 0xffff, MemoryMapping::AccessLevel::ReadWrite };
return { m_highInternalRam, 0xff80, 0xffff, MemoryMapping::AccessLevel::ReadWrite };
}
int EightBit::GameBoy::Bus::runRasterLines() {

4
M6502/inc/mos6502.h
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@ -169,8 +169,8 @@ namespace EightBit {
uint8_t s = 0; // stack pointer
uint8_t p = 0; // processor status
PinLevel m_nmiLine = Low;
PinLevel m_soLine = Low;
PinLevel m_nmiLine = PinLevel::Low;
PinLevel m_soLine = PinLevel::Low;
register16_t m_intermediate;
};

2
M6502/test/Board.h
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@ -23,7 +23,7 @@ public:
protected:
virtual void initialise() final;
virtual EightBit::MemoryMapping mapping(uint16_t address) final {
return { m_ram, 0x0000, 0xffff, EightBit::MemoryMapping::ReadWrite };
return { m_ram, 0x0000, 0xffff, EightBit::MemoryMapping::AccessLevel::ReadWrite };
}
private:

8
MC6809/inc/mc6809.h
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@ -368,11 +368,11 @@ namespace EightBit {
uint8_t m_dp = 0;
uint8_t m_cc = 0;
PinLevel m_nmiLine = Low;
PinLevel m_firqLine = Low;
PinLevel m_nmiLine = PinLevel::Low;
PinLevel m_firqLine = PinLevel::Low;
PinLevel m_baLine = Low;
PinLevel m_bsLine = Low;
PinLevel m_baLine = PinLevel::Low;
PinLevel m_bsLine = PinLevel::Low;
bool m_prefix10 = false;
bool m_prefix11 = false;

10
MC6809/test/Board.cpp
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@ -44,7 +44,7 @@ void Board::initialise() {
// Marshal data from memory -> ACIA
WrittenByte.connect([this] (EightBit::EventArgs&) {
updateAciaPinsWrite();
if (accessAcia()) {
if (ACIA().selected()) {
ACIA().DATA() = DATA();
accessAcia();
}
@ -96,15 +96,15 @@ void Board::initialise() {
EightBit::MemoryMapping Board::mapping(uint16_t address) {
if (address < 0x8000)
return { m_ram, 0x0000, EightBit::Chip::Mask16, EightBit::MemoryMapping::ReadWrite };
return { m_ram, 0x0000, EightBit::Chip::Mask16, EightBit::MemoryMapping::AccessLevel::ReadWrite };
if (address < 0xa000)
return { m_unused2000, 0x8000, EightBit::Chip::Mask16, EightBit::MemoryMapping::ReadOnly };
return { m_unused2000, 0x8000, EightBit::Chip::Mask16, EightBit::MemoryMapping::AccessLevel::ReadOnly };
if (address < 0xc000)
return { m_io, 0xa000, EightBit::Chip::Mask16, EightBit::MemoryMapping::ReadWrite };
return { m_io, 0xa000, EightBit::Chip::Mask16, EightBit::MemoryMapping::AccessLevel::ReadWrite };
return { m_rom, 0xc000, EightBit::Chip::Mask16, EightBit::MemoryMapping::ReadOnly };
return { m_rom, 0xc000, EightBit::Chip::Mask16, EightBit::MemoryMapping::AccessLevel::ReadOnly };
}
void Board::updateAciaPins(const EightBit::Chip::PinLevel rw) {

2
MC6809/unittest/Board.cpp
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@ -25,7 +25,7 @@ void Board::initialise() {
}
EightBit::MemoryMapping Board::mapping(uint16_t) {
return { m_ram, 0x0000, 0xffff, EightBit::MemoryMapping::ReadWrite };
return { m_ram, 0x0000, 0xffff, EightBit::MemoryMapping::AccessLevel::ReadWrite };
}
void Board::Cpu_ExecutingInstruction_Debug(EightBit::mc6809&) {

30
MC6850/inc/MC6850.h
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@ -278,26 +278,26 @@ namespace EightBit {
bool transmitReadyHigh() const { return m_transmitControl == ReadyHighInterruptDisabled; }
bool transmitReadyLow() const { return !transmitReadyHigh(); }
PinLevel m_RXDATA = Low;
PinLevel m_TXDATA = Low;
PinLevel m_RXDATA = PinLevel::Low;
PinLevel m_TXDATA = PinLevel::Low;
PinLevel m_RTS = Low;
PinLevel m_CTS = Low;
PinLevel m_DCD = Low;
PinLevel m_oldDCD = Low; // So we can detect low -> high transition
PinLevel m_RTS = PinLevel::Low;
PinLevel m_CTS = PinLevel::Low;
PinLevel m_DCD = PinLevel::Low;
PinLevel m_oldDCD = PinLevel::Low; // So we can detect low -> high transition
PinLevel m_RXCLK = Low;
PinLevel m_TXCLK = Low;
PinLevel m_RXCLK = PinLevel::Low;
PinLevel m_TXCLK = PinLevel::Low;
PinLevel m_CS0 = Low;;
PinLevel m_CS1 = Low;;
PinLevel m_CS2 = Low;;
PinLevel m_CS0 = PinLevel::Low;;
PinLevel m_CS1 = PinLevel::Low;;
PinLevel m_CS2 = PinLevel::Low;;
PinLevel m_RS = Low;;
PinLevel m_RW = Low;;
PinLevel m_RS = PinLevel::Low;;
PinLevel m_RW = PinLevel::Low;;
PinLevel m_E = Low;;
PinLevel m_IRQ = Low;;
PinLevel m_E = PinLevel::Low;;
PinLevel m_IRQ = PinLevel::Low;;
uint8_t m_data = 0;

2
Z80/fusetest_Z80/FuseTestRunner.h
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@ -37,7 +37,7 @@ namespace Fuse {
protected:
virtual void initialise() final;
virtual EightBit::MemoryMapping mapping(uint16_t address) final {
return { m_ram, 0x0000, 0xffff, EightBit::MemoryMapping::ReadWrite };
return { m_ram, 0x0000, 0xffff, EightBit::MemoryMapping::AccessLevel::ReadWrite };
}
public:

4
Z80/inc/Z80.h
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@ -90,8 +90,8 @@ namespace EightBit {
void handleINT() final;
private:
PinLevel m_nmiLine = Low;
PinLevel m_m1Line = Low;
PinLevel m_nmiLine = PinLevel::Low;
PinLevel m_m1Line = PinLevel::Low;
InputOutput& m_ports;

2
Z80/test/Board.h
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@ -24,7 +24,7 @@ public:
protected:
void initialise() final;
EightBit::MemoryMapping mapping(uint16_t address) noexcept final {
return { m_ram, 0x0000, 0xffff, EightBit::MemoryMapping::ReadWrite };
return { m_ram, 0x0000, 0xffff, EightBit::MemoryMapping::AccessLevel::ReadWrite };
}
private:

12
inc/Chip.h
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@ -44,7 +44,7 @@ namespace EightBit {
Mask16 = Bit16 - 1
};
enum PinLevel {
enum class PinLevel {
Low, High
};
@ -59,10 +59,10 @@ namespace EightBit {
static void clearFlag(uint8_t& f, const int flag, const uint32_t condition) noexcept { clearFlag(f, flag, !!condition); }
static void clearFlag(uint8_t& f, const int flag, const bool condition) noexcept { setFlag(f, flag, !condition); }
static constexpr auto raised(const PinLevel line) { return line == High; }
static void raise(PinLevel& line) noexcept { line = High; }
static constexpr auto lowered(const PinLevel line) { return line == Low; }
static void lower(PinLevel& line) noexcept { line = Low; }
static constexpr auto raised(const PinLevel line) { return line == PinLevel::High; }
static void raise(PinLevel& line) noexcept { line = PinLevel::High; }
static constexpr auto lowered(const PinLevel line) { return line == PinLevel::Low; }
static void lower(PinLevel& line) noexcept { line = PinLevel::Low; }
static void match(PinLevel& line, int value);
@ -87,6 +87,6 @@ namespace EightBit {
Chip() = default;
private:
PinLevel m_powerLine = Low;
PinLevel m_powerLine = PinLevel::Low;
};
}

4
inc/MemoryMapping.h
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@ -9,11 +9,11 @@ namespace EightBit {
struct MemoryMapping {
enum AccessLevel { Unknown, ReadOnly, ReadWrite, };
enum class AccessLevel { Unknown, ReadOnly, ReadWrite, };
Memory& memory;
uint16_t begin = Chip::Mask16;
uint16_t mask = 0U;
AccessLevel access = Unknown;
AccessLevel access = AccessLevel::Unknown;
};
}

6
inc/Processor.h
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@ -105,8 +105,8 @@ namespace EightBit {
int m_cycles = 0;
register16_t m_pc;
PinLevel m_intLine = Low;
PinLevel m_haltLine = Low;
PinLevel m_resetLine = Low;
PinLevel m_intLine = PinLevel::Low;
PinLevel m_haltLine = PinLevel::Low;
PinLevel m_resetLine = PinLevel::Low;
};
}

2
src/Bus.cpp
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@ -97,7 +97,7 @@ std::map<uint16_t, std::vector<uint8_t>> EightBit::Bus::parseHexFile(const std::
uint8_t& EightBit::Bus::reference(const uint16_t address) {
const auto mapped = mapping(address);
const uint16_t offset = (address - mapped.begin) & mapped.mask;
if (mapped.access == MemoryMapping::ReadOnly)
if (mapped.access == MemoryMapping::AccessLevel::ReadOnly)
return DATA() = mapped.memory.peek(offset);
return mapped.memory.reference(offset);
}