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More memptr adjustments

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Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
This commit is contained in:
Adrian Conlon 2018-08-17 13:59:59 +01:00
parent 1abe3ae456
commit ed76038bfa
12 changed files with 52 additions and 69 deletions
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10
Intel8080/src/Intel8080.cpp
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@ -236,8 +236,7 @@ void EightBit::Intel8080::xhtl() {
} }
void EightBit::Intel8080::writePort(uint8_t port) { void EightBit::Intel8080::writePort(uint8_t port) {
BUS().ADDRESS().low = port; BUS().ADDRESS() = register16_t(port, A());
BUS().ADDRESS().high = A();
BUS().DATA() = A(); BUS().DATA() = A();
writePort(); writePort();
} }
@ -247,8 +246,7 @@ void EightBit::Intel8080::writePort() {
} }
uint8_t EightBit::Intel8080::readPort(uint8_t port) { uint8_t EightBit::Intel8080::readPort(uint8_t port) {
BUS().ADDRESS().low = port; BUS().ADDRESS() = register16_t(port, A());
BUS().ADDRESS().high = A();
return readPort(); return readPort();
} }
@ -330,7 +328,7 @@ void EightBit::Intel8080::execute(int x, int y, int z, int p, int q) {
addCycles(7); addCycles(7);
break; break;
case 2: // LD (nn),HL case 2: // LD (nn),HL
MEMPTR() = fetchWord(); BUS().ADDRESS() = fetchWord();
setWord(HL()); setWord(HL());
addCycles(16); addCycles(16);
break; break;
@ -354,7 +352,7 @@ void EightBit::Intel8080::execute(int x, int y, int z, int p, int q) {
addCycles(7); addCycles(7);
break; break;
case 2: // LD HL,(nn) case 2: // LD HL,(nn)
MEMPTR() = fetchWord(); BUS().ADDRESS() = fetchWord();
HL() = getWord(); HL() = getWord();
addCycles(16); addCycles(16);
break; break;

8
LR35902/inc/ObjectAttribute.h
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@ -21,10 +21,10 @@ namespace EightBit {
uint8_t priority() const { return flags() & Processor::Bit7; } uint8_t priority() const { return flags() & Processor::Bit7; }
bool highPriority() const { return priority() != 0; } bool highPriority() const { return !!priority(); }
bool lowPriority() const { return priority() == 0; } bool lowPriority() const { return !priority(); }
bool flipY() const { return (flags() & Processor::Bit6) != 0; } bool flipY() const { return !!(flags() & Processor::Bit6); }
bool flipX() const { return (flags() & Processor::Bit5) != 0; } bool flipX() const { return !!(flags() & Processor::Bit5); }
int palette() const { return (flags() & Processor::Bit4) >> 3; } int palette() const { return (flags() & Processor::Bit4) >> 3; }
private: private:

2
LR35902/src/Display.cpp
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@ -90,7 +90,7 @@ void EightBit::GameBoy::Display::renderBackground() {
const auto palette = createPalette(IoRegisters::BGP); const auto palette = createPalette(IoRegisters::BGP);
const auto window = (m_control & IoRegisters::WindowEnable) != 0; const auto window = !!(m_control & IoRegisters::WindowEnable);
const auto bgArea = (m_control & IoRegisters::BackgroundCodeAreaSelection) ? 0x1c00 : 0x1800; const auto bgArea = (m_control & IoRegisters::BackgroundCodeAreaSelection) ? 0x1c00 : 0x1800;
const auto bgCharacters = (m_control & IoRegisters::BackgroundCharacterDataSelection) ? 0 : 0x800; const auto bgCharacters = (m_control & IoRegisters::BackgroundCharacterDataSelection) ? 0 : 0x800;

5
LR35902/src/IoRegisters.cpp
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@ -130,8 +130,7 @@ void EightBit::GameBoy::IoRegisters::Bus_WrittenByte(EightBit::EventArgs) {
case SCX: case SCX:
break; break;
case DMA: case DMA:
m_dmaAddress.high = value; m_dmaAddress = register16_t(0, value);
m_dmaAddress.low = 0;
m_dmaTransferActive = true; m_dmaTransferActive = true;
break; break;
case LY: // R/O case LY: // R/O
@ -145,7 +144,7 @@ void EightBit::GameBoy::IoRegisters::Bus_WrittenByte(EightBit::EventArgs) {
break; break;
case BOOT_DISABLE: case BOOT_DISABLE:
m_disableBootRom = value != 0; m_disableBootRom = !!value;
break; break;
} }
} }

8
LR35902/src/LR35902.cpp
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@ -418,7 +418,7 @@ void EightBit::GameBoy::LR35902::executeOther(int x, int y, int z, int p, int q)
addCycle(); addCycle();
break; break;
case 1: // GB: LD (nn),SP case 1: // GB: LD (nn),SP
MEMPTR() = fetchWord(); BUS().ADDRESS() = fetchWord();
setWord(SP()); setWord(SP());
addCycles(5); addCycles(5);
break; break;
@ -731,8 +731,7 @@ void EightBit::GameBoy::LR35902::executeOther(int x, int y, int z, int p, int q)
case 3: // Assorted operations case 3: // Assorted operations
switch (y) { switch (y) {
case 0: // JP nn case 0: // JP nn
MEMPTR() = fetchWord(); jump(MEMPTR() = fetchWord());
jump(MEMPTR());
addCycles(4); addCycles(4);
break; break;
case 1: // CB prefix case 1: // CB prefix
@ -763,8 +762,7 @@ void EightBit::GameBoy::LR35902::executeOther(int x, int y, int z, int p, int q)
case 1: case 1:
switch (p) { switch (p) {
case 0: // CALL nn case 0: // CALL nn
MEMPTR() = fetchWord(); call(MEMPTR() = fetchWord());
call(MEMPTR());
addCycles(6); addCycles(6);
break; break;
} }

8
M6502/src/mos6502.cpp
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@ -58,15 +58,11 @@ EightBit::register16_t EightBit::MOS6502::getWordPaged(uint8_t page, uint8_t off
} }
uint8_t EightBit::MOS6502::getBytePaged(uint8_t page, uint8_t offset) { uint8_t EightBit::MOS6502::getBytePaged(uint8_t page, uint8_t offset) {
BUS().ADDRESS().low = offset; return BUS().read(register16_t(offset, page));
BUS().ADDRESS().high = page;
return BUS().read();
} }
void EightBit::MOS6502::setBytePaged(uint8_t page, uint8_t offset, uint8_t value) { void EightBit::MOS6502::setBytePaged(uint8_t page, uint8_t offset, uint8_t value) {
BUS().ADDRESS().low = offset; BUS().write(register16_t(offset, page), value);
BUS().ADDRESS().high = page;
BUS().write(value);
} }
void EightBit::MOS6502::interrupt(uint8_t vector) { void EightBit::MOS6502::interrupt(uint8_t vector) {

2
M6502/test/Board.cpp
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@ -102,7 +102,7 @@ void Board::Cpu_ExecutingInstruction_Debug(EightBit::MOS6502& cpu) {
void Board::Memory_ReadingByte_Input(EightBit::EventArgs) { void Board::Memory_ReadingByte_Input(EightBit::EventArgs) {
if (ADDRESS().word == m_configuration.getInputAddress()) { if (ADDRESS().word == m_configuration.getInputAddress()) {
if (DATA() != 0) if (!!DATA())
write(0); write(0);
} }
} }

2
Z80/inc/Z80.h
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@ -20,7 +20,7 @@ namespace EightBit {
uint8_t variable : 7; uint8_t variable : 7;
refresh_t(const uint8_t value) refresh_t(const uint8_t value)
: high((value & Bit7) != 0), : high(!!(value & Bit7)),
variable(value & Mask7) variable(value & Mask7)
{ } { }

26
Z80/src/Z80.cpp
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@ -117,7 +117,6 @@ bool EightBit::Z80::jumpConditionalFlag(const int flag) {
void EightBit::Z80::retn() { void EightBit::Z80::retn() {
ret(); ret();
MEMPTR() = PC();
IFF1() = IFF2(); IFF1() = IFF2();
} }
@ -589,9 +588,7 @@ void EightBit::Z80::rld() {
} }
void EightBit::Z80::writePort(const uint8_t port) { void EightBit::Z80::writePort(const uint8_t port) {
BUS().ADDRESS().low = port; MEMPTR() = BUS().ADDRESS() = register16_t(port, A());
BUS().ADDRESS().high = A();
MEMPTR() = BUS().ADDRESS();
BUS().DATA() = A(); BUS().DATA() = A();
writePort(); writePort();
++MEMPTR().low; ++MEMPTR().low;
@ -602,9 +599,7 @@ void EightBit::Z80::writePort() {
} }
uint8_t EightBit::Z80::readPort(const uint8_t port) { uint8_t EightBit::Z80::readPort(const uint8_t port) {
BUS().ADDRESS().low = port; MEMPTR() = BUS().ADDRESS() = register16_t(port, A());
BUS().ADDRESS().high = A();
MEMPTR() = BUS().ADDRESS();
++MEMPTR().low; ++MEMPTR().low;
return readPort(); return readPort();
} }
@ -640,9 +635,7 @@ int EightBit::Z80::step() {
addCycles(13); addCycles(13);
return cycles(); return cycles();
case 2: case 2:
MEMPTR().low = BUS().DATA(); call(MEMPTR() = register16_t(BUS().DATA(), IV()));
MEMPTR().high = IV();
call(MEMPTR());
addCycles(19); addCycles(19);
return cycles(); return cycles();
default: default:
@ -843,7 +836,7 @@ void EightBit::Z80::executeED(const int x, const int y, const int z, const int p
addCycles(15); addCycles(15);
break; break;
case 3: // Retrieve/store register pair from/to immediate address case 3: // Retrieve/store register pair from/to immediate address
MEMPTR() = fetchWord(); BUS().ADDRESS() = fetchWord();
switch (q) { switch (q) {
case 0: // LD (nn), rp[p] case 0: // LD (nn), rp[p]
setWord(RP(p)); setWord(RP(p));
@ -955,7 +948,7 @@ void EightBit::Z80::executeED(const int x, const int y, const int z, const int p
break; break;
case 7: // LDDR case 7: // LDDR
if (LIKELY(lddr())) { if (LIKELY(lddr())) {
MEMPTR()= --PC(); MEMPTR() = --PC();
--PC(); --PC();
addCycles(5); addCycles(5);
} }
@ -972,14 +965,14 @@ void EightBit::Z80::executeED(const int x, const int y, const int z, const int p
break; break;
case 6: // CPIR case 6: // CPIR
if (LIKELY(cpir())) { if (LIKELY(cpir())) {
MEMPTR()= --PC(); MEMPTR() = --PC();
--PC(); --PC();
addCycles(5); addCycles(5);
} }
break; break;
case 7: // CPDR case 7: // CPDR
if (LIKELY(cpdr())) { if (LIKELY(cpdr())) {
MEMPTR()= --PC(); MEMPTR() = --PC();
--PC(); --PC();
addCycles(5); addCycles(5);
} else { } else {
@ -1115,7 +1108,7 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
addCycles(7); addCycles(7);
break; break;
case 2: // LD (nn),HL case 2: // LD (nn),HL
MEMPTR() = fetchWord(); BUS().ADDRESS() = fetchWord();
setWord(HL2()); setWord(HL2());
addCycles(16); addCycles(16);
break; break;
@ -1145,7 +1138,7 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
addCycles(7); addCycles(7);
break; break;
case 2: // LD HL,(nn) case 2: // LD HL,(nn)
MEMPTR() = fetchWord(); BUS().ADDRESS() = fetchWord();
HL2() = getWord(); HL2() = getWord();
addCycles(16); addCycles(16);
break; break;
@ -1334,7 +1327,6 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
switch (p) { switch (p) {
case 0: // RET case 0: // RET
ret(); ret();
MEMPTR() = PC();
addCycles(10); addCycles(10);
break; break;
case 1: // EXX case 1: // EXX

32
inc/IntelProcessor.h
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@ -128,43 +128,43 @@ namespace EightBit {
// //
void restart(const uint8_t address) { void restart(const uint8_t address) {
MEMPTR().low = address; call(MEMPTR() = register16_t(address, 0));
MEMPTR().high = 0;
call(MEMPTR());
} }
bool callConditional(const int condition) { bool callConditional(const int condition) {
MEMPTR() = fetchWord(); MEMPTR() = fetchWord();
if (condition) if (condition)
call(MEMPTR()); call(MEMPTR());
return condition != 0; return !!condition;
} }
bool jumpConditional(const int conditional) { bool jumpConditional(const int condition) {
MEMPTR() = fetchWord(); MEMPTR() = fetchWord();
if (conditional) if (condition)
jump(MEMPTR()); jump(MEMPTR());
return conditional != 0; return !!condition;
} }
bool returnConditional(const int condition) { bool returnConditional(const int condition) {
if (condition) { if (condition)
ret(); ret();
MEMPTR() = PC(); return !!condition;
}
return condition != 0;
} }
void jr(const int8_t offset) { void jr(const int8_t offset) {
MEMPTR() = PC() + offset; jump(MEMPTR() = PC() + offset);
jump(MEMPTR());
} }
bool jrConditional(const int conditional) { bool jrConditional(const int condition) {
const auto offset = fetchByte(); const auto offset = fetchByte();
if (conditional) if (condition)
jr(offset); jr(offset);
return conditional != 0; return !!condition;
}
virtual void ret() final {
Processor::ret();
MEMPTR() = PC();
} }
private: private:

10
inc/Processor.h
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@ -91,12 +91,12 @@ namespace EightBit {
static void clearFlag(uint8_t& f, const int flag) { f &= ~flag; } static void clearFlag(uint8_t& f, const int flag) { f &= ~flag; }
static void setFlag(uint8_t& f, const int flag) { f |= flag; } static void setFlag(uint8_t& f, const int flag) { f |= flag; }
static void setFlag(uint8_t& f, const int flag, const int condition) { setFlag(f, flag, condition != 0); } static void setFlag(uint8_t& f, const int flag, const int condition) { setFlag(f, flag, !!condition); }
static void setFlag(uint8_t& f, const int flag, const uint32_t condition) { setFlag(f, flag, condition != 0); } static void setFlag(uint8_t& f, const int flag, const uint32_t condition) { setFlag(f, flag, !!condition); }
static void setFlag(uint8_t& f, const int flag, const bool condition) { condition ? setFlag(f, flag) : clearFlag(f, flag); } static void setFlag(uint8_t& f, const int flag, const bool condition) { condition ? setFlag(f, flag) : clearFlag(f, flag); }
static void clearFlag(uint8_t& f, const int flag, const int condition) { clearFlag(f, flag, condition != 0); } static void clearFlag(uint8_t& f, const int flag, const int condition) { clearFlag(f, flag, !!condition); }
static void clearFlag(uint8_t& f, const int flag, const uint32_t condition) { clearFlag(f, flag, condition != 0); } static void clearFlag(uint8_t& f, const int flag, const uint32_t condition) { clearFlag(f, flag, !!condition); }
static void clearFlag(uint8_t& f, const int flag, const bool condition) { condition ? clearFlag(f, flag) : setFlag(f, flag); } static void clearFlag(uint8_t& f, const int flag, const bool condition) { condition ? clearFlag(f, flag) : setFlag(f, flag); }
Processor(Bus& memory); Processor(Bus& memory);
@ -141,7 +141,7 @@ namespace EightBit {
jump(destination); jump(destination);
} }
void ret() { virtual void ret() {
jump(popWord()); jump(popWord());
} }

8
src/IntelProcessor.cpp
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@ -21,14 +21,14 @@ uint8_t EightBit::IntelProcessor::pop() {
} }
EightBit::register16_t EightBit::IntelProcessor::getWord() { EightBit::register16_t EightBit::IntelProcessor::getWord() {
BUS().ADDRESS() = MEMPTR()++;
const auto low = BUS().read(); const auto low = BUS().read();
++BUS().ADDRESS(); MEMPTR() = ++BUS().ADDRESS();
const auto high = BUS().read(); const auto high = BUS().read();
return register16_t(low, high); return register16_t(low, high);
} }
void EightBit::IntelProcessor::setWord(const register16_t value) { void EightBit::IntelProcessor::setWord(const register16_t value) {
BUS().write(MEMPTR()++, value.low); BUS().write(value.low);
BUS().write(++BUS().ADDRESS(), value.high); MEMPTR() = ++BUS().ADDRESS();
BUS().write(value.high);
} }