Adrian Conlon
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0b6ef3d4dd
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VS2017 and CPP core guidelines updates
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-11-11 15:13:26 +00:00 |
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Adrian Conlon
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d010e3ca2f
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Start incorporating CPP core guidelines (as an experiment!)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-11-10 22:41:50 +00:00 |
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Adrian Conlon
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8143f8a506
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Try to correct "one definition rule" problems:
1) No forward declarations
2) No virtual methods defined inline.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-11-05 12:47:42 +00:00 |
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Adrian Conlon
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926ac48224
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Move to VS2017
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-11-04 23:15:55 +00:00 |
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Adrian Conlon
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c292fb552e
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A whole bunch of consistency changes. No functional changes.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-11-03 22:05:01 +00:00 |
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Adrian Conlon
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a22e59546b
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Tidy the gameboy core a little. Mainly by moving the execution loops into the bus class.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-10-24 00:04:13 +01:00 |
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Adrian Conlon
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daa8eabb49
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Merge branch 'master' of https://github.com/MoleskiCoder/EightBit
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2017-10-22 21:37:21 +01:00 |
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Adrian Conlon
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fa03e8dc55
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Simplify I/O port event handling.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-10-22 21:31:20 +01:00 |
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Adrian Conlon
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90b0673259
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Correct a couple of header file issues in the base EightBit library
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-10-22 21:24:28 +01:00 |
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Adrian Conlon
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10913bf1b8
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Remove some unused signals.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-10-01 22:22:25 +01:00 |
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Adrian.Conlon
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b445457b37
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Fire pre/post memory read/write events
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-09-14 15:00:57 +01:00 |
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Adrian.Conlon
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a77e57e5fc
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Add pre/post read/write memory events.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-09-13 23:12:47 +01:00 |
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Adrian.Conlon
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b0923bd472
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(Coverity) Initialise Bus variables in constructor.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-09-07 13:45:16 +01:00 |
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Adrian.Conlon
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0665de5951
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Make the base BUS architecture a little easier to work with.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-09-07 00:53:22 +01:00 |
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Adrian.Conlon
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64b7335a79
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Attempted move to a "BUS" oriented memory architecture (TBC!)
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-09-06 13:22:23 +01:00 |
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Adrian.Conlon
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da806bddcb
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Tidy some more Windows/Linux compatibility issues.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-09-03 21:30:46 +01:00 |
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Adrian.Conlon
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640b2be670
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Parts of the EightBit library become linux compatible (TBC!)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-09-03 12:11:14 +01:00 |
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Adrian.Conlon
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57cfd79c44
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Tidy header file usage a little.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-09-01 16:41:50 +01:00 |
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Adrian.Conlon
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9b43b74c28
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Rationalise some of the reset/initialise logic across pProcessor implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-09-01 16:01:40 +01:00 |
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Adrian.Conlon
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1eb127ed72
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Add power support to processor base class.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-31 12:13:00 +01:00 |
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Adrian.Conlon
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e70686c5de
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Some more rationalisation of processor execution/stepping strategies.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-30 23:17:34 +01:00 |
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Adrian.Conlon
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ec15a2c90c
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Correct SP arithmetic methods: All Blargg CPU tests now pass. Hurrah!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-28 23:04:25 +01:00 |
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Adrian.Conlon
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91c8855183
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Share i8080 and Z80 I/O implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-28 21:41:10 +01:00 |
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Adrian.Conlon
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d710a28526
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More consolidation of instruction implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-28 21:18:08 +01:00 |
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Adrian.Conlon
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329fd269ed
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Share some more code from the 6502 processor implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-28 18:52:48 +01:00 |
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Adrian.Conlon
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59e9adf57c
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Share more of push/pop implementation across processors.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-28 13:19:17 +01:00 |
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Adrian.Conlon
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9964070b85
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Refactor to allow peek/poke/reference to share a common implementation as much as possible.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-24 11:28:01 +01:00 |
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Adrian.Conlon
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448ee2f09f
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Refactor the MBC implementation to allow a single point of definition.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-24 10:28:31 +01:00 |
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Adrian.Conlon
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2c7e32aa78
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First stab at implementing MBC1 support for LR35902. Not complete, but all old tests still work.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-23 23:17:45 +01:00 |
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Adrian.Conlon
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8716035396
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Second stage halt implementation: allow halt state to be exited by an interrupt.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-20 20:09:21 +01:00 |
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Adrian.Conlon
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7948962d70
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Because of its boot room, the LR35902 needs a custom clear mechanism.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-10 20:30:37 +01:00 |
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Adrian.Conlon
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016b3bca59
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Switch to a memory read/write event driven model. All tests passing.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-06 17:06:48 +01:00 |
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Adrian.Conlon
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b6dd48ca63
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Some more small clarifications of shared processor implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-25 18:56:43 +01:00 |
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Adrian.Conlon
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beca76d733
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Share instruction decoding mechanism between Intel derived processors.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-21 13:33:17 +01:00 |
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Adrian.Conlon
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99e3454527
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Memory locking is dependent on the GB hardware, not the size of the program, so allow lock ranges to be manually specified.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-18 21:40:29 +01:00 |
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Adrian.Conlon
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35def4184a
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Start adding enough infrastructure to support memory mapped IO on LR35902.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-18 00:13:41 +01:00 |
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Adrian.Conlon
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017b2a6442
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Tidy up memory event handling to make it a bit easier to verify read/write events.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-17 21:00:05 +01:00 |
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Adrian.Conlon
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4f491f110e
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Make the 6502 a little more compatible with other processor implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-17 13:46:06 +01:00 |
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Adrian.Conlon
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8c81a27224
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"Modernise" the 6502 emulator a little. Not complete, but does successfully complete Klaus Dormann tests.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-11 21:34:01 +01:00 |
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Adrian.Conlon
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3001a97128
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Don't bother wiring up memory events that the 6502 doesn't need (I think!)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-08 09:41:07 +01:00 |
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Adrian.Conlon
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8256d97b60
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Modified to work with my builds of the Klaus Dormann 6502 test suite.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-08 01:04:20 +01:00 |
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Adrian.Conlon
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3c0a1697fd
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Fetching bytes/words and stack access are more processor specific than I thought.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-07 09:27:06 +01:00 |
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Adrian.Conlon
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f970c45005
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Get the loop exit conditions worked out.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-06 21:32:52 +01:00 |
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Adrian.Conlon
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d4b133e9ac
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Show cycles per second as MHz
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-05 19:15:58 +01:00 |
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Adrian.Conlon
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6db32ae7c5
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Small consistency change in the 8-bit memory model.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-05 17:44:47 +01:00 |
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Adrian.Conlon
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0e7ad4dd01
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Correct a couple of inconsistencies in the test harness.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-05 17:40:16 +01:00 |
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Adrian.Conlon
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983639d530
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Correct a couple of header issues in the test harness.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-04 13:00:23 +01:00 |
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Adrian.Conlon
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88d3e4fd47
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Initial stab at getting MOS6502 imported to the EightBit library.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-02 22:03:33 +01:00 |
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Adrian.Conlon
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6af1857cb0
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A few minor consistency tweaks to the i8080 and z80 processors.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-02 17:38:19 +01:00 |
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Adrian.Conlon
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954887217f
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Performance mods: probably about 30% speedup: the best yet.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-29 00:50:34 +01:00 |
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