Adrian.Conlon
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88d773708c
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Correct some outstanding LR35902 problems arising.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-06 22:04:13 +01:00 |
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Adrian.Conlon
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016b3bca59
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Switch to a memory read/write event driven model. All tests passing.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-06 17:06:48 +01:00 |
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Adrian.Conlon
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261433bd6e
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Remove unneeded 16-bit operations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-27 21:44:24 +01:00 |
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Adrian.Conlon
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b6dd48ca63
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Some more small clarifications of shared processor implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-25 18:56:43 +01:00 |
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Adrian.Conlon
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9a264c7c06
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Bring the LR35902 and i8080 increment/decrement implementations in line with the Z80.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-22 10:23:13 +01:00 |
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Adrian.Conlon
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0a02c32695
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Some things (namely shift.rotate instructions) don't need to be quite so close to the Z80 implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-21 19:23:36 +01:00 |
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Adrian.Conlon
|
7c3fc469a8
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Bring LR35902 a little closer to the Z80
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-20 12:37:54 +01:00 |
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Adrian.Conlon
|
36fbee35fb
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Bring the various IntelProcessor derived processors a little closer together.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-07-19 13:59:28 +01:00 |
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Adrian.Conlon
|
758574007d
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Ensure GB register accesses pass through bus notification code.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-18 21:41:10 +01:00 |
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Adrian.Conlon
|
35def4184a
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Start adding enough infrastructure to support memory mapped IO on LR35902.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-18 00:13:41 +01:00 |
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Adrian.Conlon
|
af375ab10f
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Some more shared code.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-22 19:00:53 +01:00 |
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Adrian.Conlon
|
c9bf24d1fa
|
Tidy up register and static method access.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-06-19 13:53:00 +01:00 |
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Adrian.Conlon
|
23108a8536
|
Bring performance back to par by: inlining and static flag register access, where possible.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
|
2017-06-18 18:14:39 +01:00 |
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Adrian.Conlon
|
5f288cf0e3
|
Some more small tidy ups.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-06-16 20:31:32 +01:00 |
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Adrian.Conlon
|
327d391ecb
|
Remove another chunk of shared code. This time by ensuring the basic layout of registers is consistent.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-16 13:52:10 +01:00 |
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Adrian.Conlon
|
71e6902aeb
|
Simplify and remove a bunch of code. Getting there!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-15 22:21:26 +01:00 |
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Adrian.Conlon
|
66d3a5ae29
|
Couple of small simplifications.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-13 23:43:21 +01:00 |
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Adrian.Conlon
|
0291970427
|
Further work on uniting the 8080 family processor family.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-11 21:08:40 +01:00 |
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Adrian.Conlon
|
627e41bf35
|
Introduce an IntelProcessor base class to allow known good implementation to be shared.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-11 09:45:34 +01:00 |
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Adrian.Conlon
|
838580cc3d
|
More changes to bring LR35902 in line with the Z80 implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-09 16:01:12 +01:00 |
|
Adrian.Conlon
|
93bac42547
|
Bring LR35902 a little more in line with the Z80 implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
|
2017-06-09 11:42:32 +01:00 |
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Adrian.Conlon
|
f3fe475d44
|
Implement enough changes to build LR35902
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2017-06-09 10:23:51 +01:00 |
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Adrian.Conlon
|
105032f08a
|
Dump of all my C++ emulators, only Intel8080 integrated so far...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-04 21:38:34 +01:00 |
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