Commit Graph

52 Commits

Author SHA1 Message Date
Adrian.Conlon
c84b757ad9 Move GB documentation to be closer to the LR35902 implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-12 23:55:56 +01:00
Adrian.Conlon
dd873d9761 Start adding LR35902 tests, where wrong.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-12 23:54:53 +01:00
Adrian.Conlon
a24581caee Add comments pointing out GB specific instructions in the test input suite.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-12 15:48:15 +01:00
Adrian.Conlon
37c86fa5cf All comments in the LR35902 test input file
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-12 15:47:03 +01:00
Adrian.Conlon
0084d962c1 Unused Z80 prefixes removed from the test suite.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-12 14:49:32 +01:00
Adrian.Conlon
78e5451f93 Remove remaining Z80 -> LR35902 test translation code.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-12 14:29:12 +01:00
Adrian.Conlon
e7001b2425 Now runs the first pass of the translated Z80 tests as LR35902 style instructions
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-12 14:22:10 +01:00
Adrian.Conlon
5526892e2f Adjust for the differences between Z80 LR35902 flags (TBC!)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-11 23:16:24 +01:00
Adrian.Conlon
42b1b7dc53 Add a one off converter for Z80 -> LR35902 fuse tests (TBC!)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-10 23:46:41 +01:00
Adrian.Conlon
f0515ae65f First stab at a port of the fuse tests to LR35902.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-10 20:34:17 +01:00
Adrian.Conlon
7948962d70 Because of its boot room, the LR35902 needs a custom clear mechanism.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-10 20:30:37 +01:00
Adrian.Conlon
9fcb349e1f Brought the LR35902 a little closer to the Z80
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-08 13:32:51 +01:00
Adrian.Conlon
88d773708c Correct some outstanding LR35902 problems arising.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-06 22:04:13 +01:00
Adrian.Conlon
016b3bca59 Switch to a memory read/write event driven model. All tests passing.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-08-06 17:06:48 +01:00
Adrian.Conlon
261433bd6e Remove unneeded 16-bit operations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-27 21:44:24 +01:00
Adrian.Conlon
569e1925ce Merge branch 'master' of https://github.com/MoleskiCoder/EightBit 2017-07-25 21:23:27 +01:00
Adrian.Conlon
b6dd48ca63 Some more small clarifications of shared processor implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-25 18:56:43 +01:00
Adrian.Conlon
99c1e8e2f1 Correct 8-bit signed integer display problem in disassembler.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-22 14:07:26 +01:00
Adrian.Conlon
9a264c7c06 Bring the LR35902 and i8080 increment/decrement implementations in line with the Z80.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-22 10:23:13 +01:00
Adrian.Conlon
0a02c32695 Some things (namely shift.rotate instructions) don't need to be quite so close to the Z80 implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-21 19:23:36 +01:00
Adrian.Conlon
beca76d733 Share instruction decoding mechanism between Intel derived processors.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-21 13:33:17 +01:00
Adrian.Conlon
7c3fc469a8 Bring LR35902 a little closer to the Z80
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-20 12:37:54 +01:00
Adrian.Conlon
1ee9a010b5 Finally: a working daa
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-20 10:42:18 +01:00
Adrian.Conlon
9c240b7ea8 Correct for CF not being the first bit of the flags register (why!!!!)
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-19 23:16:17 +01:00
Adrian.Conlon
36fbee35fb Bring the various IntelProcessor derived processors a little closer together.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-07-19 13:59:28 +01:00
Adrian.Conlon
758574007d Ensure GB register accesses pass through bus notification code.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-18 21:41:10 +01:00
Adrian.Conlon
974c3353cc Simplify LR35902 memory read/write a little.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-07-18 11:28:06 +01:00
Adrian.Conlon
35def4184a Start adding enough infrastructure to support memory mapped IO on LR35902.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-18 00:13:41 +01:00
Adrian.Conlon
627d30e896 Merge branch 'master' of https://github.com/MoleskiCoder/EightBit 2017-07-17 21:39:13 +01:00
Adrian.Conlon
2b29c3fe64 Correct a couple of LR35902 issues.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-17 21:38:58 +01:00
Adrian.Conlon
3c0a1697fd Fetching bytes/words and stack access are more processor specific than I thought.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-07 09:27:06 +01:00
Adrian.Conlon
4cd2dc68e1 Correct some (but not all!) project configuration anomalies.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-05 19:36:25 +01:00
Adrian.Conlon
67174d74af Correct some memory access issues in LR35902
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-23 21:23:20 +01:00
Adrian.Conlon
af375ab10f Some more shared code.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-22 19:00:53 +01:00
Adrian.Conlon
052df61250 Remove get/getWord and set/setWord from memory class. Just use address and data lines on the memory.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-20 14:09:44 +01:00
Adrian.Conlon
c7e65f5447 Consistency changes to the projects.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-19 13:53:37 +01:00
Adrian.Conlon
c9bf24d1fa Tidy up register and static method access.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-19 13:53:00 +01:00
Adrian.Conlon
23108a8536 Bring performance back to par by: inlining and static flag register access, where possible.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-18 18:14:39 +01:00
Adrian.Conlon
5f288cf0e3 Some more small tidy ups.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-16 20:31:32 +01:00
Adrian.Conlon
327d391ecb Remove another chunk of shared code. This time by ensuring the basic layout of registers is consistent.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-16 13:52:10 +01:00
Adrian.Conlon
71e6902aeb Simplify and remove a bunch of code. Getting there!
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-15 22:21:26 +01:00
Adrian.Conlon
66d3a5ae29 Couple of small simplifications.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-13 23:43:21 +01:00
Adrian.Conlon
8f3aef1c3e Make LR35902 a little more like the Z80
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-11 23:56:11 +01:00
Adrian.Conlon
eb8a93726d Correct a few small LR35902 issues.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-11 22:07:48 +01:00
Adrian.Conlon
0291970427 Further work on uniting the 8080 family processor family.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-11 21:08:40 +01:00
Adrian.Conlon
627e41bf35 Introduce an IntelProcessor base class to allow known good implementation to be shared.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-11 09:45:34 +01:00
Adrian.Conlon
49d7a4c169 Whoops: missed a couple of flag adjustments.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-09 16:19:35 +01:00
Adrian.Conlon
838580cc3d More changes to bring LR35902 in line with the Z80 implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-09 16:01:12 +01:00
Adrian.Conlon
93bac42547 Bring LR35902 a little more in line with the Z80 implementation.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-09 11:42:32 +01:00
Adrian.Conlon
1c8d842bde Tidy header usage a little.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-09 10:29:28 +01:00