Adrian Conlon
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d010e3ca2f
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Start incorporating CPP core guidelines (as an experiment!)
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-11-10 22:41:50 +00:00 |
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Adrian Conlon
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8143f8a506
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Try to correct "one definition rule" problems:
1) No forward declarations
2) No virtual methods defined inline.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-11-05 12:47:42 +00:00 |
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Adrian Conlon
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c292fb552e
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A whole bunch of consistency changes. No functional changes.
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
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2017-11-03 22:05:01 +00:00 |
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Adrian.Conlon
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64b7335a79
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Attempted move to a "BUS" oriented memory architecture (TBC!)
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-09-06 13:22:23 +01:00 |
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Adrian.Conlon
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9b43b74c28
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Rationalise some of the reset/initialise logic across pProcessor implementations.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-09-01 16:01:40 +01:00 |
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Adrian.Conlon
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406e651c66
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Whoops: The processor should only execute instructions while it is powered. Otherwise, it'll get into an infinite loop.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-31 17:19:32 +01:00 |
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Adrian.Conlon
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1eb127ed72
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Add power support to processor base class.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-31 12:13:00 +01:00 |
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Adrian.Conlon
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e70686c5de
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Some more rationalisation of processor execution/stepping strategies.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-08-30 23:17:34 +01:00 |
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Adrian.Conlon
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3c0a1697fd
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Fetching bytes/words and stack access are more processor specific than I thought.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-07-07 09:27:06 +01:00 |
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Adrian.Conlon
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c9bf24d1fa
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Tidy up register and static method access.
Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
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2017-06-19 13:53:00 +01:00 |
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Adrian.Conlon
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627e41bf35
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Introduce an IntelProcessor base class to allow known good implementation to be shared.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-11 09:45:34 +01:00 |
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Adrian.Conlon
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b1aa523dcc
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Small simplifications to base Processor class.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-10 12:42:55 +01:00 |
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Adrian.Conlon
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d8977d32d3
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More MEMPTR clarifications.
This time to avoid temporary variables, in a similar manner to Z80 hardware.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-07 22:54:55 +01:00 |
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Adrian.Conlon
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211c75d84d
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Add Z80 processor and tests.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-05 22:39:15 +01:00 |
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Adrian.Conlon
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105032f08a
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Dump of all my C++ emulators, only Intel8080 integrated so far...
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
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2017-06-04 21:38:34 +01:00 |
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