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• 7948962d70 Because of its boot room, the LR35902 needs a custom clear mechanism. Adrian.Conlon 2017-08-10 20:30:37 +01:00
• 787d9dd799 Missed an easy "assume" entry Adrian.Conlon 2017-08-08 13:38:27 +01:00
• 9fcb349e1f Brought the LR35902 a little closer to the Z80 Adrian.Conlon 2017-08-08 13:32:51 +01:00
• 99c2e2a719 Tidy up the 10 addressing mode write set to make it clearer when memory writes occur. Adrian.Conlon 2017-08-07 21:25:21 +01:00
• aa720c4c12 Pass all Klaus Dormann tests again: correct AM_10 write algorithm. Adrian.Conlon 2017-08-07 21:02:31 +01:00
• ab20fc6107 Place Z80 documentation close to the Z80 emulator. Adrian.Conlon 2017-08-07 09:30:04 +01:00
• 88d773708c Correct some outstanding LR35902 problems arising. Adrian.Conlon 2017-08-06 22:04:13 +01:00
• 016b3bca59 Switch to a memory read/write event driven model. All tests passing. Adrian.Conlon 2017-08-06 17:06:48 +01:00
• 261433bd6e Remove unneeded 16-bit operations. Adrian.Conlon 2017-07-27 21:44:24 +01:00
• 569e1925ce Merge branch 'master' of https://github.com/MoleskiCoder/EightBit Adrian.Conlon 2017-07-25 21:23:27 +01:00
• 8535efb30d More i8080 and LR35902 consistency. Adrian.Conlon 2017-07-25 21:22:15 +01:00
• 1b11e0750b Try to make the 8080 emulator a little more like the LR35902 Adrian.Conlon 2017-07-25 20:52:10 +01:00
• fbf797a610 More unification of "IntelProcessor" derived classes. This time the i8080. Adrian.Conlon 2017-07-25 19:26:21 +01:00
• b6dd48ca63 Some more small clarifications of shared processor implementation. Adrian.Conlon 2017-07-25 18:56:43 +01:00
• ff21263b97 Correct a couple of small disassembly issues in the 8080 implementation Adrian.Conlon 2017-07-25 14:32:31 +01:00
• 2ae4e8331e Replace old i8080 disassembler with new (z80) style. Adrian.Conlon 2017-07-25 14:12:34 +01:00
• dfc02c7e54 Remove pointless comment. Adrian.Conlon 2017-07-24 22:02:55 +01:00
• c0c969c560 Use a z80 style instruction decoder for the i8080 emulator. Adrian.Conlon 2017-07-24 22:00:49 +01:00
• ad9d37237f Put i8080 instructions into their own region Adrian.Conlon 2017-07-23 10:26:53 +01:00
• 8f18a128cd First step of moving to an instruction decoder, rather than a lookup table. Adrian.Conlon 2017-07-22 23:52:58 +01:00
• 99c1e8e2f1 Correct 8-bit signed integer display problem in disassembler. Adrian.Conlon 2017-07-22 14:07:26 +01:00
• 9a264c7c06 Bring the LR35902 and i8080 increment/decrement implementations in line with the Z80. Adrian.Conlon 2017-07-22 10:23:13 +01:00
• 19966f6ad8 Z80 eight bit increment/decrement can be simplified a little Adrian.Conlon 2017-07-22 10:05:35 +01:00
• 0a02c32695 Some things (namely shift.rotate instructions) don't need to be quite so close to the Z80 implementation. Adrian.Conlon 2017-07-21 19:23:36 +01:00
• beca76d733 Share instruction decoding mechanism between Intel derived processors. Adrian.Conlon 2017-07-21 13:33:17 +01:00
• 7c3fc469a8 Bring LR35902 a little closer to the Z80 Adrian.Conlon 2017-07-20 12:37:54 +01:00
• d0e98fa585 Fix a missing file issue in the fuse test project. Adrian.Conlon 2017-07-20 12:17:37 +01:00
• bbbde22322 Modify some of the Z80 daa code to better reflect bool/integer differences. Adrian.Conlon 2017-07-20 12:17:03 +01:00
• 1ee9a010b5 Finally: a working daa Adrian.Conlon 2017-07-20 10:42:18 +01:00
• 9c240b7ea8 Correct for CF not being the first bit of the flags register (why!!!!) Adrian.Conlon 2017-07-19 23:16:17 +01:00
• 36fbee35fb Bring the various IntelProcessor derived processors a little closer together. Adrian.Conlon 2017-07-19 13:59:28 +01:00
• 758574007d Ensure GB register accesses pass through bus notification code. Adrian.Conlon 2017-07-18 21:41:10 +01:00
• 99e3454527 Memory locking is dependent on the GB hardware, not the size of the program, so allow lock ranges to be manually specified. Adrian.Conlon 2017-07-18 21:40:29 +01:00
• 974c3353cc Simplify LR35902 memory read/write a little. Adrian.Conlon 2017-07-18 11:28:06 +01:00
• 35def4184a Start adding enough infrastructure to support memory mapped IO on LR35902. Adrian.Conlon 2017-07-18 00:13:41 +01:00
• 627d30e896 Merge branch 'master' of https://github.com/MoleskiCoder/EightBit Adrian.Conlon 2017-07-17 21:39:13 +01:00
• 2b29c3fe64 Correct a couple of LR35902 issues. Adrian.Conlon 2017-07-17 21:38:58 +01:00
• 017b2a6442 Tidy up memory event handling to make it a bit easier to verify read/write events. Adrian.Conlon 2017-07-17 21:00:05 +01:00
• 13725b7a3c Tidy method casing a little. Adrian.Conlon 2017-07-17 15:35:24 +01:00
• da3b966666 Update readme to show the 6502 implementation is in pretty good shape. Adrian.Conlon 2017-07-17 13:48:15 +01:00
• 4f491f110e Make the 6502 a little more compatible with other processor implementations. Adrian.Conlon 2017-07-17 13:46:06 +01:00
• 867b0d5260 Add more flexible configuration class for 6502 Adrian.Conlon 2017-07-17 10:16:15 +01:00
• 71d213faec Ensure that memory read/write events are triggered. Adrian.Conlon 2017-07-16 10:40:38 +01:00
• d522b694bd Make the flag adjustment a little more consistent with the rest of my emulators. Adrian.Conlon 2017-07-16 10:05:49 +01:00
• d1bb49143d Reinstate operation timings (TBC) Adrian.Conlon 2017-07-15 23:19:46 +01:00
• 3084d2341c New improved disassembler for 6502: much smaller than before. Adrian.Conlon 2017-07-14 17:22:28 +01:00
• 7ff7ee040f Experimental decoding 6502 interpreter. Runs Klaus Dormann tests to completion. Adrian.Conlon 2017-07-13 12:02:44 +01:00
• 8c81a27224 "Modernise" the 6502 emulator a little. Not complete, but does successfully complete Klaus Dormann tests. Adrian.Conlon 2017-07-11 21:34:01 +01:00
• d3c0494fb3 Switch back to use standard bit encoded fields. Adrian.Conlon 2017-07-10 15:51:33 +01:00
• 3001a97128 Don't bother wiring up memory events that the 6502 doesn't need (I think!) Adrian.Conlon 2017-07-08 09:41:07 +01:00
• 8256d97b60 Modified to work with my builds of the Klaus Dormann 6502 test suite. Adrian.Conlon 2017-07-08 01:04:20 +01:00
• 179ec7435f Whoops: adjustment of the block output flag handling was quite wrong! Thanks fuse test suite! Adrian.Conlon 2017-07-07 20:55:32 +01:00
• 3146867101 Correct a couple of exception throws. Adrian.Conlon 2017-07-07 19:40:15 +01:00
• 3c0a1697fd Fetching bytes/words and stack access are more processor specific than I thought. Adrian.Conlon 2017-07-07 09:27:06 +01:00
• 7cd0f324de Better register definitions for the 6502 Adrian.Conlon 2017-07-07 09:24:58 +01:00
• f970c45005 Get the loop exit conditions worked out. Adrian.Conlon 2017-07-06 21:32:52 +01:00
• 04fd979e56 6502: Better wrapping for the executing/executed events to avoid "fetchByte" issue. Adrian.Conlon 2017-07-06 12:02:41 +01:00
• 4cd2dc68e1 Correct some (but not all!) project configuration anomalies. Adrian.Conlon 2017-07-05 19:36:25 +01:00
• d4b133e9ac Show cycles per second as MHz Adrian.Conlon 2017-07-05 19:15:58 +01:00
• 7910ada7fa First stab at a running M6502 test suite. Running Klaus Dormann tests Adrian.Conlon 2017-07-05 17:46:02 +01:00
• 6db32ae7c5 Small consistency change in the 8-bit memory model. Adrian.Conlon 2017-07-05 17:44:47 +01:00
• 0e7ad4dd01 Correct a couple of inconsistencies in the test harness. Adrian.Conlon 2017-07-05 17:40:16 +01:00
• 983639d530 Correct a couple of header issues in the test harness. Adrian.Conlon 2017-07-04 13:00:23 +01:00
• f52edaf8bc Tidy up 16-bit add/subtract to properly use MEMPTR. Adrian.Conlon 2017-07-03 21:42:18 +01:00
• 8f84d57fe1 A few small tidy ups. Adrian.Conlon 2017-07-02 22:23:20 +01:00
• 88d3e4fd47 Initial stab at getting MOS6502 imported to the EightBit library. Adrian.Conlon 2017-07-02 22:03:33 +01:00
• 6af1857cb0 A few minor consistency tweaks to the i8080 and z80 processors. Adrian.Conlon 2017-07-02 17:38:19 +01:00
• 8f57fac3ee Use the same optimisation techniques on the Z80 header. Up to 233Mhz now. Adrian.Conlon 2017-06-29 21:35:52 +01:00
• 3439523865 Some more optimisations, up to 225Mhz now. Adrian.Conlon 2017-06-29 21:25:58 +01:00
• 10ed04bf90 Update README.md Adrian.Conlon 2017-06-29 18:44:30 +01:00
• 366c3fc601 Simplification of bitwise operators. Adrian.Conlon 2017-06-29 12:19:22 +01:00
• ea4588992d Whoops: missing switch/break was falling into an assume(0). Caused two fuse tests to fail... Adrian.Conlon 2017-06-29 10:18:07 +01:00
• 954887217f Performance mods: probably about 30% speedup: the best yet. Adrian.Conlon 2017-06-29 00:50:34 +01:00
• 7582d65ea3 Lots more method tidy ups in search of performance. Adrian.Conlon 2017-06-28 15:39:31 +01:00
• 35efc86195 Simplify the use of the REFRESH register Adrian.Conlon 2017-06-27 14:02:29 +01:00
• c803387023 A few modifications: Adrian.Conlon 2017-06-26 23:22:32 +01:00
• d22b695682 Modify test harness to show host CPU cycle efficiency. Adrian.Conlon 2017-06-25 23:48:15 +01:00
• a7d9cb0116 Fix an optimisation instruction ordering issue: fetchByte on both rhs/lhs. Adrian.Conlon 2017-06-24 21:38:42 +01:00
• 993fe5d2b4 Correct position of fuse test input. Adrian.Conlon 2017-06-24 11:00:19 +01:00
• 67174d74af Correct some memory access issues in LR35902 Adrian.Conlon 2017-06-23 21:23:20 +01:00
• af375ab10f Some more shared code. Adrian.Conlon 2017-06-22 19:00:53 +01:00
• f776379e96 Share flag adjustments across implementations using templated methods. Adrian.Conlon 2017-06-22 16:57:38 +01:00
• 529aa1bd21 Tidy profile output Adrian.Conlon 2017-06-22 10:27:19 +01:00
• 23b5a5d579 Tidy the test harness a little. Adrian.Conlon 2017-06-22 10:16:02 +01:00
• 8927f412d4 Use a shared test harness. Adrian.Conlon 2017-06-21 23:55:25 +01:00
• 5a3713fc8a First stab at efficiency timing support for 8080 and z80 test runners. Adrian.Conlon 2017-06-21 21:05:07 +01:00
• 052df61250 Remove get/getWord and set/setWord from memory class. Just use address and data lines on the memory. Adrian.Conlon 2017-06-20 14:09:44 +01:00
• a4f8770eb0 Correct a couple of small compilation issues. Adrian.Conlon 2017-06-19 18:08:13 +01:00
• 67fa2a7afe Incorporate disassembly into address profile output. Adrian.Conlon 2017-06-19 17:37:41 +01:00
• c7e65f5447 Consistency changes to the projects. Adrian.Conlon 2017-06-19 13:53:37 +01:00
• c9bf24d1fa Tidy up register and static method access. Adrian.Conlon 2017-06-19 13:53:00 +01:00
• 23108a8536 Bring performance back to par by: inlining and static flag register access, where possible. Adrian.Conlon 2017-06-18 18:14:39 +01:00
• 5f288cf0e3 Some more small tidy ups. Adrian.Conlon 2017-06-16 20:31:32 +01:00
• 327d391ecb Remove another chunk of shared code. This time by ensuring the basic layout of registers is consistent. Adrian.Conlon 2017-06-16 13:52:10 +01:00
• c52f0a36aa Small performance change to 8080 reserved flags. Adrian.Conlon 2017-06-16 13:35:08 +01:00
• dc1f7ad1d5 Remove some commented header includes. Adrian.Conlon 2017-06-16 01:59:11 +01:00
• 675b82b5af Move to a more standard flag representation for the 8080 Adrian.Conlon 2017-06-16 01:58:12 +01:00
• 71e6902aeb Simplify and remove a bunch of code. Getting there! Adrian.Conlon 2017-06-15 22:21:26 +01:00
• 705351d179 Small tidy up on the block instructions to separate PC changes. Adrian.Conlon 2017-06-14 22:33:02 +01:00
• 1643844eaf Whoops: Roll back a "simplification" to the IX/IY + displacement handlers. Caused to failing "fuse" tests. Adrian.Conlon 2017-06-14 20:14:32 +01:00