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433 lines
12 KiB
Plaintext
433 lines
12 KiB
Plaintext
6502 Undocumented Opcodes
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
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Based on the Atari 8-bit 6502
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Version 3.0, 5/17/1997
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By Freddy Offenga (offen300@hio.tem.nhl.nl)
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This version is a direct follow up of the illegal opcode list by Joakim
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Atterhal (WosFilm) and me which was published in the Atari 8-bit disk
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magazine "Mega Maga-zine" issue #6. Most opcode names in this list
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originated from a disassembler for the Atari (The Symbolic
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Disas-sem-bler by HiasSoft).
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Credits:
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- Joakim Atterhal
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- Adam Vardy
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- Craig Taylor
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References:
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1. Illegal opcodes, WosFilm and Frankenstein,
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Mega Magazine #2, December 1991
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2. Illegal opcodes v2, WosFilm and Fran-ken-stein,
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Mega Maga-zine #6, October 1993
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3. Illegal Opcodes der 65xx-CPU, Frank Leiprecht,
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ABBUC Sondermagazin 10, Top-Maga-zin Oktober 1991
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4. Erg=E4nzung zu den Illegalen OP-Codes, Peter W=F6tzel,
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Top-M-ag-azin Januar 1992.
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5. 6502 Opcodes and Quasi-Opcodes, Craig Taylor, 1992
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6. Extra Instructions Of The 65XX Series CPU, Adam Vardy,
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27 Sept. 1996
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Changes since Version 2.0:
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Version 2.0 was compared with two Commodore 8-bit based lists found on
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the inter-net. There were some diffe-rences in opcode names, so I
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included the other names too. Names between curly brackets are the names
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taken from the list compiled by Craig Taylor. Names between square
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brackets are the names taken from the list by Adam Vardy.
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The old list was also compared with two other Atari 8-bit based lists
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(by Frank Leiprecht and Peter W=F6tzel). No new things were found on thes=
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e
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lists.
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The timing values (clock cycles) from all the opcodes were compared with
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the values on the list by Adam Vardy. There were no differen-ces.
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The addressing modes for the "DOP" (double nop) and "TOP" instructions
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were copied from Craig Taylor's list. The reason for this is that the
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different addressing modes explain the differences in the timing values.
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Opcode $8B was removed from the "AAX" table. The behaviour of this
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opcode seems to be comlex (as noted by several peop-le). Maybe there
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will be more information in the next version of this document. For now
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this opcode is called "XAA".
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The addressing mode for opcode $A3 (LAX) was false on the previous list.
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Changed to (indi-rect,x).
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The addressing modes for opcodes $13 and $03 (SLO) were swit-ched.
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Corrected in this version.
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Addressing mode for opcode $B7 (LAX) was "zero-page,x", but should be
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"zero-page,y". Corrected.
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Changed the suspicious opcode $93. This one was called "DOP", but is in
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fact another "AXA" instruction.
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Tested the behaviour of $9E (SXA), $9C (SYA) and $9B (XAS). There static
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AND with 7 mentioned in the old list was false. The observation of the
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function 'AND with the high byte of the argument + 1' (from Adam Vardy's
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list) seems to be correct.
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Opc : opcode in hexadecimal
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Sz : size in bytes
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n : number of clock cycles
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* : add one cycle when page boundary is crossed
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AAC (ANC) [ANC]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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AND byte with accumulator. If result is negative then carry is set.
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Status flags: N,Z,C
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Immediate |AAC #arg |$0B| 2 | 2
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Immediate |AAC #arg |$2B| 2 | 2
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AAX (SAX) [AXS]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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AND X register with accumulator and store result in memory. Status
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flags: N,Z
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Zero Page |AAX arg |$87| 2 | 3
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Zero Page,Y |AAX arg,Y |$97| 2 | 4
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(Indirect,X)|AAX (arg,X)|$83| 2 | 6
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Absolute |AAX arg |$8F| 3 | 4
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ARR (ARR) [ARR]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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AND byte with accumulator, then rotate one bit right in accu-mulator and
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check bit 5 and 6:
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If both bits are 1: set C, clear V.
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If both bits are 0: clear C and V.
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If only bit 5 is 1: set V, clear C.
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If only bit 6 is 1: set C and V.
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Status flags: N,V,Z,C
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Immediate |ARR #arg |$6B| 2 | 2
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ASR (ASR) [ALR]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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AND byte with accumulator, then shift right one bit in accumu-lator.
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Status flags: N,Z,C
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Immediate |ASR #arg |$4B| 2 | 2
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ATX (LXA) [OAL]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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AND byte with accumulator, then transfer accumulator to X register.
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Status flags: N,Z
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Immediate |ATX #arg |$AB| 2 | 2
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AXA (SHA) [AXA]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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AND X register with accumulator then AND result with 7 and store in
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memory. Status flags: -
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Absolute,Y |AXA arg,Y |$9F| 3 | 5
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(Indirect),Y|AXA arg |$93| 2 | 6
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AXS (SBX) [SAX]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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AND X register with accumulator and store result in X regis-ter, then
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subtract byte from X register (without borrow).
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Status flags: N,Z,C
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Immediate |AXS #arg |$CB| 2 | 2
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DCP (DCP) [DCM]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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Subtract 1 from memory (without borrow).
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Status flags: C
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Zero Page |DCP arg |$C7| 2 | 5
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Zero Page,X |DCP arg,X |$D7| 2 | 6
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Absolute |DCP arg |$CF| 3 | 6
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Absolute,X |DCP arg,X |$DF| 3 | 7
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Absolute,Y |DCP arg,Y |$DB| 3 | 7
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(Indirect,X)|DCP (arg,X)|$C3| 2 | 8
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(Indirect),Y|DCP (arg),Y|$D3| 2 | 8
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DOP (NOP) [SKB]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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No operation (double NOP). The argument has no signifi-cance. Status
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flags: -
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Zero Page |DOP arg |$04| 2 | 3
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Zero Page,X |DOP arg,X |$14| 2 | 4
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Zero Page,X |DOP arg,X |$34| 2 | 4
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Zero Page |DOP arg |$44| 2 | 3
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Zero Page,X |DOP arg,X |$54| 2 | 4
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Zero Page |DOP arg |$64| 2 | 3
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Zero Page,X |DOP arg,X |$74| 2 | 4
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Immediate |DOP #arg |$80| 2 | 2
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Immediate |DOP #arg |$82| 2 | 2
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Immediate |DOP #arg |$89| 2 | 2
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Immediate |DOP #arg |$C2| 2 | 2
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Zero Page,X |DOP arg,X |$D4| 2 | 4
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Immediate |DOP #arg |$E2| 2 | 2
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Zero Page,X |DOP arg,X |$F4| 2 | 4
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ISC (ISB) [INS]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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Increase memory by one, then subtract memory from accu-mulator (with
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borrow). Status flags: N,V,Z,C
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Zero Page |ISC arg |$E7| 2 | 5
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Zero Page,X |ISC arg,X |$F7| 2 | 6
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Absolute |ISC arg |$EF| 3 | 6
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Absolute,X |ISC arg,X |$FF| 3 | 7
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Absolute,Y |ISC arg,Y |$FB| 3 | 7
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(Indirect,X)|ISC (arg,X)|$E3| 2 | 8
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(Indirect),Y|ISC (arg),Y|$F3| 2 | 8
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KIL (JAM) [HLT]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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Stop program counter (processor lock up).
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Status flags: -
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Implied |KIL |$02| 1 | -
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Implied |KIL |$12| 1 | -
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Implied |KIL |$22| 1 | -
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Implied |KIL |$32| 1 | -
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Implied |KIL |$42| 1 | -
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Implied |KIL |$52| 1 | -
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Implied |KIL |$62| 1 | -
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Implied |KIL |$72| 1 | -
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Implied |KIL |$92| 1 | -
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Implied |KIL |$B2| 1 | -
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Implied |KIL |$D2| 1 | -
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Implied |KIL |$F2| 1 | -
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LAR (LAE) [LAS]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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AND memory with stack pointer, transfer result to accu-mulator, X
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register and stack pointer.
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Status flags: N,Z
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Absolute,Y |LAR arg,Y |$BB| 3 | 4 *
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LAX (LAX) [LAX]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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Load accumulator and X register with memory.
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Status flags: N,Z
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Zero Page |LAX arg |$A7| 2 | 3
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Zero Page,Y |LAX arg,Y |$B7| 2 | 4
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Absolute |LAX arg |$AF| 3 | 4
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Absolute,Y |LAX arg,Y |$BF| 3 | 4 *
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(Indirect,X)|LAX (arg,X)|$A3| 2 | 6
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(Indirect),Y|LAX (arg),Y|$B3| 2 | 5 *
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NOP (NOP) [NOP]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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No operation
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Status flags: -
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Implied |NOP |$1A| 1 | 2
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Implied |NOP |$3A| 1 | 2
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Implied |NOP |$5A| 1 | 2
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Implied |NOP |$7A| 1 | 2
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Implied |NOP |$DA| 1 | 2
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Implied |NOP |$FA| 1 | 2
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RLA (RLA) [RLA]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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Rotate one bit left in memory, then AND accumulator with memory. Status
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flags: N,Z,C
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Zero Page |RLA arg |$27| 2 | 5
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Zero Page,X |RLA arg,X |$37| 2 | 6
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Absolute |RLA arg |$2F| 3 | 6
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Absolute,X |RLA arg,X |$3F| 3 | 7
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Absolute,Y |RLA arg,Y |$3B| 3 | 7
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(Indirect,X)|RLA (arg,X)|$23| 2 | 8
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(Indirect),Y|RLA (arg),Y|$33| 2 | 8
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RRA (RRA) [RRA]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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Rotate one bit right in memory, then add memory to accumulator (with
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carry).
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Status flags: N,V,Z,C
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Zero Page |RRA arg |$67| 2 | 5
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Zero Page,X |RRA arg,X |$77| 2 | 6
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Absolute |RRA arg |$6F| 3 | 6
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Absolute,X |RRA arg,X |$7F| 3 | 7
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Absolute,Y |RRA arg,Y |$7B| 3 | 7
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(Indirect,X)|RRA (arg,X)|$63| 2 | 8
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(Indirect),Y|RRA (arg),Y|$73| 2 | 8
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SBC (SBC) [SBC]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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The same as the legal opcode $E9 (SBC #byte)
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Status flags: N,V,Z,C
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Immediate |SBC #byte |$EB| 2 | 2
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SLO (SLO) [ASO]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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Shift left one bit in memory, then OR accumulator with memory. =
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Status flags: N,Z,C
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Zero Page |SLO arg |$07| 2 | 5
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Zero Page,X |SLO arg,X |$17| 2 | 6
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Absolute |SLO arg |$0F| 3 | 6
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Absolute,X |SLO arg,X |$1F| 3 | 7
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Absolute,Y |SLO arg,Y |$1B| 3 | 7
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(Indirect,X)|SLO (arg,X)|$03| 2 | 8
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(Indirect),Y|SLO (arg),Y|$13| 2 | 8
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SRE (SRE) [LSE]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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Shift right one bit in memory, then EOR accumulator with memory. Status
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flags: N,Z,C
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Zero Page |SRE arg |$47| 2 | 5
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Zero Page,X |SRE arg,X |$57| 2 | 6
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Absolute |SRE arg |$4F| 3 | 6
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Absolute,X |SRE arg,X |$5F| 3 | 7
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Absolute,Y |SRE arg,Y |$5B| 3 | 7
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(Indirect,X)|SRE (arg,X)|$43| 2 | 8
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(Indirect),Y|SRE (arg),Y|$53| 2 | 8
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SXA (SHX) [XAS]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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AND X register with the high byte of the target address of the argument
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+ 1. Store the result in memory.
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M =3D X AND HIGH(arg) + 1
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Status flags: -
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Absolute,Y |SXA arg,Y |$9E| 3 | 5
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SYA (SHY) [SAY]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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AND Y register with the high byte of the target address of the argument
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+ 1. Store the result in memory.
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M =3D Y AND HIGH(arg) + 1
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Status flags: -
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Absolute,X |SYA arg,X |$9C| 3 | 5
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TOP (NOP) [SKW]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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No operation (tripple NOP). The argument has no signifi-cance. Status
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flags: -
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Absolute |TOP arg |$0C| 3 | 4
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Absolute,X |TOP arg,X |$1C| 3 | 4 *
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Absolute,X |TOP arg,X |$3C| 3 | 4 *
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Absolute,X |TOP arg,X |$5C| 3 | 4 *
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Absolute,X |TOP arg,X |$7C| 3 | 4 *
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Absolute,X |TOP arg,X |$DC| 3 | 4 *
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Absolute,X |TOP arg,X |$FC| 3 | 4 *
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XAA (ANE) [XAA]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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Exact operation unknown. Read the referenced documents for more
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information and observations.
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Immediate |XAA #arg |$8B| 2 | 2
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XAS (SHS) [TAS]
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
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AND X register with accumulator and store result in stack pointer, then
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AND stack pointer with the high byte of the target address of the
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argument + 1. Store result in memory.
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S =3D X AND A, M =3D S AND HIGH(arg) + 1
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Status flags: -
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Addressing |Mnemonics |Opc|Sz | n
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------------|-----------|---|---|---
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Absolute,Y |XAS arg,Y |$9B| 3 | 5 |