891 lines
20 KiB
C++
891 lines
20 KiB
C++
#include "stdafx.h"
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#include "../inc/LR35902.h"
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#include "../inc/GameBoyBus.h"
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// based on http://www.z80.info/decoding.htm
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EightBit::GameBoy::LR35902::LR35902(Bus& memory)
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: IntelProcessor(memory),
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m_bus(memory) {
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MachineTicked.connect([this](EventArgs) {
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m_bus.IO().incrementTimers();
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m_bus.IO().transferDma();
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});
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}
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const EightBit::register16_t& EightBit::GameBoy::LR35902::AF() const noexcept {
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auto* gb = const_cast<LR35902*>(this);
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gb->af.low = higherNibble(af.low);
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return af;
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}
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const EightBit::register16_t& EightBit::GameBoy::LR35902::BC() const noexcept {
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return bc;
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}
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const EightBit::register16_t& EightBit::GameBoy::LR35902::DE() const noexcept {
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return de;
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}
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const EightBit::register16_t& EightBit::GameBoy::LR35902::HL() const noexcept {
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return hl;
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}
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void EightBit::GameBoy::LR35902::handleRESET() noexcept {
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IntelProcessor::handleRESET();
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di();
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SP() = Mask16 - 1;
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tickMachine(4);
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}
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void EightBit::GameBoy::LR35902::handleINT() noexcept {
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IntelProcessor::handleINT();
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raiseHALT();
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di();
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restart(BUS().DATA());
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}
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void EightBit::GameBoy::LR35902::memoryWrite() noexcept {
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tickMachine();
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IntelProcessor::memoryWrite();
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}
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uint8_t EightBit::GameBoy::LR35902::memoryRead() noexcept {
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tickMachine();
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return IntelProcessor::memoryRead();
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}
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void EightBit::GameBoy::LR35902::pushWord(register16_t value) noexcept {
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tickMachine();
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IntelProcessor::pushWord(value);
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}
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void EightBit::GameBoy::LR35902::jr(int8_t offset) noexcept {
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IntelProcessor::jr(offset);
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tickMachine();
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}
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int EightBit::GameBoy::LR35902::jumpConditional(const int condition) noexcept {
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if (IntelProcessor::jumpConditional(condition))
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tickMachine();
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return condition;
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}
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int EightBit::GameBoy::LR35902::returnConditional(const int condition) noexcept {
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IntelProcessor::returnConditional(condition);
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tickMachine();
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return condition;
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}
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int EightBit::GameBoy::LR35902::jrConditional(const int condition) noexcept {
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if (!IntelProcessor::jrConditional(condition))
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tickMachine();
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return condition;
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}
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void EightBit::GameBoy::LR35902::ret() noexcept {
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IntelProcessor::ret();
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tickMachine();
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}
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void EightBit::GameBoy::LR35902::di() noexcept {
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IME() = false;
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}
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void EightBit::GameBoy::LR35902::ei() noexcept {
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IME() = true;
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}
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uint8_t EightBit::GameBoy::LR35902::increment(uint8_t& f, const uint8_t operand) noexcept {
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f = clearBit(f, NF);
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const uint8_t result = operand + 1;
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f = adjustZero<LR35902>(f, result);
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f = clearBit(f, HC, lowNibble(result));
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return result;
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}
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uint8_t EightBit::GameBoy::LR35902::decrement(uint8_t& f, const uint8_t operand) noexcept {
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f = setBit(f, NF);
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f = clearBit(f, HC, lowNibble(operand));
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const uint8_t result = operand - 1;
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f = adjustZero<LR35902>(f, result);
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return result;
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}
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uint8_t EightBit::GameBoy::LR35902::R(const int r) {
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switch (r) {
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case 0:
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return B();
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case 1:
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return C();
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case 2:
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return D();
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case 3:
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return E();
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case 4:
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return H();
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case 5:
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return L();
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case 6:
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return IntelProcessor::memoryRead(HL());
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case 7:
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return A();
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default:
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UNREACHABLE;
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}
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}
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void EightBit::GameBoy::LR35902::R(const int r, const uint8_t value) {
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switch (r) {
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case 0:
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B() = value;
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break;
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case 1:
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C() = value;
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break;
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case 2:
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D() = value;
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break;
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case 3:
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E() = value;
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break;
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case 4:
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H() = value;
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break;
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case 5:
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L() = value;
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break;
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case 6:
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IntelProcessor::memoryWrite(HL(), value);
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break;
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case 7:
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A() = value;
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break;
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default:
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UNREACHABLE;
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}
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}
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EightBit::register16_t& EightBit::GameBoy::LR35902::RP(const int rp) noexcept {
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switch (rp) {
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case 0b00:
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return BC();
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case 0b01:
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return DE();
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case 0b10:
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return HL();
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case 0b11:
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return SP();
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default:
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UNREACHABLE;
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}
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}
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EightBit::register16_t& EightBit::GameBoy::LR35902::RP2(const int rp) noexcept {
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switch (rp) {
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case 0b00:
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return BC();
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case 0b01:
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return DE();
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case 0b10:
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return HL();
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case 0b11:
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return AF();
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default:
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UNREACHABLE;
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}
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}
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bool EightBit::GameBoy::LR35902::convertCondition(const uint8_t f, int flag) noexcept {
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ASSUME(flag >= 0);
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ASSUME(flag <= 7);
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switch (flag) {
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case 0:
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return !(f & ZF);
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case 1:
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return f & ZF;
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case 2:
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return !(f & CF);
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case 3:
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return f & CF;
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default:
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UNREACHABLE;
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}
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}
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void EightBit::GameBoy::LR35902::returnConditionalFlag(const uint8_t f, const int flag) {
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returnConditional(convertCondition(f, flag));
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}
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void EightBit::GameBoy::LR35902::jrConditionalFlag(const uint8_t f, const int flag) {
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jrConditional(convertCondition(f, flag));
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}
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void EightBit::GameBoy::LR35902::jumpConditionalFlag(uint8_t f, const int flag) {
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jumpConditional(convertCondition(f, flag));
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}
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void EightBit::GameBoy::LR35902::callConditionalFlag(uint8_t f, const int flag) {
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callConditional(convertCondition(f, flag));
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}
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void EightBit::GameBoy::LR35902::reti() {
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ret();
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ei();
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}
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EightBit::register16_t EightBit::GameBoy::LR35902::add(uint8_t& f, const register16_t operand, const register16_t value) {
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tickMachine();
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const int addition = operand.word + value.word;
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const register16_t result = addition;
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f = clearBit(f, NF);
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f = setBit(f, CF, addition & Bit16);
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f = adjustHalfCarryAdd(f, operand.high, value.high, result.high);
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MEMPTR() = operand + 1;
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return result;
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}
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uint8_t EightBit::GameBoy::LR35902::add(uint8_t& f, const uint8_t operand, const uint8_t value, const int carry) noexcept {
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const register16_t addition = operand + value + carry;
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const auto result = addition.low;
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f = adjustHalfCarryAdd(f, operand, value, result);
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f = clearBit(f, NF);
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f = setBit(f, CF, addition.high & Bit0);
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f = adjustZero<LR35902>(f, result);
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return result;
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}
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uint8_t EightBit::GameBoy::LR35902::adc(uint8_t& f, const uint8_t operand, const uint8_t value) noexcept {
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return add(f, operand, value, (f & CF) >> 4);
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}
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uint8_t EightBit::GameBoy::LR35902::subtract(uint8_t& f, const uint8_t operand, const uint8_t value, const int carry) noexcept {
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const register16_t subtraction = operand - value - carry;
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const auto result = subtraction.low;
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f = adjustHalfCarrySub(f, operand, value, result);
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f = setBit(f, NF);
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f = setBit(f, CF, subtraction.high & Bit0);
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f = adjustZero<LR35902>(f, result);
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return result;
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}
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uint8_t EightBit::GameBoy::LR35902::sbc(uint8_t& f, const uint8_t operand, const uint8_t value) noexcept {
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return subtract(f, operand, value, (f & CF) >> 4);
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}
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uint8_t EightBit::GameBoy::LR35902::andr(uint8_t& f, const uint8_t operand, const uint8_t value) noexcept {
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f = setBit(f, HC);
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f = clearBit(f, CF | NF);
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const uint8_t result = operand & value;
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f = adjustZero<LR35902>(f, result);
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return result;
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}
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uint8_t EightBit::GameBoy::LR35902::xorr(uint8_t& f, const uint8_t operand, const uint8_t value) noexcept {
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f = clearBit(f, HC | CF | NF);
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const uint8_t result = operand ^ value;
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f = adjustZero<LR35902>(f, result);
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return result;
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}
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uint8_t EightBit::GameBoy::LR35902::orr(uint8_t& f, const uint8_t operand, const uint8_t value) noexcept {
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f = clearBit(f, HC | CF | NF);
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const uint8_t result = operand | value;
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f = adjustZero<LR35902>(f, result);
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return result;
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}
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void EightBit::GameBoy::LR35902::compare(uint8_t& f, uint8_t operand, const uint8_t value) noexcept {
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subtract(f, operand, value);
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}
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uint8_t EightBit::GameBoy::LR35902::rlc(uint8_t& f, const uint8_t operand) noexcept {
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f = clearBit(f, NF | HC | ZF);
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const auto carry = operand & Bit7;
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f = setBit(f, CF, carry);
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return (operand << 1) | (carry >> 7);
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}
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uint8_t EightBit::GameBoy::LR35902::rrc(uint8_t& f, const uint8_t operand) noexcept {
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f = clearBit(f, NF | HC | ZF);
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const auto carry = operand & Bit0;
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f = setBit(f, CF, carry);
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return (operand >> 1) | (carry << 7);
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}
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uint8_t EightBit::GameBoy::LR35902::rl(uint8_t& f, const uint8_t operand) noexcept {
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f = clearBit(f, NF | HC | ZF);
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const auto carry = f & CF;
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f = setBit(f, CF, operand & Bit7);
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return (operand << 1) | (carry >> 4); // CF at Bit4
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}
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uint8_t EightBit::GameBoy::LR35902::rr(uint8_t& f, const uint8_t operand) noexcept {
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f = clearBit(f, NF | HC | ZF);
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const auto carry = f & CF;
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f = setBit(f, CF, operand & Bit0);
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return (operand >> 1) | (carry << 3); // CF at Bit4
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}
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uint8_t EightBit::GameBoy::LR35902::sla(uint8_t& f, const uint8_t operand) noexcept {
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f = clearBit(f, NF | HC | ZF);
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f = setBit(f, CF, operand & Bit7);
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return operand << 1;
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}
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uint8_t EightBit::GameBoy::LR35902::sra(uint8_t& f, const uint8_t operand) noexcept {
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f = clearBit(f, NF | HC | ZF);
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f = setBit(f, CF, operand & Bit0);
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return (operand >> 1) | (operand & Bit7);
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}
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uint8_t EightBit::GameBoy::LR35902::swap(uint8_t& f, const uint8_t operand) noexcept {
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f = clearBit(f, NF | HC | CF);
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return promoteNibble(operand) | demoteNibble(operand);
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}
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uint8_t EightBit::GameBoy::LR35902::srl(uint8_t& f, const uint8_t operand) noexcept {
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f = clearBit(f, NF | HC | ZF);
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f = setBit(f, CF, operand & Bit0);
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return (operand >> 1) & ~Bit7;
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}
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void EightBit::GameBoy::LR35902::bit(uint8_t& f, const int n, const uint8_t operand) noexcept {
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ASSUME(n >= 0);
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ASSUME(n <= 7);
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const auto carry = f & CF;
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andr(f, operand, Chip::bit(n));
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f = setBit(f, CF, carry);
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}
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uint8_t EightBit::GameBoy::LR35902::res(const int n, const uint8_t operand) noexcept {
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ASSUME(n >= 0);
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ASSUME(n <= 7);
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return clearBit(operand, Chip::bit(n));
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}
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uint8_t EightBit::GameBoy::LR35902::set(const int n, const uint8_t operand) noexcept {
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ASSUME(n >= 0);
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ASSUME(n <= 7);
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return setBit(operand, Chip::bit(n));
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}
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uint8_t EightBit::GameBoy::LR35902::daa(uint8_t& f, uint8_t operand) noexcept {
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int updated = operand;
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if (f & NF) {
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if (f & HC)
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updated = (updated - 6) & Mask8;
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if (f & CF)
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updated -= 0x60;
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} else {
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if ((f & HC) || lowNibble(updated) > 9)
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updated += 6;
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if ((f & CF) || updated > 0x9F)
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updated += 0x60;
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}
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f = clearBit(f, HC | ZF);
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f = setBit(f, CF, (f & CF) || (updated & Bit8));
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const uint8_t result = updated & Mask8;
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f = adjustZero<LR35902>(f, result);
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return result;
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}
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uint8_t EightBit::GameBoy::LR35902::cpl(uint8_t& f, const uint8_t operand) noexcept {
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f = setBit(f, HC | NF);
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return ~operand;
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}
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void EightBit::GameBoy::LR35902::scf(uint8_t& f, const uint8_t operand) noexcept {
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f = setBit(f, CF);
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f = clearBit(f, HC | NF);
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}
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void EightBit::GameBoy::LR35902::ccf(uint8_t& f, const uint8_t operand) noexcept {
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f = clearBit(f, NF | HC);
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f = clearBit(f, CF, f & CF);
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}
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uint8_t EightBit::GameBoy::LR35902::enabledInterrupts() noexcept {
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return BUS().peek(IoRegisters::BASE + IoRegisters::IE);
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}
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uint8_t EightBit::GameBoy::LR35902::flaggedInterrupts() noexcept {
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return m_bus.IO().peek(IoRegisters::IF);
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}
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uint8_t EightBit::GameBoy::LR35902::maskedInterrupts() noexcept {
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return enabledInterrupts() & flaggedInterrupts();
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}
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int EightBit::GameBoy::LR35902::step() noexcept {
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ExecutingInstruction.fire(*this);
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m_prefixCB = false;
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resetCycles();
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if (LIKELY(powered())) {
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const auto masked = maskedInterrupts();
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if (masked) {
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if (IME()) {
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m_bus.IO().poke(IoRegisters::IF, 0);
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lowerINT();
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const int index = EightBit::findFirstSet(masked);
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BUS().DATA() = 0x38 + (index << 3);
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} else {
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raiseHALT();
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}
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}
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if (UNLIKELY(lowered(RESET()))) {
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handleRESET();
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} else if (UNLIKELY(lowered(INT()))) {
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handleINT();
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} else if (UNLIKELY(lowered(HALT()))) {
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IntelProcessor::memoryRead(PC());
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//Processor::execute(0); // NOP
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} else {
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Processor::execute(fetchByte());
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}
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}
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ExecutedInstruction.fire(*this);
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assert(cycles() > 0);
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assert(cycles() % 4 == 0);
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return cycles();
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}
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void EightBit::GameBoy::LR35902::execute() noexcept {
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const auto& decoded = getDecodedOpcode(opcode());
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const auto x = decoded.x;
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const auto y = decoded.y;
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const auto z = decoded.z;
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const auto p = decoded.p;
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const auto q = decoded.q;
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if (LIKELY(!m_prefixCB))
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executeOther(x, y, z, p, q);
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else
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executeCB(x, y, z, p, q);
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}
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void EightBit::GameBoy::LR35902::executeCB(const int x, const int y, const int z, int, int) {
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switch (x) {
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case 0: { // rot[y] r[z]
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auto operand = R(z);
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switch (y) {
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case 0:
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operand = rlc(F(), operand);
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break;
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case 1:
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operand = rrc(F(), operand);
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break;
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case 2:
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operand = rl(F(), operand);
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break;
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case 3:
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operand = rr(F(), operand);
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break;
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case 4:
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operand = sla(F(), operand);
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break;
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case 5:
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operand = sra(F(), operand);
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break;
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case 6: // GB: SWAP r
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operand = swap(F(), operand);
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break;
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case 7:
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operand = srl(F(), operand);
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break;
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default:
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UNREACHABLE;
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}
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R(z, operand);
|
|
F() = adjustZero<LR35902>(F(), operand);
|
|
break;
|
|
} case 1: // BIT y, r[z]
|
|
bit(F(), y, R(z));
|
|
break;
|
|
case 2: // RES y, r[z]
|
|
R(z, res(y, R(z)));
|
|
break;
|
|
case 3: // SET y, r[z]
|
|
R(z, set(y, R(z)));
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
}
|
|
|
|
void EightBit::GameBoy::LR35902::executeOther(const int x, const int y, const int z, const int p, const int q) {
|
|
switch (x) {
|
|
case 0:
|
|
switch (z) {
|
|
case 0: // Relative jumps and assorted ops
|
|
switch (y) {
|
|
case 0: // NOP
|
|
break;
|
|
case 1: // GB: LD (nn),SP
|
|
BUS().ADDRESS() = fetchWord();
|
|
setWord(SP());
|
|
break;
|
|
case 2: // GB: STOP
|
|
stop();
|
|
break;
|
|
case 3: // JR d
|
|
jr(fetchByte());
|
|
break;
|
|
case 4: // JR cc,d
|
|
case 5:
|
|
case 6:
|
|
case 7:
|
|
jrConditionalFlag(F(), y - 4);
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 1: // 16-bit load immediate/add
|
|
switch (q) {
|
|
case 0: // LD rp,nn
|
|
RP(p) = fetchWord();
|
|
break;
|
|
case 1: // ADD HL,rp
|
|
HL() = add(F(), HL(), RP(p));
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 2: // Indirect loading
|
|
switch (q) {
|
|
case 0:
|
|
switch (p) {
|
|
case 0: // LD (BC),A
|
|
IntelProcessor::memoryWrite(BC(), A());
|
|
break;
|
|
case 1: // LD (DE),A
|
|
IntelProcessor::memoryWrite(DE(), A());
|
|
break;
|
|
case 2: // GB: LDI (HL),A
|
|
IntelProcessor::memoryWrite(HL()++, A());
|
|
break;
|
|
case 3: // GB: LDD (HL),A
|
|
IntelProcessor::memoryWrite(HL()--, A());
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 1:
|
|
switch (p) {
|
|
case 0: // LD A,(BC)
|
|
A() = IntelProcessor::memoryRead(BC());
|
|
break;
|
|
case 1: // LD A,(DE)
|
|
A() = IntelProcessor::memoryRead(DE());
|
|
break;
|
|
case 2: // GB: LDI A,(HL)
|
|
A() = IntelProcessor::memoryRead(HL()++);
|
|
break;
|
|
case 3: // GB: LDD A,(HL)
|
|
A() = IntelProcessor::memoryRead(HL()--);
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 3: // 16-bit INC/DEC
|
|
switch (q) {
|
|
case 0: // INC rp
|
|
++RP(p);
|
|
break;
|
|
case 1: // DEC rp
|
|
--RP(p);
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
tickMachine();
|
|
break;
|
|
case 4: { // 8-bit INC
|
|
auto operand = R(y);
|
|
R(y, increment(F(), operand));
|
|
break;
|
|
} case 5: { // 8-bit DEC
|
|
auto operand = R(y);
|
|
R(y, decrement(F(), operand));
|
|
break;
|
|
} case 6: // 8-bit load immediate
|
|
R(y, fetchByte()); // LD r,n
|
|
break;
|
|
case 7: // Assorted operations on accumulator/flags
|
|
switch (y) {
|
|
case 0:
|
|
A() = rlc(F(), A());
|
|
break;
|
|
case 1:
|
|
A() = rrc(F(), A());
|
|
break;
|
|
case 2:
|
|
A() = rl(F(), A());
|
|
break;
|
|
case 3:
|
|
A() = rr(F(), A());
|
|
break;
|
|
case 4:
|
|
A() = daa(F(), A());
|
|
break;
|
|
case 5:
|
|
A() = cpl(F(), A());
|
|
break;
|
|
case 6:
|
|
scf(F(), A());
|
|
break;
|
|
case 7:
|
|
ccf(F(), A());
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 1: // 8-bit loading
|
|
if (UNLIKELY(z == 6 && y == 6)) { // Exception (replaces LD (HL), (HL))
|
|
lowerHALT();
|
|
} else {
|
|
R(y, R(z));
|
|
}
|
|
break;
|
|
case 2: // Operate on accumulator and register/memory location
|
|
switch (y) {
|
|
case 0: // ADD A,r
|
|
A() = add(F(), A(), R(z));
|
|
break;
|
|
case 1: // ADC A,r
|
|
A() = adc(F(), A(), R(z));
|
|
break;
|
|
case 2: // SUB r
|
|
A() = subtract(F(), A(), R(z));
|
|
break;
|
|
case 3: // SBC A,r
|
|
A() = sbc(F(), A(), R(z));
|
|
break;
|
|
case 4: // AND r
|
|
A() = andr(F(), A(), R(z));
|
|
break;
|
|
case 5: // XOR r
|
|
A() = xorr(F(), A(), R(z));
|
|
break;
|
|
case 6: // OR r
|
|
A() = orr(F(), A(), R(z));
|
|
break;
|
|
case 7: // CP r
|
|
compare(F(), A(), R(z));
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 3:
|
|
switch (z) {
|
|
case 0: // Conditional return
|
|
switch (y) {
|
|
case 0:
|
|
case 1:
|
|
case 2:
|
|
case 3:
|
|
returnConditionalFlag(F(), y);
|
|
break;
|
|
case 4: // GB: LD (FF00 + n),A
|
|
IntelProcessor::memoryWrite(IoRegisters::BASE + fetchByte(), A());
|
|
break;
|
|
case 5: { // GB: ADD SP,dd
|
|
const auto before = SP().word;
|
|
const int8_t value = fetchByte();
|
|
tickMachine(2);
|
|
const auto result = before + value;
|
|
SP() = result;
|
|
const auto carried = before ^ value ^ (result & Mask16);
|
|
F() = clearBit(F(), ZF | NF);
|
|
F() = setBit(F(), CF, carried & Bit8);
|
|
F() = setBit(F(), HC, carried & Bit4);
|
|
}
|
|
break;
|
|
case 6: // GB: LD A,(FF00 + n)
|
|
A() = IntelProcessor::memoryRead(IoRegisters::BASE + fetchByte());
|
|
break;
|
|
case 7: { // GB: LD HL,SP + dd
|
|
const auto before = SP().word;
|
|
const int8_t value = fetchByte();
|
|
tickMachine();
|
|
const auto result = before + value;
|
|
HL() = result;
|
|
const auto carried = before ^ value ^ (result & Mask16);
|
|
F() = clearBit(F(), ZF | NF);
|
|
F() = setBit(F(), CF, carried & Bit8);
|
|
F() = setBit(F(), HC, carried & Bit4);
|
|
}
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 1: // POP & various ops
|
|
switch (q) {
|
|
case 0: // POP rp2[p]
|
|
RP2(p) = popWord();
|
|
break;
|
|
case 1:
|
|
switch (p) {
|
|
case 0: // RET
|
|
ret();
|
|
break;
|
|
case 1: // GB: RETI
|
|
reti();
|
|
break;
|
|
case 2: // JP HL
|
|
jump(HL());
|
|
break;
|
|
case 3: // LD SP,HL
|
|
SP() = HL();
|
|
tickMachine();
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 2: // Conditional jump
|
|
switch (y) {
|
|
case 0:
|
|
case 1:
|
|
case 2:
|
|
case 3:
|
|
jumpConditionalFlag(F(), y);
|
|
break;
|
|
case 4: // GB: LD (FF00 + C),A
|
|
IntelProcessor::memoryWrite(IoRegisters::BASE + C(), A());
|
|
break;
|
|
case 5: // GB: LD (nn),A
|
|
MEMPTR() = BUS().ADDRESS() = fetchWord();
|
|
IntelProcessor::memoryWrite(A());
|
|
break;
|
|
case 6: // GB: LD A,(FF00 + C)
|
|
A() = IntelProcessor::memoryRead(IoRegisters::BASE + C());
|
|
break;
|
|
case 7: // GB: LD A,(nn)
|
|
MEMPTR() = BUS().ADDRESS() = fetchWord();
|
|
A() = memoryRead();
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 3: // Assorted operations
|
|
switch (y) {
|
|
case 0: // JP nn
|
|
jump(MEMPTR() = fetchWord());
|
|
tickMachine();
|
|
break;
|
|
case 1: // CB prefix
|
|
m_prefixCB = true;
|
|
Processor::execute(fetchByte());
|
|
break;
|
|
case 6: // DI
|
|
di();
|
|
break;
|
|
case 7: // EI
|
|
ei();
|
|
break;
|
|
}
|
|
break;
|
|
case 4: // Conditional call: CALL cc[y], nn
|
|
callConditionalFlag(F(), y);
|
|
break;
|
|
case 5: // PUSH & various ops
|
|
switch (q) {
|
|
case 0: // PUSH rp2[p]
|
|
pushWord(RP2(p));
|
|
break;
|
|
case 1:
|
|
switch (p) {
|
|
case 0: // CALL nn
|
|
call(MEMPTR() = fetchWord());
|
|
break;
|
|
}
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 6: // Operate on accumulator and immediate operand: alu[y] n
|
|
switch (y) {
|
|
case 0: // ADD A,n
|
|
A() = add(F(), A(), fetchByte());
|
|
break;
|
|
case 1: // ADC A,n
|
|
A() = adc(F(), A(), fetchByte());
|
|
break;
|
|
case 2: // SUB n
|
|
A() = subtract(F(), A(), fetchByte());
|
|
break;
|
|
case 3: // SBC A,n
|
|
A() = sbc(F(), A(), fetchByte());
|
|
break;
|
|
case 4: // AND n
|
|
A() = andr(F(), A(), fetchByte());
|
|
break;
|
|
case 5: // XOR n
|
|
A() = xorr(F(), A(), fetchByte());
|
|
break;
|
|
case 6: // OR n
|
|
A() = orr(F(), A(), fetchByte());
|
|
break;
|
|
case 7: // CP n
|
|
compare(F(), A(), fetchByte());
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 7: // Restart: RST y * 8
|
|
restart(y << 3);
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
}
|
|
}
|