mirror of
https://github.com/MoleskiCoder/EightBit.git
synced 2024-06-12 01:29:27 +00:00
827 lines
17 KiB
C++
827 lines
17 KiB
C++
#include "stdafx.h"
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#include "LR35902.h"
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#include "GameBoyBus.h"
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// based on http://www.z80.info/decoding.htm
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EightBit::GameBoy::LR35902::LR35902(Bus& memory)
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: IntelProcessor(memory),
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m_bus(memory) {
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}
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EightBit::register16_t& EightBit::GameBoy::LR35902::AF() {
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af.low = higherNibble(af.low);
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return af;
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}
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EightBit::register16_t& EightBit::GameBoy::LR35902::BC() {
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return bc;
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}
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EightBit::register16_t& EightBit::GameBoy::LR35902::DE() {
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return de;
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}
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EightBit::register16_t& EightBit::GameBoy::LR35902::HL() {
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return hl;
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}
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void EightBit::GameBoy::LR35902::handleRESET() {
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IntelProcessor::handleRESET();
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di();
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SP() = Mask16 - 1;
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tick(4);
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}
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void EightBit::GameBoy::LR35902::handleINT() {
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IntelProcessor::handleINT();
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raiseHALT();
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di();
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restart(BUS().DATA());
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tick(4);
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}
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void EightBit::GameBoy::LR35902::di() {
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IME() = false;
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}
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void EightBit::GameBoy::LR35902::ei() {
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IME() = true;
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}
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void EightBit::GameBoy::LR35902::increment(uint8_t& operand) {
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F() = clearBit(F(), NF);
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F() = adjustZero<LR35902>(F(), ++operand);
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F() = clearBit(F(), HC, lowNibble(operand));
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}
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void EightBit::GameBoy::LR35902::decrement(uint8_t& operand) {
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F() = setBit(F(), NF);
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F() = clearBit(F(), HC, lowNibble(operand));
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F() = adjustZero<LR35902>(F(), --operand);
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}
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int EightBit::GameBoy::LR35902::jrConditionalFlag(const int flag) {
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switch (flag) {
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case 0: // NZ
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return jrConditional(!(F() & ZF));
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case 1: // Z
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return jrConditional(F() & ZF);
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case 2: // NC
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return jrConditional(!(F() & CF));
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case 3: // C
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return jrConditional(F() & CF);
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default:
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UNREACHABLE;
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}
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}
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int EightBit::GameBoy::LR35902::jumpConditionalFlag(const int flag) {
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switch (flag) {
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case 0: // NZ
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return jumpConditional(!(F() & ZF));
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case 1: // Z
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return jumpConditional(F() & ZF);
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case 2: // NC
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return jumpConditional(!(F() & CF));
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case 3: // C
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return jumpConditional(F() & CF);
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default:
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UNREACHABLE;
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}
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}
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void EightBit::GameBoy::LR35902::reti() {
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ret();
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ei();
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}
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int EightBit::GameBoy::LR35902::returnConditionalFlag(const int flag) {
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switch (flag) {
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case 0: // NZ
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return returnConditional(!(F() & ZF));
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case 1: // Z
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return returnConditional(F() & ZF);
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case 2: // NC
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return returnConditional(!(F() & CF));
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case 3: // C
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return returnConditional(F() & CF);
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default:
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UNREACHABLE;
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}
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}
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int EightBit::GameBoy::LR35902::callConditionalFlag(const int flag) {
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switch (flag) {
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case 0: // NZ
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return callConditional(!(F() & ZF));
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case 1: // Z
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return callConditional(F() & ZF);
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case 2: // NC
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return callConditional(!(F() & CF));
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case 3: // C
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return callConditional(F() & CF);
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default:
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UNREACHABLE;
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}
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}
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void EightBit::GameBoy::LR35902::add(register16_t& operand, const register16_t value) {
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MEMPTR() = operand;
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const auto result = MEMPTR().word + value.word;
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operand.word = result;
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F() = clearBit(F(), NF);
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F() = setBit(F(), CF, result & Bit16);
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adjustHalfCarryAdd(MEMPTR().high, value.high, operand.high);
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}
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void EightBit::GameBoy::LR35902::add(uint8_t& operand, const uint8_t value, const int carry) {
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const register16_t result = operand + value + carry;
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adjustHalfCarryAdd(operand, value, result.low);
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operand = result.low;
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F() = clearBit(F(), NF);
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F() = setBit(F(), CF, result.word & Bit8);
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F() = adjustZero<LR35902>(F(), operand);
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}
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void EightBit::GameBoy::LR35902::adc(uint8_t& operand, const uint8_t value) {
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add(operand, value, (F() & CF) >> 4);
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}
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void EightBit::GameBoy::LR35902::subtract(uint8_t& operand, const uint8_t value, const int carry) {
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const register16_t result = operand - value - carry;
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adjustHalfCarrySub(operand, value, result.low);
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operand = result.low;
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F() = setBit(F(), NF);
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F() = setBit(F(), CF, result.word & Bit8);
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F() = adjustZero<LR35902>(F(), operand);
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}
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void EightBit::GameBoy::LR35902::sbc(const uint8_t value) {
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subtract(A(), value, (F() & CF) >> 4);
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}
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void EightBit::GameBoy::LR35902::andr(uint8_t& operand, const uint8_t value) {
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F() = setBit(F(), HC);
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F() = clearBit(F(), CF | NF);
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F() = adjustZero<LR35902>(F(), operand &= value);
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}
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void EightBit::GameBoy::LR35902::xorr(const uint8_t value) {
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F() = clearBit(F(), HC | CF | NF);
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F() = adjustZero<LR35902>(F(), A() ^= value);
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}
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void EightBit::GameBoy::LR35902::orr(const uint8_t value) {
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F() = clearBit(F(), HC | CF | NF);
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F() = adjustZero<LR35902>(F(), A() |= value);
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}
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void EightBit::GameBoy::LR35902::compare(uint8_t check, const uint8_t value) {
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subtract(check, value);
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}
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uint8_t EightBit::GameBoy::LR35902::rlc(const uint8_t operand) {
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F() = clearBit(F(), NF | HC | ZF);
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const auto carry = operand & Bit7;
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F() = setBit(F(), CF, carry);
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return (operand << 1) | (carry >> 7);
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}
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uint8_t EightBit::GameBoy::LR35902::rrc(const uint8_t operand) {
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F() = clearBit(F(), NF | HC | ZF);
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const auto carry = operand & Bit0;
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F() = setBit(F(), CF, carry);
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return (operand >> 1) | (carry << 7);
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}
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uint8_t EightBit::GameBoy::LR35902::rl(const uint8_t operand) {
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F() = clearBit(F(), NF | HC | ZF);
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const auto carry = F() & CF;
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F() = setBit(F(), CF, operand & Bit7);
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return (operand << 1) | (carry >> 4); // CF at Bit4
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}
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uint8_t EightBit::GameBoy::LR35902::rr(const uint8_t operand) {
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F() = clearBit(F(), NF | HC | ZF);
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const auto carry = F() & CF;
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F() = setBit(F(), CF, operand & Bit0);
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return (operand >> 1) | (carry << 3); // CF at Bit4
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}
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uint8_t EightBit::GameBoy::LR35902::sla(const uint8_t operand) {
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F() = clearBit(F(), NF | HC | ZF);
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F() = setBit(F(), CF, operand & Bit7);
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return operand << 1;
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}
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uint8_t EightBit::GameBoy::LR35902::sra(const uint8_t operand) {
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F() = clearBit(F(), NF | HC | ZF);
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F() = setBit(F(), CF, operand & Bit0);
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return (operand >> 1) | (operand & Bit7);
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}
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uint8_t EightBit::GameBoy::LR35902::swap(const uint8_t operand) {
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F() = clearBit(F(), NF | HC | CF);
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return promoteNibble(operand) | demoteNibble(operand);
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}
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uint8_t EightBit::GameBoy::LR35902::srl(const uint8_t operand) {
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F() = clearBit(F(), NF | HC | ZF);
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F() = setBit(F(), CF, operand & Bit0);
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return (operand >> 1) & ~Bit7;
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}
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void EightBit::GameBoy::LR35902::bit(const int n, const uint8_t operand) {
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const auto carry = F() & CF;
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uint8_t discarded = operand;
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andr(discarded, Chip::bit(n));
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F() = setBit(F(), CF, carry);
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}
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uint8_t EightBit::GameBoy::LR35902::res(const int n, const uint8_t operand) {
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return operand & ~Chip::bit(n);
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}
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uint8_t EightBit::GameBoy::LR35902::set(const int n, const uint8_t operand) {
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return operand | Chip::bit(n);
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}
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void EightBit::GameBoy::LR35902::daa() {
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int updated = A();
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if (F() & NF) {
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if (F() & HC)
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updated = (updated - 6) & Mask8;
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if (F() & CF)
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updated -= 0x60;
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} else {
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if ((F() & HC) || lowNibble(updated) > 9)
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updated += 6;
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if ((F() & CF) || updated > 0x9F)
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updated += 0x60;
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}
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F() = clearBit(F(), HC | ZF);
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F() = setBit(F(), CF, (F() & CF) || (updated & Bit8));
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A() = updated & Mask8;
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F() = adjustZero<LR35902>(F(), A());
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}
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void EightBit::GameBoy::LR35902::cpl() {
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F() = setBit(F(), HC | NF);
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A() = ~A();
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}
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void EightBit::GameBoy::LR35902::scf() {
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F() = setBit(F(), CF);
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F() = clearBit(F(), HC | NF);
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}
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void EightBit::GameBoy::LR35902::ccf() {
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F() = clearBit(F(), NF | HC);
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F() = clearBit(F(), CF, F() & CF);
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}
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int EightBit::GameBoy::LR35902::step() {
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ExecutingInstruction.fire(*this);
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m_prefixCB = false;
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resetCycles();
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if (LIKELY(powered())) {
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const auto interruptEnable = BUS().peek(IoRegisters::BASE + IoRegisters::IE);
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const auto interruptFlags = m_bus.IO().peek(IoRegisters::IF);
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const auto masked = interruptEnable & interruptFlags;
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if (masked) {
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if (IME()) {
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m_bus.IO().poke(IoRegisters::IF, 0);
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lowerINT();
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const int index = EightBit::findFirstSet(masked);
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BUS().DATA() = 0x38 + (index << 3);
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} else {
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raiseHALT();
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}
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}
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if (UNLIKELY(lowered(RESET()))) {
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handleRESET();
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} else if (UNLIKELY(lowered(INT()))) {
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handleINT();
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} else if (UNLIKELY(lowered(HALT()))) {
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Processor::execute(0); // NOP
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} else {
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Processor::execute(fetchByte());
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}
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m_bus.IO().checkTimers(clockCycles());
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m_bus.IO().transferDma();
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}
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ExecutedInstruction.fire(*this);
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return clockCycles();
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}
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int EightBit::GameBoy::LR35902::execute() {
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const auto& decoded = getDecodedOpcode(opcode());
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const auto x = decoded.x;
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const auto y = decoded.y;
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const auto z = decoded.z;
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const auto p = decoded.p;
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const auto q = decoded.q;
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if (LIKELY(!m_prefixCB))
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executeOther(x, y, z, p, q);
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else
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executeCB(x, y, z, p, q);
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if (UNLIKELY(cycles() == 0))
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throw std::logic_error("Unhandled opcode");
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return clockCycles();
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}
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void EightBit::GameBoy::LR35902::executeCB(const int x, const int y, const int z, int, int) {
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switch (x) {
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case 0: { // rot[y] r[z]
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auto operand = R(z);
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switch (y) {
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case 0:
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operand = rlc(operand);
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break;
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case 1:
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operand = rrc(operand);
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break;
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case 2:
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operand = rl(operand);
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break;
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case 3:
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operand = rr(operand);
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break;
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case 4:
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operand = sla(operand);
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break;
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case 5:
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operand = sra(operand);
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break;
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case 6: // GB: SWAP r
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operand = swap(operand);
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break;
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case 7:
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operand = srl(operand);
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break;
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default:
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UNREACHABLE;
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}
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tick(2);
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R(z, operand);
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F() = adjustZero<LR35902>(F(), operand);
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if (UNLIKELY(z == 6))
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tick(2);
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break;
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} case 1: // BIT y, r[z]
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bit(y, R(z));
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tick(2);
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if (UNLIKELY(z == 6))
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tick(2);
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break;
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case 2: // RES y, r[z]
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R(z, res(y, R(z)));
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tick(2);
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if (UNLIKELY(z == 6))
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tick(2);
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break;
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case 3: // SET y, r[z]
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R(z, set(y, R(z)));
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tick(2);
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if (UNLIKELY(z == 6))
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tick(2);
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break;
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default:
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UNREACHABLE;
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}
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}
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void EightBit::GameBoy::LR35902::executeOther(const int x, const int y, const int z, const int p, const int q) {
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switch (x) {
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case 0:
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switch (z) {
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case 0: // Relative jumps and assorted ops
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switch (y) {
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case 0: // NOP
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tick();
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break;
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case 1: // GB: LD (nn),SP
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BUS().ADDRESS() = fetchWord();
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setWord(SP());
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tick(5);
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break;
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case 2: // GB: STOP
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stop();
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tick();
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break;
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case 3: // JR d
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jr(fetchByte());
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tick(4);
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break;
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case 4: // JR cc,d
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case 5:
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case 6:
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case 7:
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if (jrConditionalFlag(y - 4))
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tick();
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tick(2);
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break;
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default:
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UNREACHABLE;
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}
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break;
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case 1: // 16-bit load immediate/add
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switch (q) {
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case 0: // LD rp,nn
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RP(p) = fetchWord();
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tick(3);
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break;
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case 1: // ADD HL,rp
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add(HL(), RP(p));
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tick(2);
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break;
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default:
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UNREACHABLE;
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}
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break;
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case 2: // Indirect loading
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switch (q) {
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case 0:
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switch (p) {
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case 0: // LD (BC),A
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IntelProcessor::memoryWrite(BC(), A());
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tick(2);
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break;
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case 1: // LD (DE),A
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IntelProcessor::memoryWrite(DE(), A());
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tick(2);
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break;
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case 2: // GB: LDI (HL),A
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IntelProcessor::memoryWrite(HL()++, A());
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tick(2);
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break;
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case 3: // GB: LDD (HL),A
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IntelProcessor::memoryWrite(HL()--, A());
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tick(2);
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break;
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default:
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UNREACHABLE;
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}
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break;
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case 1:
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switch (p) {
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case 0: // LD A,(BC)
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A() = IntelProcessor::memoryRead(BC());
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tick(2);
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break;
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case 1: // LD A,(DE)
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A() = IntelProcessor::memoryRead(DE());
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tick(2);
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break;
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case 2: // GB: LDI A,(HL)
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A() = IntelProcessor::memoryRead(HL()++);
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tick(2);
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break;
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case 3: // GB: LDD A,(HL)
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A() = IntelProcessor::memoryRead(HL()--);
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tick(2);
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break;
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default:
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UNREACHABLE;
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}
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break;
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default:
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UNREACHABLE;
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}
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break;
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case 3: // 16-bit INC/DEC
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switch (q) {
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case 0: // INC rp
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++RP(p);
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break;
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case 1: // DEC rp
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--RP(p);
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break;
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default:
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UNREACHABLE;
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}
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tick(2);
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break;
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case 4: { // 8-bit INC
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auto operand = R(y);
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increment(operand);
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R(y, operand);
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tick();
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if (UNLIKELY(y == 6))
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tick(2);
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break;
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} case 5: { // 8-bit DEC
|
|
auto operand = R(y);
|
|
decrement(operand);
|
|
R(y, operand);
|
|
tick();
|
|
if (UNLIKELY(y == 6))
|
|
tick(2);
|
|
break;
|
|
} case 6: // 8-bit load immediate
|
|
R(y, fetchByte()); // LD r,n
|
|
tick(2);
|
|
break;
|
|
case 7: // Assorted operations on accumulator/flags
|
|
switch (y) {
|
|
case 0:
|
|
A() = rlc(A());
|
|
break;
|
|
case 1:
|
|
A() = rrc(A());
|
|
break;
|
|
case 2:
|
|
A() = rl(A());
|
|
break;
|
|
case 3:
|
|
A() = rr(A());
|
|
break;
|
|
case 4:
|
|
daa();
|
|
break;
|
|
case 5:
|
|
cpl();
|
|
break;
|
|
case 6:
|
|
scf();
|
|
break;
|
|
case 7:
|
|
ccf();
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
tick();
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 1: // 8-bit loading
|
|
if (UNLIKELY(z == 6 && y == 6)) { // Exception (replaces LD (HL), (HL))
|
|
lowerHALT();
|
|
} else {
|
|
R(y, R(z));
|
|
if (UNLIKELY((y == 6) || (z == 6))) // M operations
|
|
tick();
|
|
}
|
|
tick();
|
|
break;
|
|
case 2: // Operate on accumulator and register/memory location
|
|
switch (y) {
|
|
case 0: // ADD A,r
|
|
add(A(), R(z));
|
|
break;
|
|
case 1: // ADC A,r
|
|
adc(A(), R(z));
|
|
break;
|
|
case 2: // SUB r
|
|
subtract(A(), R(z));
|
|
break;
|
|
case 3: // SBC A,r
|
|
sbc(R(z));
|
|
break;
|
|
case 4: // AND r
|
|
andr(A(), R(z));
|
|
break;
|
|
case 5: // XOR r
|
|
xorr(R(z));
|
|
break;
|
|
case 6: // OR r
|
|
orr(R(z));
|
|
break;
|
|
case 7: // CP r
|
|
compare(A(), R(z));
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
tick();
|
|
if (UNLIKELY(z == 6))
|
|
tick();
|
|
break;
|
|
case 3:
|
|
switch (z) {
|
|
case 0: // Conditional return
|
|
switch (y) {
|
|
case 0:
|
|
case 1:
|
|
case 2:
|
|
case 3:
|
|
if (returnConditionalFlag(y))
|
|
tick(3);
|
|
tick(2);
|
|
break;
|
|
case 4: // GB: LD (FF00 + n),A
|
|
IntelProcessor::memoryWrite(IoRegisters::BASE + fetchByte(), A());
|
|
tick(3);
|
|
break;
|
|
case 5: { // GB: ADD SP,dd
|
|
const auto before = SP().word;
|
|
const int8_t value = fetchByte();
|
|
const auto result = before + value;
|
|
SP() = result;
|
|
const auto carried = before ^ value ^ (result & Mask16);
|
|
F() = clearBit(F(), ZF | NF);
|
|
F() = setBit(F(), CF, carried & Bit8);
|
|
F() = setBit(F(), HC, carried & Bit4);
|
|
}
|
|
tick(4);
|
|
break;
|
|
case 6: // GB: LD A,(FF00 + n)
|
|
A() = IntelProcessor::memoryRead(IoRegisters::BASE + fetchByte());
|
|
tick(3);
|
|
break;
|
|
case 7: { // GB: LD HL,SP + dd
|
|
const auto before = SP().word;
|
|
const int8_t value = fetchByte();
|
|
const auto result = before + value;
|
|
HL() = result;
|
|
const auto carried = before ^ value ^ (result & Mask16);
|
|
F() = clearBit(F(), ZF | NF);
|
|
F() = setBit(F(), CF, carried & Bit8);
|
|
F() = setBit(F(), HC, carried & Bit4);
|
|
}
|
|
tick(3);
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 1: // POP & various ops
|
|
switch (q) {
|
|
case 0: // POP rp2[p]
|
|
RP2(p) = popWord();
|
|
tick(3);
|
|
break;
|
|
case 1:
|
|
switch (p) {
|
|
case 0: // RET
|
|
ret();
|
|
tick(4);
|
|
break;
|
|
case 1: // GB: RETI
|
|
reti();
|
|
tick(4);
|
|
break;
|
|
case 2: // JP HL
|
|
jump(HL());
|
|
tick();
|
|
break;
|
|
case 3: // LD SP,HL
|
|
SP() = HL();
|
|
tick(2);
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 2: // Conditional jump
|
|
switch (y) {
|
|
case 0:
|
|
case 1:
|
|
case 2:
|
|
case 3:
|
|
jumpConditionalFlag(y);
|
|
tick(3);
|
|
break;
|
|
case 4: // GB: LD (FF00 + C),A
|
|
IntelProcessor::memoryWrite(IoRegisters::BASE + C(), A());
|
|
tick(2);
|
|
break;
|
|
case 5: // GB: LD (nn),A
|
|
BUS().ADDRESS() = MEMPTR() = fetchWord();
|
|
IntelProcessor::memoryWrite(A());
|
|
tick(4);
|
|
break;
|
|
case 6: // GB: LD A,(FF00 + C)
|
|
A() = IntelProcessor::memoryRead(IoRegisters::BASE + C());
|
|
tick(2);
|
|
break;
|
|
case 7: // GB: LD A,(nn)
|
|
BUS().ADDRESS() = MEMPTR() = fetchWord();
|
|
A() = busRead();
|
|
tick(4);
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 3: // Assorted operations
|
|
switch (y) {
|
|
case 0: // JP nn
|
|
jump(MEMPTR() = fetchWord());
|
|
tick(4);
|
|
break;
|
|
case 1: // CB prefix
|
|
m_prefixCB = true;
|
|
Processor::execute(fetchByte());
|
|
break;
|
|
case 6: // DI
|
|
di();
|
|
tick();
|
|
break;
|
|
case 7: // EI
|
|
ei();
|
|
tick();
|
|
break;
|
|
}
|
|
break;
|
|
case 4: // Conditional call: CALL cc[y], nn
|
|
if (callConditionalFlag(y))
|
|
tick(3);
|
|
tick(3);
|
|
break;
|
|
case 5: // PUSH & various ops
|
|
switch (q) {
|
|
case 0: // PUSH rp2[p]
|
|
pushWord(RP2(p));
|
|
tick(4);
|
|
break;
|
|
case 1:
|
|
switch (p) {
|
|
case 0: // CALL nn
|
|
call(MEMPTR() = fetchWord());
|
|
tick(6);
|
|
break;
|
|
}
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
case 6: // Operate on accumulator and immediate operand: alu[y] n
|
|
switch (y) {
|
|
case 0: // ADD A,n
|
|
add(A(), fetchByte());
|
|
break;
|
|
case 1: // ADC A,n
|
|
adc(A(), fetchByte());
|
|
break;
|
|
case 2: // SUB n
|
|
subtract(A(), fetchByte());
|
|
break;
|
|
case 3: // SBC A,n
|
|
sbc(fetchByte());
|
|
break;
|
|
case 4: // AND n
|
|
andr(A(), fetchByte());
|
|
break;
|
|
case 5: // XOR n
|
|
xorr(fetchByte());
|
|
break;
|
|
case 6: // OR n
|
|
orr(fetchByte());
|
|
break;
|
|
case 7: // CP n
|
|
compare(A(), fetchByte());
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
tick(2);
|
|
break;
|
|
case 7: // Restart: RST y * 8
|
|
restart(y << 3);
|
|
tick(4);
|
|
break;
|
|
default:
|
|
UNREACHABLE;
|
|
}
|
|
break;
|
|
}
|
|
}
|