mirror of
https://github.com/MoleskiCoder/EightBit.git
synced 2024-12-26 19:29:20 +00:00
467 lines
9.4 KiB
C++
467 lines
9.4 KiB
C++
#include "stdafx.h"
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#include "Disassembler.h"
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#include "Intel8080.h"
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#include <sstream>
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#include <iomanip>
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#include <bitset>
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EightBit::Disassembler::Disassembler(Bus& bus) noexcept
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: m_bus(bus) {
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// Disable exceptions where too many format arguments are available
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m_formatter.exceptions(boost::io::all_error_bits ^ boost::io::too_many_args_bit);
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}
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std::string EightBit::Disassembler::state(Intel8080& cpu) {
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auto pc = cpu.PC();
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auto sp = cpu.SP();
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auto a = cpu.A();
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auto f = cpu.F();
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auto b = cpu.B();
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auto c = cpu.C();
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auto d = cpu.D();
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auto e = cpu.E();
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auto h = cpu.H();
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auto l = cpu.L();
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std::string output;
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output.reserve(80);
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output =
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"PC=" + hex(pc.word)
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+ " SP=" + hex(sp.word)
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+ " A=" + hex(a) + " F=" + flags(f)
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+ " B=" + hex(b) + " C=" + hex(c)
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+ " D=" + hex(d) + " E=" + hex(e)
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+ " H=" + hex(h) + " L=" + hex(l);
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return output;
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}
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std::string EightBit::Disassembler::RP(int rp) {
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switch (rp) {
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case 0:
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return "B";
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case 1:
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return "D";
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case 2:
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return "H";
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case 3:
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return "SP";
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}
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throw std::logic_error("Unhandled register pair");
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}
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std::string EightBit::Disassembler::RP2(int rp) {
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switch (rp) {
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case 0:
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return "B";
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case 1:
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return "D";
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case 2:
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return "H";
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case 3:
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return "PSW";
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}
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throw std::logic_error("Unhandled register pair");
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}
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std::string EightBit::Disassembler::R(int r) {
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switch (r) {
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case 0:
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return "B";
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case 1:
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return "C";
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case 2:
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return "D";
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case 3:
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return "E";
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case 4:
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return "H";
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case 5:
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return "L";
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case 6:
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return "M";
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case 7:
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return "A";
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}
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throw std::logic_error("Unhandled register");
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}
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std::string EightBit::Disassembler::cc(int flag) {
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switch (flag) {
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case 0:
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return "NZ";
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case 1:
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return "Z";
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case 2:
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return "NC";
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case 3:
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return "C";
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case 4:
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return "PO";
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case 5:
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return "PE";
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case 6:
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return "P";
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case 7:
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return "M";
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}
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throw std::logic_error("Unhandled condition");
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}
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std::string EightBit::Disassembler::alu(int which) {
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switch (which) {
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case 0: // ADD A,n
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return "ADD";
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case 1: // ADC
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return "ADC";
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case 2: // SUB n
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return "SUB";
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case 3: // SBC A,n
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return "SBB";
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case 4: // AND n
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return "ANA";
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case 5: // XOR n
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return "XRA";
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case 6: // OR n
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return "ORA";
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case 7: // CP n
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return "CMP";
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}
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throw std::logic_error("Unhandled alu operation");
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}
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std::string EightBit::Disassembler::alu2(int which) {
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switch (which) {
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case 0: // ADD A,n
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return "ADI";
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case 1: // ADC
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return "ACI";
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case 2: // SUB n
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return "SUI";
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case 3: // SBC A,n
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return "SBI";
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case 4: // AND n
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return "ANI";
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case 5: // XOR n
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return "XRI";
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case 6: // OR n
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return "ORI";
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case 7: // CP n
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return "CPI";
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}
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throw std::logic_error("Unhandled alu operation");
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}
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std::string EightBit::Disassembler::disassemble(Intel8080& cpu) {
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return disassemble(cpu, cpu.PC().word);
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}
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std::string EightBit::Disassembler::disassemble(Intel8080& cpu, uint16_t pc) {
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std::ostringstream output;
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auto opcode = BUS().peek(pc);
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output << hex(opcode);
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auto x = (opcode & 0b11000000) >> 6;
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auto y = (opcode & 0b111000) >> 3;
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auto z = (opcode & 0b111);
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auto p = (y & 0b110) >> 1;
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auto q = (y & 1);
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auto immediate = BUS().peek(pc + 1);
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auto absolute = cpu.peekWord(pc + 1).word;
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auto displacement = (int8_t)immediate;
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auto relative = pc + displacement + 2;
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auto indexedImmediate = BUS().peek(pc + 1);
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auto dumpCount = 0;
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const std::string specification = disassemble(dumpCount, x, y, z, p, q);
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for (int i = 0; i < dumpCount; ++i)
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output << hex(BUS().peek(pc + i + 1));
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m_formatter.parse(specification);
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output << '\t' << m_formatter % (int)immediate % (int)absolute % relative % (int)displacement % indexedImmediate;
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return output.str();
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}
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std::string EightBit::Disassembler::disassemble(
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int& dumpCount,
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int x, int y, int z,
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int p, int q) {
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std::string specification;
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switch (x) {
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case 0:
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switch (z) {
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case 0: // Relative jumps and assorted ops
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switch (y) {
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case 0: // NOP
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specification = "NOP";
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break;
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case 1: // EX AF AF'
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break;
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case 2: // DJNZ d
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break;
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case 3: // JR d
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break;
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default: // JR cc,d
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break;
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}
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break;
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case 1: // 16-bit load immediate/add
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switch (q) {
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case 0: // LD rp,nn
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specification = "LXI " + RP(p) + ",%2$04XH";
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dumpCount += 2;
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break;
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case 1: // ADD HL,rp
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specification = "DAD " + RP(p);
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break;
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}
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break;
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case 2: // Indirect loading
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switch (q) {
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case 0:
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switch (p) {
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case 0: // LD (BC),A
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specification = "STAX B";
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break;
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case 1: // LD (DE),A
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specification = "STAX D";
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break;
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case 2: // LD (nn),HL
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specification = "SHLD %2$04XH";
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dumpCount += 2;
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break;
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case 3: // LD (nn),A
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specification = "STA %2$04XH";
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dumpCount += 2;
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break;
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}
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break;
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case 1:
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switch (p) {
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case 0: // LD A,(BC)
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specification = "LDAX B";
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break;
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case 1: // LD A,(DE)
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specification = "LDAX D";
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break;
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case 2: // LD HL,(nn)
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specification = "LHLD %2$04XH";
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dumpCount += 2;
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break;
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case 3: // LD A,(nn)
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specification = "LDA %2$04XH";
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dumpCount += 2;
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break;
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}
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break;
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}
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break;
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case 3: // 16-bit INC/DEC
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switch (q) {
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case 0: // INC rp
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specification = "INX " + RP(p);
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break;
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case 1: // DEC rp
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specification = "DCX " + RP(p);
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break;
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}
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break;
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case 4: // 8-bit INC
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specification = "INR " + R(y);
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break;
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case 5: // 8-bit DEC
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specification = "DCR " + R(y);
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break;
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case 6: // 8-bit load immediate
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specification = "MVI " + R(y) + ",%1$02XH";
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dumpCount++;
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break;
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case 7: // Assorted operations on accumulator/flags
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switch (y) {
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case 0:
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specification = "RLC";
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break;
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case 1:
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specification = "RRC";
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break;
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case 2:
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specification = "RAL";
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break;
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case 3:
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specification = "RAR";
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break;
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case 4:
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specification = "DAA";
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break;
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case 5:
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specification = "CMA";
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break;
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case 6:
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specification = "STC";
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break;
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case 7:
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specification = "CMC";
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break;
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}
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break;
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}
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break;
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case 1: // 8-bit loading
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if (z == 6 && y == 6) { // Exception (replaces LD (HL), (HL))
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specification = "HLT";
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} else {
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specification = "MOV " + R(y) + "," + R(z);
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}
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break;
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case 2: // Operate on accumulator and register/memory location
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specification = alu(y) + " " + R(z);
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break;
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case 3:
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switch (z) {
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case 0: // Conditional return
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specification = "R" + cc(y);
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break;
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case 1: // POP & various ops
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switch (q) {
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case 0: // POP rp2[p]
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specification = "POP " + RP2(p);
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break;
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case 1:
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switch (p) {
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case 0: // RET
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specification = "RET";
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break;
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case 1: // EXX
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break;
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case 2: // JP HL
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specification = "PCHL";
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break;
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case 3: // LD SP,HL
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specification = "SPHL";
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break;
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}
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}
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break;
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case 2: // Conditional jump
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specification = "J" + cc(y) + " %2$04XH";
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dumpCount += 2;
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break;
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case 3: // Assorted operations
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switch (y) {
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case 0: // JP nn
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specification = "JMP %2$04XH";
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dumpCount += 2;
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break;
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case 1: // CB prefix
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break;
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case 2: // OUT (n),A
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specification = "OUT %1$02XH";
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dumpCount++;
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break;
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case 3: // IN A,(n)
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specification = "IN %1$02XH";
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dumpCount++;
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break;
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case 4: // EX (SP),HL
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specification = "XHTL";
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break;
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case 5: // EX DE,HL
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specification = "XCHG";
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break;
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case 6: // DI
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specification = "DI";
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break;
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case 7: // EI
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specification = "EI";
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break;
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}
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break;
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case 4: // Conditional call: CALL cc[y], nn
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specification = "C" + cc(y) + " %2$04XH";
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dumpCount += 2;
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break;
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case 5: // PUSH & various ops
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switch (q) {
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case 0: // PUSH rp2[p]
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specification = "PUSH " + RP2(p);
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break;
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case 1:
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switch (p) {
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case 0: // CALL nn
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specification = "CALL %2$04XH";
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dumpCount += 2;
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break;
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case 1: // DD prefix
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break;
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case 2: // ED prefix
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break;
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case 3: // FD prefix
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break;
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}
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}
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break;
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case 6: // Operate on accumulator and immediate operand: alu[y] n
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specification = alu2(y) + " %1$02XH";
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dumpCount++;
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break;
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case 7: // Restart: RST y * 8
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specification = "RST " + hex((uint8_t)y);
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break;
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}
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break;
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}
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return specification;
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}
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std::string EightBit::Disassembler::flag(uint8_t value, int flag, std::string represents, std::string off) {
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return value & flag ? represents : off;
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}
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std::string EightBit::Disassembler::flags(uint8_t value) {
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std::string returned;
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returned.reserve(8);
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returned += flag(value, Intel8080::SF, "S");
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returned += flag(value, Intel8080::ZF, "Z");
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returned += flag(value, Chip::Bit5, "1", "0");
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returned += flag(value, Intel8080::AC, "A");
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returned += flag(value, Chip::Bit3, "1", "0");
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returned += flag(value, Intel8080::PF, "P");
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returned += flag(value, Chip::Bit1, "1", "0");
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returned += flag(value, Intel8080::CF, "C");
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return returned;
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}
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std::string EightBit::Disassembler::hex(uint8_t value) {
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static char digits[16] = { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9' , 'a', 'b', 'c', 'd', 'e', 'f' };
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std::string returned;
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returned.reserve(2);
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returned += digits[Chip::highNibble(value)];
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returned += digits[Chip::lowNibble(value)];
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return returned;
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}
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std::string EightBit::Disassembler::hex(uint16_t value) {
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const register16_t converted(value);
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return hex(converted.high) + hex(converted.low);
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}
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std::string EightBit::Disassembler::binary(uint8_t value) {
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std::ostringstream output;
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output << std::bitset<8>(value);
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return output.str();
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}
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