From 1dfd9621a1745f00eee27d4b99204671eff72154 Mon Sep 17 00:00:00 2001
From: Adrian Conlon <adrian.conlon@gmail.com>
Date: Wed, 15 Oct 2025 19:46:10 +0100
Subject: [PATCH] Share some more common code between Intel style procesors

---
 EightBit/IntelProcessor.cs | 29 +++++++++++++++++++++++++++++
 Intel8080/Intel8080.cs     | 27 ---------------------------
 LR35902/LR35902.cs         | 15 +++++++++------
 Z80/Z80.cs                 | 27 ---------------------------
 4 files changed, 38 insertions(+), 60 deletions(-)

diff --git a/EightBit/IntelProcessor.cs b/EightBit/IntelProcessor.cs
index 9120dd6..19682d1 100644
--- a/EightBit/IntelProcessor.cs
+++ b/EightBit/IntelProcessor.cs
@@ -170,6 +170,35 @@ namespace EightBit
 
         ////
 
+        protected byte ReadMemoryIndirect(Register16 via)
+        {
+            this.MEMPTR.Assign(via);
+            return this.ReadMemoryIndirect();
+        }
+
+        protected byte ReadMemoryIndirect()
+        {
+            this.Bus.Address.Assign(this.MEMPTR);
+            this.MEMPTR.Increment();
+            return this.MemoryRead();
+        }
+
+        protected void WriteMemoryIndirect(Register16 via, byte data)
+        {
+            this.MEMPTR.Assign(via);
+            this.WriteMemoryIndirect(data);
+        }
+
+        protected void WriteMemoryIndirect(byte data)
+        {
+            this.Bus.Address.Assign(this.MEMPTR);
+            this.MEMPTR.Increment();
+            this.MEMPTR.High = this.Bus.Data = data;
+            this.MemoryWrite();
+        }
+
+        ////
+
         protected void Restart(byte address)
         {
             this.MEMPTR.Assign(address);
diff --git a/Intel8080/Intel8080.cs b/Intel8080/Intel8080.cs
index 9769914..1bd65fd 100644
--- a/Intel8080/Intel8080.cs
+++ b/Intel8080/Intel8080.cs
@@ -739,33 +739,6 @@ namespace Intel8080
             this.Tick(2);
         }
 
-        private byte ReadMemoryIndirect(Register16 via)
-        {
-            this.MEMPTR.Assign(via);
-            return this.ReadMemoryIndirect();
-        }
-
-        private byte ReadMemoryIndirect()
-        {
-            this.Bus.Address.Assign(this.MEMPTR);
-            this.MEMPTR.Increment();
-            return this.MemoryRead();
-        }
-
-        private void WriteMemoryIndirect(Register16 via, byte data)
-        {
-            this.MEMPTR.Assign(via);
-            this.WriteMemoryIndirect(data);
-        }
-
-        private void WriteMemoryIndirect(byte data)
-        {
-            this.Bus.Address.Assign(this.MEMPTR);
-            this.MEMPTR.Increment();
-            this.MEMPTR.High = this.Bus.Data = data;
-            this.MemoryWrite();
-        }
-
         private void WritePort(byte port)
         {
             this.Bus.Address.Assign(port, this.A);
diff --git a/LR35902/LR35902.cs b/LR35902/LR35902.cs
index 75a6634..3d8309e 100644
--- a/LR35902/LR35902.cs
+++ b/LR35902/LR35902.cs
@@ -560,50 +560,53 @@ namespace LR35902
                                     switch (p)
                                     {
                                         case 0: // LD (BC),A
-                                            this.Bus.Address.Assign(this.BC);
+                                            this.WriteMemoryIndirect(this.BC, A);
                                             break;
 
                                         case 1: // LD (DE),A
-                                            this.Bus.Address.Assign(this.DE);
+                                            this.WriteMemoryIndirect(this.DE, A);
+
                                             break;
 
                                         case 2: // GB: LDI (HL),A
                                             this.Bus.Address.Assign(this.HL);
                                             _ = this.HL.Increment();
+                                            this.MemoryWrite(this.A);
                                             break;
 
                                         case 3: // GB: LDD (HL),A
                                             this.Bus.Address.Assign(this.HL);
                                             _ = this.HL.Decrement();
+                                            this.MemoryWrite(this.A);
                                             break;
 
                                         default:
                                             throw new InvalidOperationException("Invalid operation mode");
                                     }
-                                    this.MemoryWrite(this.A);
                                     break;
 
                                 case 1:
                                     switch(p)
                                     {
                                         case 0:   // LD A,(BC)
-                                            this.Bus.Address.Assign(this.BC);
+                                            this.A = this.ReadMemoryIndirect(this.BC);
                                             break;
                                         case 1:   // LD A,(DE)
-                                            this.Bus.Address.Assign(this.DE);
+                                            this.A = this.ReadMemoryIndirect(this.DE);
                                             break;
                                         case 2:   // GB: LDI A,(HL)
                                             this.Bus.Address.Assign(this.HL);
                                             _ = this.HL.Increment();
+                                            this.A = this.MemoryRead();
                                             break;
                                         case 3:   // GB: LDD A,(HL)
                                             this.Bus.Address.Assign(this.HL);
                                             _ = this.HL.Decrement();
+                                            this.A = this.MemoryRead();
                                             break;
                                         default:
                                             throw new InvalidOperationException("Invalid operation mode");
                                     }
-                                    this.A = this.MemoryRead();
                                     break;
 
                                 default:
diff --git a/Z80/Z80.cs b/Z80/Z80.cs
index e6c8a35..ad693b4 100644
--- a/Z80/Z80.cs
+++ b/Z80/Z80.cs
@@ -2271,33 +2271,6 @@ namespace Z80
             this.AdjustSZXY(this.A);
         }
 
-        private byte ReadMemoryIndirect(Register16 via)
-        {
-            this.MEMPTR.Assign(via);
-            return this.ReadMemoryIndirect();
-        }
-
-        private byte ReadMemoryIndirect()
-        {
-            this.Bus.Address.Assign(this.MEMPTR);
-            this.MEMPTR.Increment();
-            return this.MemoryRead();
-        }
-
-        private void WriteMemoryIndirect(Register16 via, byte data)
-        {
-            this.MEMPTR.Assign(via);
-            this.WriteMemoryIndirect(data);
-        }
-
-        private void WriteMemoryIndirect(byte data)
-        {
-            this.Bus.Address.Assign(this.MEMPTR);
-            this.MEMPTR.Increment();
-            this.MEMPTR.High = this.Bus.Data = data;
-            this.MemoryWrite();
-        }
-
         private void RRD()
         {
             var memory = ReadMemoryIndirect(this.HL);