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Simplify intermediate 16-bit register usage
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commit
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@@ -580,8 +580,8 @@ namespace Z80
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break;
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case 2:
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this.Tick();
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this.MEMPTR.Assign(this.GetWordPaged(data, this.IV));
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this.Call(this.MEMPTR);
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this.GetPagedInto(data, this.IV, this.MEMPTR);
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base.Call();
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Debug.Assert(this.Cycles == 19);
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break;
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default:
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@@ -963,7 +963,8 @@ namespace Z80
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this.SetWord(this.RP(p));
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break;
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case 1: // LD rp[p], (nn)
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this.RP(p).Assign(this.GetWord());
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this.GetWord();
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this.RP(p).Assign(this.Intermediate);
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break;
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default:
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throw new NotSupportedException("Invalid operation mode");
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@@ -1215,7 +1216,8 @@ namespace Z80
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break;
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case 2: // LD HL,(nn)
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this.FetchWordAddress();
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this.HL2().Assign(this.GetWord());
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this.GetWord();
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this.HL2().Assign(this.Intermediate);
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break;
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case 3: // LD A,(nn)
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this.FetchInto(this.MEMPTR);
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@@ -1940,9 +1942,8 @@ namespace Z80
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private void XHTL(Register16 exchange)
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{
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this.MEMPTR.Low = this.MemoryRead(this.SP);
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this.Bus.Address.Increment();
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this.MEMPTR.High = this.MemoryRead();
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this.Bus.Address.Assign(this.SP);
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this.GetInto(this.MEMPTR);
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this.Bus.Data = exchange.High;
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exchange.High = this.MEMPTR.High;
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this.MemoryUpdate(2);
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