Port of EightBit library to .Net (unworking!)

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>

EightBit.sln

@@ -0,0 +1,65 @@
+
+Microsoft Visual Studio Solution File, Format Version 12.00
+# Visual Studio 15
+VisualStudioVersion = 15.0.28307.329
+MinimumVisualStudioVersion = 10.0.40219.1
+Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "EightBit", "EightBit\EightBit.csproj", "{6EBF8857-62A3-4EF4-AF21-C1844031D7E4}"
+EndProject
+Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "M6502", "M6502\M6502.csproj", "{3AF29A4F-4294-4A9D-AAC3-D9A48076BD19}"
+EndProject
+Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "Test_M6502", "Test_M6502\Test_M6502.csproj", "{854EDE2F-B54D-425C-8F68-EDA68BDC797E}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|Any CPU = Debug|Any CPU
+		Debug|x64 = Debug|x64
+		Debug|x86 = Debug|x86
+		Release|Any CPU = Release|Any CPU
+		Release|x64 = Release|x64
+		Release|x86 = Release|x86
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{6EBF8857-62A3-4EF4-AF21-C1844031D7E4}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
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+		{3AF29A4F-4294-4A9D-AAC3-D9A48076BD19}.Debug|x86.Build.0 = Debug|Any CPU
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+		{3AF29A4F-4294-4A9D-AAC3-D9A48076BD19}.Release|Any CPU.Build.0 = Release|Any CPU
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+		{3AF29A4F-4294-4A9D-AAC3-D9A48076BD19}.Release|x86.Build.0 = Release|Any CPU
+		{854EDE2F-B54D-425C-8F68-EDA68BDC797E}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
+		{854EDE2F-B54D-425C-8F68-EDA68BDC797E}.Debug|Any CPU.Build.0 = Debug|Any CPU
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+		{854EDE2F-B54D-425C-8F68-EDA68BDC797E}.Debug|x64.Build.0 = Debug|Any CPU
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+		{854EDE2F-B54D-425C-8F68-EDA68BDC797E}.Debug|x86.Build.0 = Debug|Any CPU
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+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+	GlobalSection(ExtensibilityGlobals) = postSolution
+		SolutionGuid = {E120AD0F-5939-4F8B-B454-7920E565FA7E}
+	EndGlobalSection
+EndGlobal

EightBit/AccessLevel.cs

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+namespace EightBit
+{
+    public enum AccessLevel
+    {
+        Unknown, ReadOnly, WriteOnly, ReadWrite
+    }
+}

EightBit/BigEndianProcessor.cs

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+namespace EightBit
+{
+    public abstract class BigEndianProcessor : Processor
+    {
+        protected BigEndianProcessor(Bus memory)
+        : base(memory)
+        {
+        }
+
+        public override Register16 PeekWord(Register16 address)
+        {
+            var high = Bus.Peek(address);
+            var low = Bus.Peek(++address);
+            return new Register16(low, high);
+        }
+
+        public override void PokeWord(Register16 address, Register16 value)
+        {
+            Bus.Poke(address, value.High);
+            Bus.Poke(++address, value.Low);
+        }
+
+        protected override Register16 FetchWord()
+        {
+            var high = FetchByte();
+            var low = FetchByte();
+            return new Register16(low, high);
+        }
+
+        protected override Register16 GetWord()
+        {
+            var high = BusRead();
+            ++Bus.Address.Word;
+            var low = BusRead();
+            return new Register16(low, high);
+        }
+
+        protected override Register16 GetWordPaged(byte page, byte offset)
+        {
+            var high = GetBytePaged(page, offset);
+            ++Bus.Address.Low;
+            var low = BusRead();
+            return new Register16(low, high);
+        }
+
+        protected override Register16 PopWord()
+        {
+            var high = Pop();
+            var low = Pop();
+            return new Register16(low, high);
+        }
+
+        protected override void PushWord(Register16 value)
+        {
+            Push(value.Low);
+            Push(value.High);
+        }
+
+        protected override void SetWord(Register16 value)
+        {
+            BusWrite(value.High);
+            ++Bus.Address.Word;
+            BusWrite(value.Low);
+        }
+
+        protected override void SetWordPaged(byte page, byte offset, Register16 value)
+        {
+            SetBytePaged(page, offset, value.High);
+            ++Bus.Address.Low;
+            BusWrite(value.Low);
+        }
+    }
+}

EightBit/Bits.cs

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+using System;
+
+namespace EightBit
+{
+    [Flags]
+    public enum Bits
+    {
+        Bit0 = 1,
+		Bit1 = Bit0 << 1,
+		Bit2 = Bit1 << 1,
+		Bit3 = Bit2 << 1,
+		Bit4 = Bit3 << 1,
+		Bit5 = Bit4 << 1,
+		Bit6 = Bit5 << 1,
+		Bit7 = Bit6 << 1,
+		Bit8 = Bit7 << 1,
+		Bit9 = Bit8 << 1,
+		Bit10 = Bit9 << 1,
+		Bit11 = Bit10 << 1,
+		Bit12 = Bit11 << 1,
+		Bit13 = Bit12 << 1,
+		Bit14 = Bit13 << 1,
+		Bit15 = Bit14 << 1,
+		Bit16 = Bit15 << 1
+    }
+}

EightBit/Bus.cs

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+namespace EightBit
+{
+    using System;
+
+    abstract public class Bus : IMapper
+    {
+        private byte data;
+        private Register16 address = new Register16();
+
+        public event EventHandler<EventArgs> WritingByte;
+        public event EventHandler<EventArgs> WrittenByte;
+
+        public event EventHandler<EventArgs> ReadingByte;
+        public event EventHandler<EventArgs> ReadByte;
+
+        public byte Data
+        {
+            get { return data; }
+            set { data = value; }
+        }
+
+        public Register16 Address
+        {
+            get { return address; }
+        }
+
+        public abstract MemoryMapping Mapping(Register16 absolute);
+
+        public byte Peek() => Reference();
+        public byte Peek(Register16 absolute) => Reference(absolute);
+        public byte Peek(ushort absolute) => Peek(Chip.LowByte(absolute), Chip.HighByte(absolute));
+        public byte Peek(byte low, byte high) => Reference(new Register16(low, high));
+
+        public void Poke(byte value) => Reference() = value;
+        public void Poke(Register16 absolute, byte value) => Reference(absolute) = value;
+        public byte Poke(ushort absolute, byte value) => Poke(Chip.LowByte(absolute), Chip.HighByte(absolute), value);
+        public byte Poke(byte low, byte high, byte value) => Reference(new Register16(low, high)) = value;
+
+        public byte Read()
+        {
+            OnReadingByte();
+            var returned = Data = Reference();
+            OnReadByte();
+            return returned;
+        }
+
+        public byte Read(Register16 absolute)
+        {
+            Address.Word = absolute.Word;
+            return Read();
+        }
+
+        public void Write()
+        {
+            OnWritingByte();
+            Reference() = Data;
+            OnWrittenByte();
+        }
+
+        public void Write(byte value)
+        {
+            Data = value;
+            Write();
+        }
+
+        public void Write(Register16 absolute, byte value)
+        {
+            Address.Word = absolute.Word;
+            Write(value);
+        }
+
+        public virtual void RaisePOWER() {}
+        public virtual void LowerPOWER() {}
+
+        public abstract void Initialize();
+
+        protected virtual void OnWritingByte() => WritingByte?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnWrittenByte() => WrittenByte?.Invoke(this, EventArgs.Empty);
+
+        protected virtual void OnReadingByte() => ReadingByte?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnReadByte() => ReadByte?.Invoke(this, EventArgs.Empty);
+
+        protected ref byte Reference(Register16 absolute)
+        {
+            var mapped = Mapping(absolute);
+            var offset = (ushort)((absolute - mapped.Begin) & mapped.Mask);
+            if (mapped.Access == AccessLevel.ReadOnly)
+            {
+                Data = mapped.Memory.Peek(offset);
+                return ref data;
+            }
+            return ref mapped.Memory.Reference(offset);
+        }
+
+        protected ref byte Reference() => ref Reference(Address);
+
+        protected ref byte Reference(ushort absolute) => ref Reference(Chip.LowByte(absolute), Chip.HighByte(absolute));
+
+        protected ref byte Reference(byte low, byte high)
+        {
+            Address.Low = low;
+            Address.High = high;
+            return ref Reference();
+        }
+
+        //[[nodiscard]] static std::map<uint16_t, std::vector<uint8_t>> parseHexFile(std::string path);
+        //void loadHexFile(std::string path);
+    }
+}

EightBit/Chip.cs

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+namespace EightBit
+{
+    public class Chip : Device
+    {
+        protected Chip() { }
+
+        public static void ClearFlag(ref byte f, byte flag) => f &= (byte)~flag;
+        public static void SetFlag(ref byte f, byte flag) => f |= flag;
+
+        public static void SetFlag(ref byte f, byte flag, int condition) => SetFlag(ref f, flag, condition != 0);
+
+        public static void SetFlag(ref byte f, byte flag, bool condition)
+        {
+            if (condition)
+                SetFlag(ref f, flag);
+            else
+                ClearFlag(ref f, flag);
+        }
+
+        public static void ClearFlag(ref byte f, byte flag, int condition) => ClearFlag(ref f, flag, condition == 0);
+
+        public static void ClearFlag(ref byte f, byte flag, bool condition) => SetFlag(ref f, flag, !condition);
+
+        public static int HighByte(int value) => LowByte(value >> 8);
+        public static byte HighByte(ushort value) => (byte)LowByte((int)value);
+        public static int LowByte(int value) => value & (int)Mask.Mask8;
+        public static byte LowByte(ushort value) => (byte)LowByte((int)value);
+        public static int PromoteByte(int value) => value << 8;
+        public static ushort PromoteByte(byte value) => (ushort)PromoteByte((int)value);
+        public static int DemoteByte(int value) => HighByte(value);
+        public static byte DemoteByte(ushort value) => (byte)HighByte((int)value);
+
+        public static int HighNibble(byte value) => value >> 4;
+        public static int LowNibble(byte value) => value & 0xf;
+
+        public static int HigherNibble(byte value) => value & 0xf0;
+        public static int LowerNibble(byte value) => LowNibble(value);
+
+        public static int PromoteNibble(byte value) => value << 4;
+        public static int DemoteNibble(byte value) => HighNibble(value);
+    }
+}

EightBit/ClockedChip.cs

@@ -0,0 +1,31 @@
+namespace EightBit
+{
+    using System;
+
+    public class ClockedChip : Chip
+    {
+        private int cycles;
+
+        protected ClockedChip() { }
+
+        public int Cycles { get => cycles; protected set => cycles = value; }
+
+        public event EventHandler<EventArgs> Ticked;
+  
+        public void Tick(int extra)
+        {
+            for (int i = 0; i < extra; ++i)
+                Tick();
+        }
+
+        public void Tick()
+        {
+            ++Cycles;
+            OnTicked();
+        }
+
+        protected virtual void OnTicked() => Ticked?.Invoke(this, EventArgs.Empty);
+
+        protected void ResetCycles() => Cycles = 0;
+    }
+}

EightBit/Device.cs

@@ -0,0 +1,40 @@
+namespace EightBit
+{
+    using System;
+
+    public class Device
+    {
+        private PinLevel powerLine;
+
+        protected Device() { }
+
+        public event EventHandler<EventArgs> RaisingPOWER;
+        public event EventHandler<EventArgs> RaisedPOWER;
+        public event EventHandler<EventArgs> LoweringPOWER;
+        public event EventHandler<EventArgs> LoweredPOWER;
+
+        public ref PinLevel POWER() { return ref powerLine; }
+
+        public bool Powered => POWER().Raised();
+
+        public virtual void RaisePOWER()
+        {
+            OnRaisingPOWER();
+            POWER().Raise();
+            OnRaisedPOWER();
+        }
+
+        public virtual void LowerPOWER()
+        {
+            OnLoweringPOWER();
+            POWER().Lower();
+            OnLoweredPOWER();
+        }
+
+        protected virtual void OnRaisingPOWER() => RaisingPOWER?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnRaisedPOWER() => RaisedPOWER?.Invoke(this, EventArgs.Empty);
+
+        protected virtual void OnLoweringPOWER() => LoweringPOWER?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnLoweredPOWER() => LoweredPOWER?.Invoke(this, EventArgs.Empty);
+    }
+}

EightBit/EightBit.csproj

@@ -0,0 +1,76 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project ToolsVersion="15.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <Import Project="$(MSBuildExtensionsPath)\$(MSBuildToolsVersion)\Microsoft.Common.props" Condition="Exists('$(MSBuildExtensionsPath)\$(MSBuildToolsVersion)\Microsoft.Common.props')" />
+  <PropertyGroup>
+    <Configuration Condition=" '$(Configuration)' == '' ">Debug</Configuration>
+    <Platform Condition=" '$(Platform)' == '' ">AnyCPU</Platform>
+    <ProjectGuid>{6EBF8857-62A3-4EF4-AF21-C1844031D7E4}</ProjectGuid>
+    <OutputType>Library</OutputType>
+    <AppDesignerFolder>Properties</AppDesignerFolder>
+    <RootNamespace>EightBit</RootNamespace>
+    <AssemblyName>EightBit</AssemblyName>
+    <TargetFrameworkVersion>v4.7.2</TargetFrameworkVersion>
+    <FileAlignment>512</FileAlignment>
+    <Deterministic>true</Deterministic>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)|$(Platform)' == 'Debug|AnyCPU' ">
+    <DebugSymbols>true</DebugSymbols>
+    <DebugType>full</DebugType>
+    <Optimize>false</Optimize>
+    <OutputPath>bin\Debug\</OutputPath>
+    <DefineConstants>DEBUG;TRACE</DefineConstants>
+    <ErrorReport>prompt</ErrorReport>
+    <WarningLevel>4</WarningLevel>
+    <LangVersion>latest</LangVersion>
+    <CodeAnalysisRuleSet>AllRules.ruleset</CodeAnalysisRuleSet>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)|$(Platform)' == 'Release|AnyCPU' ">
+    <DebugType>pdbonly</DebugType>
+    <Optimize>true</Optimize>
+    <OutputPath>bin\Release\</OutputPath>
+    <DefineConstants>TRACE</DefineConstants>
+    <ErrorReport>prompt</ErrorReport>
+    <WarningLevel>4</WarningLevel>
+  </PropertyGroup>
+  <PropertyGroup>
+    <SignAssembly>true</SignAssembly>
+  </PropertyGroup>
+  <ItemGroup>
+    <Reference Include="System" />
+    <Reference Include="System.Core" />
+    <Reference Include="System.Xml.Linq" />
+    <Reference Include="System.Data.DataSetExtensions" />
+    <Reference Include="Microsoft.CSharp" />
+    <Reference Include="System.Data" />
+    <Reference Include="System.Net.Http" />
+    <Reference Include="System.Xml" />
+  </ItemGroup>
+  <ItemGroup>
+    <Compile Include="AccessLevel.cs" />
+    <Compile Include="BigEndianProcessor.cs" />
+    <Compile Include="Bits.cs" />
+    <Compile Include="Bus.cs" />
+    <Compile Include="Chip.cs" />
+    <Compile Include="ClockedChip.cs" />
+    <Compile Include="Device.cs" />
+    <Compile Include="GlobalSuppressions.cs" />
+    <Compile Include="IntelOpCodeDecoded.cs" />
+    <Compile Include="Memory.cs" />
+    <Compile Include="InputOutput.cs" />
+    <Compile Include="IntelProcessor.cs" />
+    <Compile Include="LittleEndianProcessor.cs" />
+    <Compile Include="Mapper.cs" />
+    <Compile Include="Mask.cs" />
+    <Compile Include="MemoryMapping.cs" />
+    <Compile Include="PinLevel.cs" />
+    <Compile Include="PinLevelExtensions.cs" />
+    <Compile Include="PortEventArgs.cs" />
+    <Compile Include="Processor.cs" />
+    <Compile Include="Properties\AssemblyInfo.cs" />
+    <Compile Include="Ram.cs" />
+    <Compile Include="Register16.cs" />
+    <Compile Include="Rom.cs" />
+    <Compile Include="UnusedMemory.cs" />
+  </ItemGroup>
+  <Import Project="$(MSBuildToolsPath)\Microsoft.CSharp.targets" />
+</Project>

EightBit/InputOutput.cs

@@ -0,0 +1,50 @@
+namespace EightBit
+{
+    using System;
+
+    public sealed class InputOutput
+    {
+        private byte[] input;
+        private byte[] output;
+
+        public InputOutput()
+        {
+            input = new byte[0x100];
+            output = new byte[0x100];
+        }
+
+        public event EventHandler<PortEventArgs> ReadingPort;
+        public event EventHandler<PortEventArgs> ReadPort;
+
+        public event EventHandler<PortEventArgs> WritingPort;
+        public event EventHandler<PortEventArgs> WrittenPort;
+
+        byte Read(byte port) { return ReadInputPort(port); }
+        void Write(byte port, byte value) { WriteOutputPort(port, value); }
+
+        byte ReadInputPort(byte port)
+        {
+            OnReadingPort(port);
+            var value = input[port];
+            OnReadPort(port);
+            return value;
+        }
+
+        void WriteInputPort(byte port, byte value) => input[port] = value;
+
+        byte ReadOutputPort(byte port) => output[port];
+
+        void WriteOutputPort(byte port, byte value)
+        {
+            OnWritingPort(port);
+            output[port] = value;
+            OnWrittenPort(port);
+        }
+
+        private void OnReadingPort(byte port) => ReadingPort?.Invoke(this, new PortEventArgs(port));
+        private void OnReadPort(byte port) => ReadPort?.Invoke(this, new PortEventArgs(port));
+
+        private void OnWritingPort(byte port) => WritingPort?.Invoke(this, new PortEventArgs(port));
+        private void OnWrittenPort(byte port) => WrittenPort?.Invoke(this, new PortEventArgs(port));
+    }
+}

EightBit/IntelOpCodeDecoded.cs

@@ -0,0 +1,21 @@
+namespace EightBit
+{
+    class IntelOpCodeDecoded
+    {
+        public int x;
+        public int y;
+        public int z;
+        public int p;
+        public int q;
+
+        public IntelOpCodeDecoded() { }
+
+        public IntelOpCodeDecoded(byte opcode) {
+            x = (opcode & 0b11000000) >> 6;	// 0 - 3
+			y = (opcode & 0b00111000) >> 3;	// 0 - 7
+			z = (opcode & 0b00000111);		// 0 - 7
+			p = (y & 0b110) >> 1;			// 0 - 3
+			q = (y & 1);					// 0 - 1
+		}
+    }
+}

EightBit/IntelProcessor.cs

@@ -0,0 +1,165 @@
+namespace EightBit
+{
+    using System;
+
+    public abstract class IntelProcessor : LittleEndianProcessor
+    {
+        private readonly IntelOpCodeDecoded[] decodedOpCodes;
+        private Register16 sp;
+        private Register16 memptr;
+
+        private PinLevel haltLine;
+
+        protected IntelProcessor(Bus bus)
+        : base(bus)
+        {
+            decodedOpCodes = new IntelOpCodeDecoded[0x100];
+            sp = new Register16((ushort)Mask.Mask16);
+            memptr = new Register16();
+
+            for (int i = 0; i < 0x100; ++i)
+                decodedOpCodes[i] = new IntelOpCodeDecoded((byte)i);
+        }
+
+        public event EventHandler<EventArgs> RaisingHALT;
+        public event EventHandler<EventArgs> RaisedHALT;
+        public event EventHandler<EventArgs> LoweringHALT;
+        public event EventHandler<EventArgs> LoweredHALT;
+
+        public ref PinLevel HALT() { return ref haltLine; }
+
+        protected bool Halted => HALT().Lowered();
+
+        public Register16 SP { get => sp; set => sp = value; }
+        public Register16 MEMPTR { get => memptr; set => memptr = value; }
+
+        public abstract Register16 AF { get; set; }
+        public byte A { get { return AF.High; } set { AF.High = value; } }
+        public byte F { get { return AF.Low; } set { AF.Low = value; } }
+
+        public abstract Register16 BC { get; set; }
+        public byte B { get { return BC.High; } set { BC.High = value; } }
+        public byte C { get { return BC.Low; } set { BC.Low = value; } }
+
+        public abstract Register16 DE { get; set; }
+        public byte D { get { return DE.High; } set { DE.High = value; } }
+        public byte E { get { return DE.Low; } set { DE.Low = value; } }
+
+        public abstract Register16 HL { get; set; }
+        public byte H { get { return HL.High; } set { HL.High = value; } }
+        public byte L { get { return HL.Low; } set { HL.Low = value; } }
+
+        public override void RaisePOWER()
+        {
+            base.RaisePOWER();
+            RaiseHALT();
+            SP = AF = BC = DE = HL = new Register16((ushort)Mask.Mask16);
+        }
+
+        public virtual void RaiseHALT()
+        {
+            OnRaisingHALT();
+            HALT().Raise();
+            OnRaisedHALT();
+        }
+
+        public virtual void LowerHALT()
+        {
+            OnLoweringHALT();
+            HALT().Lower();
+            OnLoweredHALT();
+        }
+
+        protected virtual void OnRaisingHALT() => RaisingHALT?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnRaisedHALT() => RaisedHALT?.Invoke(this, EventArgs.Empty);
+
+        protected virtual void OnLoweringHALT() => LoweringHALT?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnLoweredHALT() => LoweredHALT?.Invoke(this, EventArgs.Empty);
+
+        protected override void HandleRESET()
+        {
+            base.HandleRESET();
+            PC.Word = 0;
+        }
+
+        protected sealed override void Push(byte value) => Bus.Write(--SP, value);
+        protected sealed override byte Pop() => Bus.Read(SP++);
+
+        protected sealed override Register16 GetWord()
+        {
+            var returned = base.GetWord();
+            MEMPTR = Bus.Address;
+	        return returned;
+        }
+
+        protected sealed override void SetWord(Register16 value)
+        {
+            base.SetWord(value);
+            MEMPTR = Bus.Address;
+        }
+
+        //
+
+        protected void Restart(byte address)
+        {
+            MEMPTR.Low = address;
+            MEMPTR.High = 0;
+            Call(MEMPTR);
+        }
+
+        protected bool CallConditional(bool condition)
+        {
+            MEMPTR = FetchWord();
+            if (condition)
+                Call(MEMPTR);
+            return condition;
+        }
+
+        protected bool JumpConditional(bool condition)
+        {
+            MEMPTR = FetchWord();
+            if (condition)
+                Jump(MEMPTR);
+            return condition;
+        }
+
+        protected bool ReturnConditional(bool condition)
+        {
+            if (condition)
+                Return();
+            return condition;
+        }
+
+        protected void JumpRelative(sbyte offset)
+        {
+            MEMPTR.Word = (ushort)(PC.Word + offset);
+            Jump(MEMPTR);
+        }
+
+        protected bool JumpRelativeConditional(bool condition)
+        {
+            var offset = (sbyte)FetchByte();
+            if (condition)
+                JumpRelative(offset);
+            return condition;
+        }
+
+        protected override sealed void Return()
+        {
+            base.Return();
+            MEMPTR = PC;
+        }
+
+        protected void Halt()
+        {
+            --PC;
+            LowerHALT();
+        }
+
+        protected void Proceed()
+        {
+            ++PC;
+            RaiseHALT();
+        }
+    }
+}

EightBit/LittleEndianProcessor.cs

@@ -0,0 +1,83 @@
+using System;
+
+namespace EightBit
+{
+    public abstract class LittleEndianProcessor : Processor
+    {
+        protected LittleEndianProcessor(Bus memory)
+        : base(memory)
+        {
+        }
+
+        public override Register16 PeekWord(Register16 address)
+        {
+            var low = Bus.Peek(address);
+            var high = Bus.Peek(++address);
+            return new Register16(low, high);
+        }
+
+        public override void PokeWord(Register16 address, Register16 value)
+        {
+            if (value == null)
+                throw new ArgumentNullException(nameof(value));
+            Bus.Poke(address, value.Low);
+            Bus.Poke(++address, value.High);
+        }
+
+        protected override Register16 FetchWord()
+        {
+            var low = FetchByte();
+            var high = FetchByte();
+            return new Register16(low, high);
+        }
+
+        protected override Register16 GetWord()
+        {
+            var low = BusRead();
+            ++Bus.Address.Word;
+            var high = BusRead();
+            return new Register16(low, high);
+        }
+
+        protected override Register16 GetWordPaged(byte page, byte offset)
+        {
+            var low = GetBytePaged(page, offset);
+            ++Bus.Address.Low;
+            var high = BusRead();
+            return new Register16(low, high);
+        }
+
+        protected override Register16 PopWord()
+        {
+            var low = Pop();
+            var high = Pop();
+            return new Register16(low, high);
+        }
+
+        protected override void PushWord(Register16 value)
+        {
+            if (value == null)
+                throw new ArgumentNullException(nameof(value));
+            Push(value.High);
+            Push(value.Low);
+        }
+
+        protected override void SetWord(Register16 value)
+        {
+            if (value == null)
+                throw new ArgumentNullException(nameof(value));
+            BusWrite(value.Low);
+            ++Bus.Address.Word;
+            BusWrite(value.High);
+        }
+
+        protected override void SetWordPaged(byte page, byte offset, Register16 value)
+        {
+            if (value == null)
+                throw new ArgumentNullException(nameof(value));
+            SetBytePaged(page, offset, value.Low);
+            ++Bus.Address.Low;
+            BusWrite(value.High);
+        }
+    }
+}

EightBit/Mapper.cs

@@ -0,0 +1,7 @@
+namespace EightBit
+{
+    public interface IMapper
+    {
+        MemoryMapping Mapping(Register16 address);
+    }
+}

EightBit/Mask.cs

@@ -0,0 +1,25 @@
+using System;
+
+namespace EightBit
+{
+    public enum Mask
+    {
+        None = 0,
+        Mask1 = Bits.Bit1 - 1,
+        Mask2 = Bits.Bit2 - 1,
+        Mask3 = Bits.Bit3 - 1,
+        Mask4 = Bits.Bit4 - 1,
+        Mask5 = Bits.Bit5 - 1,
+        Mask6 = Bits.Bit6 - 1,
+        Mask7 = Bits.Bit7 - 1,
+        Mask8 = Bits.Bit8 - 1,
+        Mask9 = Bits.Bit9 - 1,
+        Mask10 = Bits.Bit10 - 1,
+        Mask11 = Bits.Bit11 - 1,
+        Mask12 = Bits.Bit12 - 1,
+        Mask13 = Bits.Bit13 - 1,
+        Mask14 = Bits.Bit14 - 1,
+        Mask15 = Bits.Bit15 - 1,
+        Mask16 = Bits.Bit16 - 1
+    }
+}

EightBit/Memory.cs

@@ -0,0 +1,26 @@
+namespace EightBit
+{
+    using System;
+    using System.IO;
+
+    public abstract class Memory
+    {
+        public abstract int Size
+        {
+            get;
+        }
+
+        public abstract byte Peek(ushort address);
+
+        public virtual ref byte Reference(ushort address)
+        {
+            throw new NotImplementedException();
+        }
+
+        public abstract int Load(FileStream file, int writeOffset = 0, int readOffset = 0, int limit = -1);
+        public abstract int Load(string path, int writeOffset = 0, int readOffset = 0, int limit = -1);
+        public abstract int Load(byte[] from, int writeOffset = 0, int readOffset = 0, int limit = -1);
+
+        protected abstract void Poke(ushort address, byte value);
+    }
+}

EightBit/MemoryMapping.cs

@@ -0,0 +1,23 @@
+namespace EightBit
+{
+    public class MemoryMapping
+    {
+        private Memory memory;
+        private ushort begin;
+        private ushort mask;
+        private AccessLevel access;
+
+        public MemoryMapping(Memory memory, ushort begin, ushort mask, AccessLevel access)
+        {
+            this.memory = memory;
+            this.begin = begin;
+            this.mask = mask;
+            this.access = access;
+        }
+
+        public Memory Memory { get => memory; set => memory = value; }
+        public ushort Begin { get => begin; set => begin = value; }
+        public ushort Mask { get => mask; set => mask = value; }
+        public AccessLevel Access { get => access; set => access = value; }
+    }
+}

EightBit/PinLevel.cs

@@ -0,0 +1,7 @@
+namespace EightBit
+{
+    public enum PinLevel
+    {
+        Low, High
+    }
+}

EightBit/PinLevelExtensions.cs

@@ -0,0 +1,13 @@
+namespace EightBit
+{
+    public static class PinLevelExtensions
+    {
+        public static bool Raised(this PinLevel line) => line == PinLevel.High;
+
+        public static bool Lowered(this PinLevel line) => line == PinLevel.Low;
+
+        public static void Raise(this ref PinLevel line) => line = PinLevel.High;
+
+        public static void Lower(this ref PinLevel line) => line = PinLevel.Low;
+    }
+}

EightBit/PortEventArgs.cs

@@ -0,0 +1,16 @@
+using System;
+
+namespace EightBit
+{
+    public sealed class PortEventArgs : EventArgs
+    {
+        private byte port;
+
+        public PortEventArgs(byte value)
+        {
+            port = value;
+        }
+
+        public byte Port { get { return port; } }
+    }
+}

EightBit/Processor.cs

@@ -0,0 +1,183 @@
+namespace EightBit
+{
+    using System;
+
+    public abstract class Processor : ClockedChip
+    {
+        private Bus bus;
+        private byte opcode;
+        private Register16 pc;
+
+        private PinLevel resetLine;
+        private PinLevel intLine;
+
+        protected Processor(Bus memory)
+        {
+            bus = memory;
+            pc = new Register16();
+        }
+
+        public event EventHandler<EventArgs> RaisingRESET;
+        public event EventHandler<EventArgs> RaisedRESET;
+        public event EventHandler<EventArgs> LoweringRESET;
+        public event EventHandler<EventArgs> LoweredRESET;
+
+        public event EventHandler<EventArgs> RaisingINT;
+        public event EventHandler<EventArgs> RaisedINT;
+        public event EventHandler<EventArgs> LoweringINT;
+        public event EventHandler<EventArgs> LoweredINT;
+
+        public Register16 PC { get => pc; set => pc = value; }
+        protected byte OpCode { get => opcode; set => opcode = value; }
+        public Bus Bus { get => bus; set => bus = value; }
+
+        public ref PinLevel RESET() { return ref resetLine; }
+        public ref PinLevel INT() { return ref intLine; }
+
+        public abstract int Step();
+        public abstract int Execute();
+
+        public int Run(int limit)
+        {
+            int current = 0;
+            while (Powered && (current < limit))
+                current += Step();
+            return current;
+        }
+
+        public int Execute(byte value)
+        {
+            OpCode = value;
+	        return Execute();
+        }
+
+        public abstract Register16 PeekWord(Register16 address);
+        public abstract void PokeWord(Register16 address, Register16 value);
+
+        public Register16 PeekWord(byte low, byte high) => PeekWord(new Register16(low, high));
+        public Register16 PeekWord(ushort address) => PeekWord(LowByte(address), HighByte(address));
+
+        public virtual void RaiseRESET()
+        {
+            OnRaisingRESET();
+            RESET().Raise();
+            OnRaisedRESET();
+        }
+
+        public virtual void LowerRESET()
+        {
+            OnLoweringRESET();
+            RESET().Lower();
+            OnLoweredRESET();
+        }
+
+        public virtual void RaiseINT()
+        {
+            OnRaisingINT();
+            INT().Raise();
+            OnRaisedINT();
+        }
+
+        public virtual void LowerINT()
+        {
+            OnLoweringINT();
+            INT().Lower();
+            OnLoweredINT();
+        }
+
+        protected virtual void OnRaisingRESET() => RaisingRESET?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnRaisedRESET() => RaisedRESET?.Invoke(this, EventArgs.Empty);
+
+        protected virtual void OnLoweringRESET() => LoweringRESET?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnLoweredRESET() => LoweredRESET?.Invoke(this, EventArgs.Empty);
+
+        protected virtual void OnRaisingINT() => RaisingINT?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnRaisedINT() => RaisedINT?.Invoke(this, EventArgs.Empty);
+
+        protected virtual void OnLoweringINT() => LoweringINT?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnLoweredINT() => LoweredINT?.Invoke(this, EventArgs.Empty);
+
+        protected virtual void HandleRESET() => RaiseRESET();
+        protected virtual void HandleINT() => RaiseINT();
+
+        protected void BusWrite(byte low, byte data) => BusWrite(low, 0, data);
+
+        protected void BusWrite(Register16 address, byte data) => BusWrite(address.Low, address.High, data);
+
+        protected void BusWrite(byte low, byte high, byte data)
+        {
+            Bus.Address.Low = low;
+            Bus.Address.High = high;
+            BusWrite(data);
+        }
+
+        protected void BusWrite(byte data)
+        {
+            Bus.Data = data;
+            BusWrite();
+        }
+
+        protected virtual void BusWrite() => Bus.Write();
+
+        protected byte BusRead(byte low) => BusRead(low, 0);
+
+        protected byte BusRead(Register16 address) => BusRead(address.Low, address.High);
+
+        protected byte BusRead(byte low, byte high)
+        {
+            Bus.Address.Low = low;
+            Bus.Address.High = high;
+            return BusRead();
+        }
+
+        protected virtual byte BusRead() => Bus.Read();
+
+        protected byte GetBytePaged(byte page, byte offset) => BusRead(new Register16(offset, page));
+
+        protected void SetBytePaged(byte page, byte offset, byte value) => BusWrite(new Register16(offset, page), value);
+
+        protected byte FetchByte() => BusRead(PC++);
+
+        protected abstract Register16 GetWord();
+		protected abstract void SetWord(Register16 value);
+
+		protected abstract Register16 GetWordPaged(byte page, byte offset);
+		protected abstract void SetWordPaged(byte page, byte offset, Register16 value);
+
+		protected abstract Register16 FetchWord();
+
+		protected abstract void Push(byte value);
+		protected abstract byte Pop();
+
+		protected abstract void PushWord(Register16 value);
+		protected abstract Register16 PopWord();
+
+        protected Register16 GetWord(Register16 address)
+        {
+            Bus.Address.Word = address.Word;
+			return GetWord();
+        }
+
+        protected void SetWord(Register16 address, Register16 value)
+        {
+            Bus.Address.Word = address.Word;
+            SetWord(value);
+        }
+
+        protected void Jump(Register16 destination)
+        {
+			PC = destination;
+		}
+
+        protected void Call(Register16 destination)
+        {
+            PushWord(PC);
+            Jump(destination);
+        }
+
+        protected virtual void Return()
+        {
+            Jump(PopWord());
+        }
+    }
+}

EightBit/Properties/AssemblyInfo.cs

@@ -0,0 +1,36 @@
+using System.Reflection;
+using System.Runtime.CompilerServices;
+using System.Runtime.InteropServices;
+
+// General Information about an assembly is controlled through the following
+// set of attributes. Change these attribute values to modify the information
+// associated with an assembly.
+[assembly: AssemblyTitle("EightBit")]
+[assembly: AssemblyDescription("")]
+[assembly: AssemblyConfiguration("")]
+[assembly: AssemblyCompany("")]
+[assembly: AssemblyProduct("EightBit")]
+[assembly: AssemblyCopyright("Copyright ©  2019")]
+[assembly: AssemblyTrademark("")]
+[assembly: AssemblyCulture("")]
+
+// Setting ComVisible to false makes the types in this assembly not visible
+// to COM components.  If you need to access a type in this assembly from
+// COM, set the ComVisible attribute to true on that type.
+[assembly: ComVisible(false)]
+
+// The following GUID is for the ID of the typelib if this project is exposed to COM
+[assembly: Guid("6ebf8857-62a3-4ef4-af21-c1844031d7e4")]
+
+// Version information for an assembly consists of the following four values:
+//
+//      Major Version
+//      Minor Version
+//      Build Number
+//      Revision
+//
+// You can specify all the values or you can default the Build and Revision Numbers
+// by using the '*' as shown below:
+// [assembly: AssemblyVersion("1.0.*")]
+[assembly: AssemblyVersion("1.0.0.0")]
+[assembly: AssemblyFileVersion("1.0.0.0")]

EightBit/Ram.cs

@@ -0,0 +1,19 @@
+namespace EightBit
+{
+    public class Ram : Rom
+    {
+        public Ram(int size = 0)
+        : base(size)
+        {
+        }
+
+        public override sealed ref byte Reference(ushort address) {
+	        return ref Bytes()[address];
+        }
+
+        public new void Poke(ushort address, byte value)
+        {
+            base.Poke(address, value);
+        }
+    }
+}

EightBit/Register16.cs

@@ -0,0 +1,86 @@
+namespace EightBit
+{
+    public sealed class Register16
+    {
+        private byte low;
+        private byte high;
+
+        public Register16() { }
+
+        public Register16(ushort value) => Word = value;
+
+        public Register16(byte lowValue, byte highValue)
+        {
+            Low = lowValue;
+            High = highValue;
+        }
+
+        public byte Low { get => low; set => low = value; }
+        public byte High { get => high; set => high = value; }
+
+        public ushort Word
+        {
+            get
+            {
+                return (ushort)(Chip.PromoteByte(high) | low);
+            }
+
+            set
+            {
+                high = Chip.DemoteByte(value);
+                low = Chip.LowByte(value);
+            }
+        }
+
+        public static implicit operator ushort(Register16 value) { return ToUInt16(value); }
+
+        public static Register16 operator ++(Register16 left) => Increment(left);
+        public static Register16 operator --(Register16 left) => Decrement(left);
+
+        public static bool operator ==(Register16 left, Register16 right) => Equals(left, right);
+        public static bool operator !=(Register16 left, Register16 right) => !(left == right);
+
+        public static Register16 operator +(Register16 left, Register16 right) => Add(left, right);
+        public static Register16 operator -(Register16 left, Register16 right) => Subtract(left, right);
+
+        public static ushort ToUInt16(Register16 value) { return value.Word; }
+        public ushort ToUInt16() { return ToUInt16(this); }
+
+        public static Register16 Increment(Register16 left)
+        {
+            ++left.Word;
+            return left;
+        }
+
+        public static Register16 Decrement(Register16 left)
+        {
+            --left.Word;
+            return left;
+        }
+
+        public static Register16 Add(Register16 left, Register16 right)
+        {
+            left.Word += right.Word;
+            return left;
+        }
+
+        public static Register16 Subtract(Register16 left, Register16 right)
+        {
+            left.Word -= right.Word;
+            return left;
+        }
+
+        public override int GetHashCode() => Word;
+
+        public override bool Equals(object obj)
+        {
+            var register = obj as Register16;
+            return Equals(register);
+        }
+
+        public bool Equals(Register16 register)
+        {
+            return register != null && low == register.low && high == register.high;
+        }
+    }
+}

EightBit/Rom.cs

@@ -0,0 +1,87 @@
+namespace EightBit
+{
+    using System;
+    using System.IO;
+
+    public class Rom : Memory
+    {
+        private byte[] bytes;
+
+        public Rom(int size) => bytes = new byte[size];
+
+        public Rom() : this(0) { }
+
+        public override int Size { get { return bytes.Length; } }
+
+        protected ref byte[] Bytes() { return ref bytes; }
+
+        static public int Load(FileStream file, ref byte[] output, int writeOffset = 0, int readOffset = 0, int limit = -1, int maximumSize = -1)
+        {
+            var size = (int)file.Length;
+
+            if ((maximumSize > 0) && ((size - readOffset) > maximumSize))
+                throw new InvalidOperationException("File is too large");
+
+            if ((limit < 0) || (limit > size))
+                limit = (int)size;
+
+            var extent = limit + writeOffset;
+            if (output.Length < extent)
+            {
+                var updated = new byte[extent];
+                Array.Copy(output, updated, output.Length);
+                output = updated;
+            }
+
+            file.Seek(readOffset, SeekOrigin.Begin);
+            using (var reader = new BinaryReader(file))
+            {
+                reader.Read(output, writeOffset, size);
+            }
+
+            return size;
+        }
+
+        public static int Load(string path, ref byte[] output, int writeOffset = 0, int readOffset = 0, int limit = -1, int maximumSize = -1)
+        {
+            using (var file = File.Open(path, FileMode.Open))
+            {
+                return Load(file, ref output, writeOffset, readOffset, limit, maximumSize);
+            }
+        }
+
+        public override int Load(FileStream file, int writeOffset = 0, int readOffset = 0, int limit = -1)
+        {
+            var maximumSize = Size - writeOffset;
+            return Load(file, ref Bytes(), writeOffset, readOffset, limit, maximumSize);
+        }
+
+        public override int Load(string path, int writeOffset = 0, int readOffset = 0, int limit = -1)
+        {
+            var maximumSize = Size - writeOffset;
+            return Load(path, ref Bytes(), writeOffset, readOffset, limit, maximumSize);
+        }
+
+        public override int Load(byte[] from, int writeOffset = 0, int readOffset = 0, int limit = -1)
+        {
+            if (limit < 0)
+                limit = Size - readOffset;
+
+            var extent = limit + writeOffset;
+            if (Size < extent)
+            {
+                var updated = new byte[extent];
+                Array.Copy(Bytes(), updated, Size);
+                Bytes() = updated;
+            }
+
+            Array.Copy(from, readOffset, Bytes(), writeOffset, limit);
+
+            return limit;
+        }
+
+        public override byte Peek(ushort address) => Bytes()[address];
+
+        protected override void Poke(ushort address, byte value) => Bytes()[address] = value;
+    }
+}

EightBit/UnusedMemory.cs

@@ -0,0 +1,25 @@
+namespace EightBit
+{
+    using System.IO;
+
+    public class UnusedMemory : Memory
+    {
+        private readonly int size;
+        private readonly byte unchanging;
+
+        UnusedMemory(int size, byte unchanging)
+        {
+            this.size = size;
+            this.unchanging = unchanging;
+        }
+
+        public override int Size => size;
+
+        public override int Load(FileStream file, int writeOffset = 0, int readOffset = 0, int limit = -1) => throw new System.NotImplementedException();
+        public override int Load(string path, int writeOffset = 0, int readOffset = 0, int limit = -1) => throw new System.NotImplementedException();
+        public override int Load(byte[] from, int writeOffset = 0, int readOffset = 0, int limit = -1) => throw new System.NotImplementedException();
+
+        public override byte Peek(ushort address) => unchanging;
+        protected override void Poke(ushort address, byte value) => throw new System.NotImplementedException();
+    }
+}

M6502/Disassembly.cs

@@ -0,0 +1,970 @@
+namespace EightBit
+{
+    using System.Text;
+
+    public class Disassembly
+    {
+        private Bus bus;
+        private M6502 processor;
+        private Symbols symbols;
+        private ushort address;
+
+        public Disassembly(Bus bus, M6502 processor, Symbols symbols)
+        {
+            this.bus = bus;
+            this.processor = processor;
+            this.symbols = symbols;
+        }
+
+        public string Disassemble(ushort current)
+        {
+            address = current;
+
+            var output = new StringBuilder();
+
+            var cell = bus.Peek(current);
+
+            output.Append(Dump_ByteValue(cell));
+            output.Append(" ");
+
+            var next = bus.Peek((ushort)(current + 1));
+            var relative = (ushort)(processor.PC.Word + 2 + (sbyte)next);
+
+            var aaa = (cell & 0b11100000) >> 5;
+            var bbb = (cell & 0b00011100) >> 2;
+            var cc = (cell & 0b00000011);
+
+            switch (cc)
+            {
+                case 0b00:
+                    switch (aaa)
+                    {
+                        case 0b000:
+                            switch (bbb)
+                            {
+                                case 0b000: // BRK
+                                    output.Append(Disassemble_Implied("BRK"));
+                                    break;
+                                case 0b001: // DOP/NOP (0x04)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                case 0b010: // PHP
+                                    output.Append(Disassemble_Implied("PHP"));
+                                    break;
+                                case 0b011: // TOP/NOP (0b00001100, 0x0c)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                case 0b100: // BPL
+                                    output.Append(Disassemble_Relative("BPL", relative));
+                                    break;
+                                case 0b101: // DOP/NOP (0x14)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                case 0b110: // CLC
+                                    output.Append(Disassemble_Implied("CLC"));
+                                    break;
+                                case 0b111: // TOP/NOP (0b00011100, 0x1c)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                default:
+                                    throw new System.InvalidOperationException("Illegal instruction");
+                            }
+                            break;
+                        case 0b001:
+                            switch (bbb)
+                            {
+                                case 0b000: // JSR
+                                    output.Append(Disassemble_Absolute("JSR"));
+                                    break;
+                                case 0b010: // PLP
+                                    output.Append(Disassemble_Implied("PLP"));
+                                    break;
+                                case 0b100: // BMI
+                                    output.Append(Disassemble_Relative("BMI", relative));
+                                    break;
+                                case 0b101: // DOP/NOP (0x34)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                case 0b110: // SEC
+                                    output.Append(Disassemble_Implied("SEC"));
+                                    break;
+                                case 0b111: // TOP/NOP (0b00111100, 0x3c)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                default:    // BIT
+                                    output.Append(Disassemble_AM_00(bbb, "BIT"));
+                                    break;
+                            }
+                            break;
+                        case 0b010:
+                            switch (bbb)
+                            {
+                                case 0b000: // RTI
+                                    output.Append(Disassemble_Implied("RTI"));
+                                    break;
+                                case 0b001: // DOP/NOP (0x44)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                case 0b010: // PHA
+                                    output.Append(Disassemble_Implied("PHA"));
+                                    break;
+                                case 0b011: // JMP
+                                    output.Append(Disassemble_Absolute("JMP"));
+                                    break;
+                                case 0b100: // BVC
+                                    output.Append(Disassemble_Relative("BVC", relative));
+                                    break;
+                                case 0b101: // DOP/NOP (0x54)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                case 0b110: // CLI
+                                    output.Append(Disassemble_Implied("CLI"));
+                                    break;
+                                case 0b111: // TOP/NOP (0b01011100, 0x5c)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                default:
+                                    throw new System.InvalidOperationException("Illegal addressing mode");
+                            }
+                            break;
+                        case 0b011:
+                            switch (bbb)
+                            {
+                                case 0b000: // RTS
+                                    output.Append(Disassemble_Implied("RTS"));
+                                    break;
+                                case 0b001: // DOP/NOP (0x64)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                case 0b010: // PLA
+                                    output.Append(Disassemble_Implied("PLA"));
+                                    break;
+                                case 0b011: // JMP (abs)
+                                    output.Append(Disassemble_Indirect("JMP"));
+                                    break;
+                                case 0b100: // BVS
+                                    output.Append(Disassemble_Relative("BVS", relative));
+                                    break;
+                                case 0b101: // DOP/NOP (0x74)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                case 0b110: // SEI
+                                    output.Append(Disassemble_Implied("SEI"));
+                                    break;
+                                case 0b111: // TOP/NOP (0b01111100, 0x7c)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                default:
+                                    throw new System.InvalidOperationException("Illegal addressing mode");
+                            }
+                            break;
+                        case 0b100:
+                            switch (bbb)
+                            {
+                                case 0b000: // DOP/NOP (0x80)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                case 0b010: // DEY
+                                    output.Append(Disassemble_Implied("DEY"));
+                                    break;
+                                case 0b100: // BCC
+                                    output.Append(Disassemble_Relative("BCC", relative));
+                                    break;
+                                case 0b110: // TYA
+                                    output.Append(Disassemble_Implied("TYA"));
+                                    break;
+                                default:    // STY
+                                    output.Append(Disassemble_AM_00(bbb, "STY"));
+                                    break;
+                            }
+                            break;
+                        case 0b101:
+                            switch (bbb)
+                            {
+                                case 0b010: // TAY
+                                    output.Append(Disassemble_Implied("TAY"));
+                                    break;
+                                case 0b100: // BCS
+                                    output.Append(Disassemble_Relative("BCS", relative));
+                                    break;
+                                case 0b110: // CLV
+                                    output.Append(Disassemble_Implied("CLV"));
+                                    break;
+                                default:    // LDY
+                                    output.Append(Disassemble_AM_00(bbb, "LDY"));
+                                    break;
+                            }
+                            break;
+                        case 0b110:
+                            switch (bbb)
+                            {
+                                case 0b010: // INY
+                                    output.Append(Disassemble_Implied("INY"));
+                                    break;
+                                case 0b100: // BNE
+                                    output.Append(Disassemble_Relative("BNE", relative));
+                                    break;
+                                case 0b101: // DOP/NOP (0xd4)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                case 0b110: // CLD
+                                    output.Append(Disassemble_Implied("CLD"));
+                                    break;
+                                case 0b111: // TOP/NOP (0b11011100, 0xdc)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                default:    // CPY
+                                    output.Append(Disassemble_AM_00(bbb, "CPY"));
+                                    break;
+                            }
+                            break;
+                        case 0b111:
+                            switch (bbb)
+                            {
+                                case 0b010: // INX
+                                    output.Append(Disassemble_Implied("INX"));
+                                    break;
+                                case 0b100: // BEQ
+                                    output.Append(Disassemble_Relative("BEQ", relative));
+                                    break;
+                                case 0b101: // DOP/NOP (0xf4)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                case 0b110: // SED
+                                    output.Append(Disassemble_Implied("SED"));
+                                    break;
+                                case 0b111: // TOP/NOP (0b11111100, 0xfc)
+                                    output.Append(Disassemble_AM_00(bbb, "*NOP"));
+                                    break;
+                                default:    // CPX
+                                    output.Append(Disassemble_AM_00(bbb, "CPX"));
+                                    break;
+                            }
+                            break;
+                    }
+                    break;
+                case 0b01:
+                    switch (aaa)
+                    {
+                        case 0b000:     // ORA
+                            output.Append(Disassemble_AM_01(bbb, "ORA"));
+                            break;
+                        case 0b001:     // AND
+                            output.Append(Disassemble_AM_01(bbb, "AND"));
+                            break;
+                        case 0b010:     // EOR
+                            output.Append(Disassemble_AM_01(bbb, "EOR"));
+                            break;
+                        case 0b011:     // ADC
+                            output.Append(Disassemble_AM_01(bbb, "ADC"));
+                            break;
+                        case 0b100:     // STA
+                            output.Append(Disassemble_AM_01(bbb, "STA"));
+                            break;
+                        case 0b101:     // LDA
+                            output.Append(Disassemble_AM_01(bbb, "LDA"));
+                            break;
+                        case 0b110:     // CMP
+                            output.Append(Disassemble_AM_01(bbb, "CMP"));
+                            break;
+                        case 0b111:     // SBC
+                            output.Append(Disassemble_AM_01(bbb, "SBC"));
+                            break;
+                        default:
+                            throw new System.InvalidOperationException("Illegal addressing mode");
+                    }
+                    break;
+                case 0b10:
+                    switch (aaa)
+                    {
+                        case 0b000:     // ASL
+                            switch (bbb)
+                            {
+                                case 0b110: // 0x1a
+                                    output.Append(Disassemble_Implied("*NOP"));
+                                    break;
+                                default:
+                                    output.Append(Disassemble_AM_10(bbb, "ASL"));
+                                    break;
+                            }
+                            break;
+                        case 0b001:     // ROL
+                            switch (bbb)
+                            {
+                                case 0b110: // 0x3a
+                                    output.Append(Disassemble_Implied("*NOP"));
+                                    break;
+                                default:
+                                    output.Append(Disassemble_AM_10(bbb, "ROL"));
+                                    break;
+                            }
+                            break;
+                        case 0b010:     // LSR
+                            switch (bbb)
+                            {
+                                case 0b110: // 0x5a
+                                    output.Append(Disassemble_Implied("*NOP"));
+                                    break;
+                                default:
+                                    output.Append(Disassemble_AM_10(bbb, "LSR"));
+                                    break;
+                            }
+                            break;
+                        case 0b011:     // ROR
+                            switch (bbb)
+                            {
+                                case 0b110: // 0x7a
+                                    output.Append(Disassemble_Implied("*NOP"));
+                                    break;
+                                default:
+                                    output.Append(Disassemble_AM_10(bbb, "ROR"));
+                                    break;
+                            }
+                            break;
+                        case 0b100:
+                            switch (bbb)
+                            {
+                                case 0b010: // TXA
+                                    output.Append(Disassemble_Implied("TXA"));
+                                    break;
+                                case 0b110: // TXS
+                                    output.Append(Disassemble_Implied("TXS"));
+                                    break;
+                                default:    // STX
+                                    output.Append(Disassemble_AM_10_x(bbb, "STX"));
+                                    break;
+                            }
+                            break;
+                        case 0b101:
+                            switch (bbb)
+                            {
+                                case 0b010: // TAX
+                                    output.Append(Disassemble_Implied("TAX"));
+                                    break;
+                                case 0b110: // TSX
+                                    output.Append(Disassemble_Implied("TSX"));
+                                    break;
+                                default:    // LDX
+                                    output.Append(Disassemble_AM_10_x(bbb, "LDX"));
+                                    break;
+                            }
+                            break;
+                        case 0b110:
+                            switch (bbb)
+                            {
+                                case 0b010: // DEX
+                                    output.Append(Disassemble_Implied("DEX"));
+                                    break;
+                                case 0b110: // 0xda
+                                    output.Append(Disassemble_Implied("*NOP"));
+                                    break;
+                                default:    // DEC
+                                    output.Append(Disassemble_AM_10(bbb, "DEC"));
+                                    break;
+                            }
+                            break;
+                        case 0b111:
+                            switch (bbb)
+                            {
+                                case 0b010: // NOP
+                                    output.Append(Disassemble_Implied("NOP"));
+                                    break;
+                                case 0b110: // 0xfa
+                                    output.Append(Disassemble_Implied("*NOP"));
+                                    break;
+                                default:    // INC
+                                    output.Append(Disassemble_AM_10(bbb, "INC"));
+                                    break;
+                            }
+                            break;
+                        default:
+                            throw new System.InvalidOperationException("Illegal instruction");
+                    }
+                    break;
+                case 0b11:
+                    switch (aaa)
+                    {
+                        case 0b000:
+                            switch (bbb)
+                            {
+                                case 0b010:
+                                    output.Append(Disassemble_Immediate("*AAC"));
+                                    break;
+                                default:
+                                    output.Append(Disassemble_AM_01(bbb, "*SLO"));
+                                    break;
+                            }
+                            break;
+                        case 0b001:
+
+                            switch (bbb)
+                            {
+                                case 0b010:
+                                    output.Append(Disassemble_Immediate("*AAC"));
+                                    break;
+                                default:
+                                    output.Append(Disassemble_AM_01(bbb, "*RLA"));
+                                    break;
+                            }
+                            break;
+                        case 0b010:
+                            output.Append(Disassemble_AM_01(bbb, "*SRE"));
+                            break;
+                        case 0b011:
+                            output.Append(Disassemble_AM_01(bbb, "*RRA"));
+                            break;
+                        case 0b100:
+                            output.Append(Disassemble_AM_11(bbb, "*SAX"));
+                            break;
+                        case 0b101:
+                            output.Append(Disassemble_AM_11(bbb, "*LAX"));
+                            break;
+                        case 0b110:
+                            output.Append(Disassemble_AM_11_x(bbb, "*DCP"));
+                            break;
+                        case 0b111:
+                            switch (bbb)
+                            {
+                                case 0b000: // *ISB
+                                case 0b001:
+                                case 0b011:
+                                case 0b100:
+                                case 0b101:
+                                case 0b110:
+                                case 0b111:
+                                    output.Append(Disassemble_AM_01(bbb, "*ISB"));
+                                    break;
+                                case 0b010:
+                                    output.Append(Disassemble_AM_11(bbb, "*SBC"));
+                                    break;
+                                default:
+                                    throw new System.InvalidOperationException("Impossible addressing mode");
+                            }
+                            break;
+                        default:
+                            throw new System.InvalidOperationException("Illegal instruction group");
+                    }
+                    break;
+                default:
+                    throw new System.InvalidOperationException("Impossible instruction");
+            }
+            return output.ToString();
+        }
+
+        public static string Dump_Flags(byte value)
+        {
+            var returned = new StringBuilder();
+            returned.Append((value & (byte)StatusBits.NF) != 0 ? "N" : "-");
+            returned.Append((value & (byte)StatusBits.VF) != 0 ? "O" : "-");
+            returned.Append((value & (byte)StatusBits.RF) != 0 ? "R" : "-");
+            returned.Append((value & (byte)StatusBits.BF) != 0 ? "B" : "-");
+            returned.Append((value & (byte)StatusBits.DF) != 0 ? "D" : "-");
+            returned.Append((value & (byte)StatusBits.IF) != 0 ? "I" : "-");
+            returned.Append((value & (byte)StatusBits.ZF) != 0 ? "Z" : "-");
+            returned.Append((value & (byte)StatusBits.CF) != 0 ? "C" : "-");
+            return returned.ToString();
+        }
+
+        public static string Dump_ByteValue(byte value)
+        {
+            return value.ToString("X2");
+        }
+
+        public static string Dump_WordValue(ushort value)
+        {
+            return value.ToString("X4");
+        }
+
+        //
+
+        private string ConvertAddress(ushort absolute)
+        {
+            if (symbols.Labels.TryGetValue(absolute, out string label))
+                return label;
+            return "$" + Dump_WordValue(absolute);
+        }
+
+        private string ConvertAddress(byte absolute)
+        {
+            if (symbols.Labels.TryGetValue(absolute, out string label))
+                return label;
+            return "$" + Dump_ByteValue(absolute);
+        }
+
+        private string ConvertConstant(ushort constant)
+        {
+            if (symbols.Constants.TryGetValue(constant, out string label))
+                return label;
+            return Dump_DByte(constant);
+        }
+
+        private string ConvertConstant(byte constant)
+        {
+            if (symbols.Constants.TryGetValue(constant, out string label))
+                return label;
+            return Dump_ByteValue(constant);
+        }
+
+        //
+
+        private byte GetByte(ushort absolute)
+        {
+            return bus.Peek(absolute);
+        }
+
+        private ushort GetWord(ushort absolute)
+        {
+            return processor.PeekWord(absolute);
+        }
+
+        //
+
+        private string Dump_Byte(ushort absolute)
+        {
+            return Dump_ByteValue(GetByte(absolute));
+        }
+
+        private string Dump_DByte(ushort absolute)
+        {
+            return Dump_Byte(absolute) + " " + Dump_Byte(++absolute);
+        }
+
+        private string Dump_Word(ushort absolute)
+        {
+            return Dump_WordValue(GetWord(absolute));
+        }
+
+        //
+
+        private string Disassemble_Implied(string instruction)
+        {
+			return "\t" + instruction;
+		}
+
+        private string Disassemble_Absolute(string instruction)
+        {
+            return AM_Absolute_dump() + "\t" + instruction + " " + AM_Absolute();
+        }
+
+        private string Disassemble_Indirect(string instruction)
+        {
+            return AM_Absolute_dump() + "\t" + instruction + " (" + AM_Absolute() + ")";
+        }
+
+        private string Disassemble_Relative(string instruction, ushort absolute)
+        {
+            return AM_Immediate_dump() + "\t" + instruction + " $" + Dump_WordValue(absolute);
+        }
+
+        private string Disassemble_Immediate(string instruction)
+        {
+            return AM_Immediate_dump() + "\t" + instruction + " " + AM_Immediate();
+        }
+
+        private string Disassemble_AM_00(int bbb, string instruction)
+        {
+            return AM_00_dump(bbb) + "\t" + instruction + " " + AM_00(bbb);
+        }
+
+        private string Disassemble_AM_01(int bbb, string instruction)
+        {
+            return AM_01_dump(bbb) + "\t" + instruction + " " + AM_01(bbb);
+        }
+
+        private string Disassemble_AM_10(int bbb, string instruction)
+        {
+            return AM_10_dump(bbb) + "\t" + instruction + " " + AM_10(bbb);
+        }
+
+        private string Disassemble_AM_10_x(int bbb, string instruction)
+        {
+            return AM_10_x_dump(bbb) + "\t" + instruction + " " + AM_10_x(bbb);
+        }
+
+        private string Disassemble_AM_11(int bbb, string instruction)
+        {
+            return AM_11_dump(bbb) + "\t" + instruction + " " + AM_11(bbb);
+        }
+
+        private string Disassemble_AM_11_x(int bbb, string instruction)
+        {
+            return AM_11_x_dump(bbb) + "\t" + instruction + " " + AM_11_x(bbb);
+        }
+
+        private string AM_Immediate_dump()
+        {
+            return Dump_Byte((ushort)(address + 1));
+        }
+
+        private string AM_Immediate()
+        {
+            return "#$" + AM_Immediate_dump();
+        }
+
+        private string AM_Absolute_dump()
+        {
+            return Dump_DByte((ushort)(address + 1));
+        }
+
+        private string AM_Absolute()
+        {
+            return "$" + Dump_Word((ushort)(address + 1));
+        }
+
+        private string AM_ZeroPage_dump()
+        {
+            return Dump_Byte((ushort)(address + 1));
+        }
+
+        private string AM_ZeroPage()
+        {
+            return "$" + Dump_Byte((ushort)(address + 1));
+        }
+
+        private string AM_ZeroPageX_dump()
+        {
+            return AM_ZeroPage_dump();
+        }
+
+        private string AM_ZeroPageX()
+        {
+            return AM_ZeroPage() + ",X";
+        }
+
+        private string AM_ZeroPageY_dump()
+        {
+            return AM_ZeroPage_dump();
+        }
+
+        private string AM_ZeroPageY()
+        {
+            return AM_ZeroPage() + ",Y";
+        }
+
+        private string AM_AbsoluteX_dump()
+        {
+            return AM_Absolute_dump();
+        }
+
+        private string AM_AbsoluteX()
+        {
+            return AM_Absolute() + ",X";
+        }
+
+        private string AM_AbsoluteY_dump()
+        {
+            return AM_Absolute_dump();
+        }
+
+        private string AM_AbsoluteY()
+        {
+            return AM_Absolute() + ",Y";
+        }
+
+        private string AM_IndexedIndirectX_dump()
+        {
+            return AM_ZeroPage_dump();
+        }
+
+        private string AM_IndexedIndirectX()
+        {
+            return "($" + Dump_Byte((ushort)(address + 1)) + ",X)";
+        }
+
+        private string AM_IndirectIndexedY_dump()
+        {
+            return AM_ZeroPage_dump();
+        }
+
+        private string AM_IndirectIndexedY()
+        {
+            return "($" + Dump_Byte((ushort)(address + 1)) + "),Y";
+        }
+
+        //
+
+        private string AM_00_dump(int bbb)
+        {
+            switch (bbb)
+            {
+                case 0b000:
+                    return AM_Immediate_dump();
+                case 0b001:
+                    return AM_ZeroPage_dump();
+                case 0b011:
+                    return AM_Absolute_dump();
+                case 0b101:
+                    return AM_ZeroPageX_dump();
+                case 0b111:
+                    return AM_AbsoluteX_dump();
+                case 0b010:
+                case 0b100:
+                case 0b110:
+                default:
+                    throw new System.InvalidOperationException("Illegal addressing mode");
+            }
+        }
+
+        private string AM_00(int bbb)
+        {
+            switch (bbb)
+            {
+                case 0b000:
+                    return AM_Immediate();
+                case 0b001:
+                    return AM_ZeroPage();
+                case 0b011:
+                    return AM_Absolute();
+                case 0b101:
+                    return AM_ZeroPageX();
+                case 0b111:
+                    return AM_AbsoluteX();
+                case 0b010:
+                case 0b100:
+                case 0b110:
+                default:
+                    throw new System.InvalidOperationException("Illegal addressing mode");
+            }
+        }
+
+        private string AM_01_dump(int bbb)
+        {
+            switch (bbb)
+            {
+                case 0b000:
+                    return AM_IndexedIndirectX_dump();
+                case 0b001:
+                    return AM_ZeroPage_dump();
+                case 0b010:
+                    return AM_Immediate_dump();
+                case 0b011:
+                    return AM_Absolute_dump();
+                case 0b100:
+                    return AM_IndirectIndexedY_dump();
+                case 0b101:
+                    return AM_ZeroPageX_dump();
+                case 0b110:
+                    return AM_AbsoluteY_dump();
+                case 0b111:
+                    return AM_AbsoluteX_dump();
+                default:
+                    throw new System.InvalidOperationException("Illegal addressing mode");
+            }
+        }
+
+        private string AM_01(int bbb)
+        {
+            switch (bbb)
+            {
+                case 0b000:
+                    return AM_IndexedIndirectX();
+                case 0b001:
+                    return AM_ZeroPage();
+                case 0b010:
+                    return AM_Immediate();
+                case 0b011:
+                    return AM_Absolute();
+                case 0b100:
+                    return AM_IndirectIndexedY();
+                case 0b101:
+                    return AM_ZeroPageX();
+                case 0b110:
+                    return AM_AbsoluteY();
+                case 0b111:
+                    return AM_AbsoluteX();
+                default:
+                    throw new System.InvalidOperationException("Illegal addressing mode");
+            }
+        }
+
+        private string AM_10_dump(int bbb)
+        {
+            switch (bbb)
+            {
+                case 0b000:
+                    return AM_Immediate_dump();
+                case 0b001:
+                    return AM_ZeroPage_dump();
+                case 0b010:
+                    return "";
+                case 0b011:
+                    return AM_Absolute_dump();
+                case 0b101:
+                    return AM_ZeroPageX_dump();
+                case 0b111:
+                    return AM_AbsoluteX_dump();
+                case 0b100:
+                case 0b110:
+                default:
+                    throw new System.InvalidOperationException("Illegal addressing mode");
+            }
+        }
+
+        private string AM_10(int bbb)
+        {
+            switch (bbb)
+            {
+                case 0b000:
+                    return AM_Immediate();
+                case 0b001:
+                    return AM_ZeroPage();
+                case 0b010:
+                    return "A";
+                case 0b011:
+                    return AM_Absolute();
+                case 0b101:
+                    return AM_ZeroPageX();
+                case 0b111:
+                    return AM_AbsoluteX();
+                case 0b100:
+                case 0b110:
+                default:
+                    throw new System.InvalidOperationException("Illegal addressing mode");
+            }
+        }
+
+        private string AM_10_x_dump(int bbb)
+        {
+            switch (bbb)
+            {
+                case 0b000:
+                    return AM_Immediate_dump();
+                case 0b001:
+                    return AM_ZeroPage_dump();
+                case 0b010:
+                    return "";
+                case 0b011:
+                    return AM_Absolute_dump();
+                case 0b101:
+                    return AM_ZeroPageY_dump();
+                case 0b111:
+                    return AM_AbsoluteY_dump();
+                case 0b100:
+                case 0b110:
+                default:
+                    throw new System.InvalidOperationException("Illegal addressing mode");
+            }
+        }
+
+        private string AM_10_x(int bbb)
+        {
+            switch (bbb)
+            {
+                case 0b000:
+                    return AM_Immediate();
+                case 0b001:
+                    return AM_ZeroPage();
+                case 0b010:
+                    return "A";
+                case 0b011:
+                    return AM_Absolute();
+                case 0b101:
+                    return AM_ZeroPageY();
+                case 0b111:
+                    return AM_AbsoluteY();
+                case 0b100:
+                case 0b110:
+                default:
+                    throw new System.InvalidOperationException("Illegal addressing mode");
+            }
+        }
+
+        private string AM_11_dump(int bbb)
+        {
+            switch (bbb)
+            {
+                case 0b000:
+                    return AM_IndexedIndirectX_dump();
+                case 0b001:
+                    return AM_ZeroPage_dump();
+                case 0b010:
+                    return AM_Immediate_dump();
+                case 0b011:
+                    return AM_Absolute_dump();
+                case 0b100:
+                    return AM_IndirectIndexedY_dump();
+                case 0b101:
+                    return AM_ZeroPageY_dump();
+                case 0b111:
+                    return AM_AbsoluteY_dump();
+                case 0b110:
+                default:
+                    throw new System.InvalidOperationException("Illegal addressing mode");
+            }
+        }
+
+        private string AM_11_x_dump(int bbb)
+        {
+            switch (bbb)
+            {
+                case 0b000:
+                    return AM_IndexedIndirectX_dump();
+                case 0b001:
+                    return AM_ZeroPage_dump();
+                case 0b010:
+                    return AM_Immediate_dump();
+                case 0b011:
+                    return AM_Absolute_dump();
+                case 0b100:
+                    return AM_IndirectIndexedY_dump();
+                case 0b101:
+                    return AM_ZeroPageX_dump();
+                case 0b110:
+                    return AM_AbsoluteY_dump();
+                case 0b111:
+                    return AM_AbsoluteX_dump();
+                default:
+                    throw new System.InvalidOperationException("Illegal addressing mode");
+            }
+        }
+
+        private string AM_11(int bbb)
+        {
+            switch (bbb)
+            {
+                case 0b000:
+                    return AM_IndexedIndirectX();
+                case 0b001:
+                    return AM_ZeroPage();
+                case 0b010:
+                    return AM_Immediate();
+                case 0b011:
+                    return AM_Absolute();
+                case 0b100:
+                    return AM_IndirectIndexedY();
+                case 0b101:
+                    return AM_ZeroPageY();
+                case 0b111:
+                    return AM_AbsoluteY();
+                case 0b110:
+                default:
+                    throw new System.InvalidOperationException("Illegal addressing mode");
+            }
+        }
+
+        private string AM_11_x(int bbb)
+        {
+            switch (bbb)
+            {
+                case 0b000:
+                    return AM_IndexedIndirectX();
+                case 0b001:
+                    return AM_ZeroPage();
+                case 0b010:
+                    return AM_Immediate();
+                case 0b011:
+                    return AM_Absolute();
+                case 0b100:
+                    return AM_IndirectIndexedY();
+                case 0b101:
+                    return AM_ZeroPageX();
+                case 0b110:
+                    return AM_AbsoluteY();
+                case 0b111:
+                    return AM_AbsoluteX();
+                default:
+                    throw new System.InvalidOperationException("Illegal addressing mode");
+            }
+        }
+    }
+}

M6502/M6502.cs

@@ -0,0 +1,928 @@
+namespace EightBit
+{
+    using System;
+
+    public class M6502 : LittleEndianProcessor
+    {
+        private const byte IRQvector = 0xfe;  // IRQ vector
+        private const byte RSTvector = 0xfc;  // RST vector
+        private const byte NMIvector = 0xfa;  // NMI vector
+
+        private byte x;
+        private byte y;
+        private byte a;
+        private byte s;
+        private byte p;
+
+        private Register16 intermediate;
+
+        private bool handlingRESET;
+        private bool handlingNMI;
+        private bool handlingINT;
+
+        private PinLevel nmiLine;
+        private PinLevel soLine;
+        private PinLevel syncLine;
+        private PinLevel rdyLine;
+
+        public M6502(Bus bus)
+        : base(bus)
+        {
+            intermediate = new Register16();
+        }
+
+        public event EventHandler<EventArgs> ExecutingInstruction;
+        public event EventHandler<EventArgs> ExecutedInstruction;
+
+        public event EventHandler<EventArgs> RaisingNMI;
+        public event EventHandler<EventArgs> RaisedNMI;
+        public event EventHandler<EventArgs> LoweringNMI;
+        public event EventHandler<EventArgs> LoweredNMI;
+
+        public event EventHandler<EventArgs> RaisingSO;
+        public event EventHandler<EventArgs> RaisedSO;
+        public event EventHandler<EventArgs> LoweringSO;
+        public event EventHandler<EventArgs> LoweredSO;
+
+        public event EventHandler<EventArgs> RaisingSYNC;
+        public event EventHandler<EventArgs> RaisedSYNC;
+        public event EventHandler<EventArgs> LoweringSYNC;
+        public event EventHandler<EventArgs> LoweredSYNC;
+
+        public event EventHandler<EventArgs> RaisingRDY;
+        public event EventHandler<EventArgs> RaisedRDY;
+        public event EventHandler<EventArgs> LoweringRDY;
+        public event EventHandler<EventArgs> LoweredRDY;
+
+        public byte X { get => x; set => x = value; }
+        public byte Y { get => y; set { y = value; } }
+        public byte A { get => a; set { a = value; } }
+        public byte S { get => s; set { s = value; } }
+        public byte P { get => p; set { p = value; } }
+
+        private int InterruptMasked => P & (byte)StatusBits.IF;
+        private int Decimal => P & (byte)StatusBits.DF;
+        private int Negative => P & (byte)StatusBits.NF;
+        private int Zero => P & (byte)StatusBits.ZF;
+        private int Overflow => P & (byte)StatusBits.VF;
+        private int Carry => P & (byte)StatusBits.CF;
+
+        public ref PinLevel NMI() => ref nmiLine;
+        public ref PinLevel SO() => ref soLine;
+        public ref PinLevel SYNC() => ref syncLine;
+        public ref PinLevel RDY() => ref rdyLine;
+
+        public virtual void RaiseNMI()
+        {
+            OnRaisingNMI();
+            NMI().Raise();
+            OnRaisedNMI();
+        }
+
+        public virtual void LowerNMI()
+        {
+            OnLoweringNMI();
+            NMI().Lower();
+            OnLoweredNMI();
+        }
+
+        public virtual void RaiseSO()
+        {
+            OnRaisingSO();
+            SO().Raise();
+            OnRaisedSO();
+        }
+
+        public virtual void LowerSO()
+        {
+            OnLoweringSO();
+            SO().Lower();
+            OnLoweredSO();
+        }
+
+        protected virtual void RaiseSYNC()
+        {
+            OnRaisingSYNC();
+            SYNC().Raise();
+            OnRaisedSYNC();
+        }
+
+        protected virtual void LowerSYNC()
+        {
+            OnLoweringSYNC();
+            SYNC().Lower();
+            OnLoweredSYNC();
+        }
+
+        public virtual void RaiseRDY()
+        {
+            OnRaisingRDY();
+            RDY().Raise();
+            OnRaisedRDY();
+        }
+
+        public virtual void LowerRDY()
+        {
+            OnLoweringRDY();
+            RDY().Lower();
+            OnLoweredRDY();
+        }
+
+        protected virtual void OnExecutingInstruction() => ExecutingInstruction?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnExecutedInstruction() => ExecutedInstruction?.Invoke(this, EventArgs.Empty);
+
+        protected virtual void OnRaisingNMI() => RaisingNMI?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnRaisedNMI() => RaisedNMI?.Invoke(this, EventArgs.Empty);
+
+        protected virtual void OnLoweringNMI() => LoweringNMI?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnLoweredNMI() => LoweredNMI?.Invoke(this, EventArgs.Empty);
+
+        protected virtual void OnRaisingSO() => RaisingSO?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnRaisedSO() => RaisedSO?.Invoke(this, EventArgs.Empty);
+
+        protected virtual void OnLoweringSO() => LoweringSO?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnLoweredSO() => LoweredSO?.Invoke(this, EventArgs.Empty);
+
+        protected virtual void OnRaisingSYNC() => RaisingSYNC?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnRaisedSYNC() => RaisedSYNC?.Invoke(this, EventArgs.Empty);
+
+        protected virtual void OnLoweringSYNC() => LoweringSYNC?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnLoweredSYNC() => LoweredSYNC?.Invoke(this, EventArgs.Empty);
+
+        protected virtual void OnRaisingRDY() => RaisingRDY?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnRaisedRDY() => RaisedRDY?.Invoke(this, EventArgs.Empty);
+
+        protected virtual void OnLoweringRDY() => LoweringRDY?.Invoke(this, EventArgs.Empty);
+        protected virtual void OnLoweredRDY() => LoweredRDY?.Invoke(this, EventArgs.Empty);
+
+        public override int Execute()
+        {
+            RaiseSYNC();    // Instruction fetch has now completed
+
+            switch (OpCode)
+            {
+                case 0x00: FetchByte(); Interrupt(); break;                                                     // BRK (implied)
+                case 0x01: A = OrR(A, AM_IndexedIndirectX()); break;                                            // ORA (indexed indirect X)
+                case 0x02: break;
+                case 0x03: SLO(AM_IndexedIndirectX()); break;                                                   // *SLO (indexed indirect X)
+                case 0x04: AM_ZeroPage(); break;                                                                // *NOP (zero page)
+                case 0x05: A = OrR(A, AM_ZeroPage()); break;                                                    // ORA (zero page)
+                case 0x06: BusReadModifyWrite(ASL(AM_ZeroPage())); break;                                       // ASL (zero page)
+                case 0x07: SLO(AM_ZeroPage()); break;                                                           // *SLO (zero page)
+                case 0x08: BusRead(); PHP(); break;                                                             // PHP (implied)
+                case 0x09: A = OrR(A, AM_Immediate()); break;                                                   // ORA (immediate)
+                case 0x0a: BusRead(); A = ASL(A); break;                                                        // ASL A (implied)
+                case 0x0b: ANC(AM_Immediate()); break;                                                          // *ANC (immediate)
+                case 0x0c: AM_Absolute(); break;                                                                // *NOP (absolute)
+                case 0x0d: A = OrR(A, AM_Absolute()); break;                                                    // ORA (absolute)
+                case 0x0e: BusReadModifyWrite(ASL(AM_Absolute())); break;                                       // ASL (absolute)
+                case 0x0f: SLO(AM_Absolute()); break;                                                           // *SLO (absolute)
+
+                case 0x10: Branch(Negative == 0); break;                                                        // BPL (relative)
+                case 0x11: A = OrR(A, AM_IndirectIndexedY()); break;                                            // ORA (indirect indexed Y)
+                case 0x12: break;
+                case 0x13: SLO(AM_IndirectIndexedY()); break;                                                   // *SLO (indirect indexed Y)
+                case 0x14: AM_ZeroPageX(); break;                                                               // *NOP (zero page, X)
+                case 0x15: A = OrR(A, AM_ZeroPageX()); break;                                                   // ORA (zero page, X)
+                case 0x16: BusReadModifyWrite(ASL(AM_ZeroPageX())); break;                                      // ASL (zero page, X)
+                case 0x17: SLO(AM_ZeroPageX()); break;                                                          // *SLO (zero page, X)
+                case 0x18: BusRead(); ClearFlag(ref p, StatusBits.CF); break;                                   // CLC (implied)
+                case 0x19: A = OrR(A, AM_AbsoluteY()); break;                                                   // ORA (absolute, Y)
+                case 0x1a: BusRead(); break;                                                                    // *NOP (implied)
+                case 0x1b: SLO(AM_AbsoluteY()); break;                                                          // *SLO (absolute, Y)
+                case 0x1c: AM_AbsoluteX(); break;                                                               // *NOP (absolute, X)
+                case 0x1d: A = OrR(A, AM_AbsoluteX()); break;                                                   // ORA (absolute, X)
+                case 0x1e: BusReadModifyWrite(ASL(AM_AbsoluteX(PageCrossingBehavior.AlwaysReadTwice))); break;  // ASL (absolute, X)
+                case 0x1f: SLO(AM_AbsoluteX()); break;                                                          // *SLO (absolute, X)
+
+                case 0x20: JSR(); break;                                                                        // JSR (absolute)
+                case 0x21: A = AndR(A, AM_IndexedIndirectX()); break;                                           // AND (indexed indirect X)
+                case 0x22: break;
+                case 0x23: RLA(AM_IndexedIndirectX()); break;                                                   // *RLA (indexed indirect X)
+                case 0x24: BIT(A, AM_ZeroPage()); break;                                                        // BIT (zero page)
+                case 0x25: A = AndR(A, AM_ZeroPage()); break;                                                   // AND (zero page)
+                case 0x26: BusReadModifyWrite(ROL(AM_ZeroPage())); break;                                       // ROL (zero page)
+                case 0x27: RLA(AM_ZeroPage()); break;                                                           // *RLA (zero page)
+                case 0x28: BusRead(); GetBytePaged(1, S); PLP(); break;                                         // PLP (implied)
+                case 0x29: A = AndR(A, AM_Immediate()); break;                                                  // AND (immediate)
+                case 0x2a: BusRead(); A = ROL(A); break;                                                        // ROL A (implied)
+                case 0x2b: ANC(AM_Immediate()); break;                                                          // *ANC (immediate)
+                case 0x2c: BIT(A, AM_Absolute()); break;                                                        // BIT (absolute)
+                case 0x2d: A = AndR(A, AM_Absolute()); break;                                                   // AND (absolute)
+                case 0x2e: BusReadModifyWrite(ROL(AM_Absolute())); break;                                       // ROL (absolute)
+                case 0x2f: RLA(AM_Absolute()); break;                                                           // *RLA (absolute)
+
+                case 0x30: Branch(Negative != 0); break;                                                        // BMI (relative)
+                case 0x31: A = AndR(A, AM_IndirectIndexedY()); break;                                           // AND (indirect indexed Y)
+                case 0x32: break;
+                case 0x33: RLA(AM_IndirectIndexedY()); break;                                                   // *RLA (indirect indexed Y)
+                case 0x34: AM_ZeroPageX(); break;                                                               // *NOP (zero page, X)
+                case 0x35: A = AndR(A, AM_ZeroPageX()); break;                                                  // AND (zero page, X)
+                case 0x36: BusReadModifyWrite(ROL(AM_ZeroPageX())); break;                                      // ROL (zero page, X)
+                case 0x37: RLA(AM_ZeroPageX()); break;                                                          // *RLA (zero page, X)
+                case 0x38: BusRead(); SetFlag(ref p, StatusBits.CF); break;                                     // SEC (implied)
+                case 0x39: A = AndR(A, AM_AbsoluteY()); break;                                                  // AND (absolute, Y)
+                case 0x3a: BusRead(); break;                                                                    // *NOP (implied)
+                case 0x3b: RLA(AM_AbsoluteY()); break;                                                          // *RLA (absolute, Y)
+                case 0x3c: AM_AbsoluteX(); break;                                                               // *NOP (absolute, X)
+                case 0x3d: A = AndR(A, AM_AbsoluteX()); break;                                                  // AND (absolute, X)
+                case 0x3e: BusReadModifyWrite(ROL(AM_AbsoluteX(PageCrossingBehavior.AlwaysReadTwice))); break;  // ROL (absolute, X)
+                case 0x3f: RLA(AM_AbsoluteX()); break;                                                          // *RLA (absolute, X)
+
+                case 0x40: BusRead(); RTI(); break;                                                             // RTI (implied)
+                case 0x41: A = EorR(A, AM_IndexedIndirectX()); break;                                           // EOR (indexed indirect X)
+                case 0x42: break;
+                case 0x43: SRE(AM_IndexedIndirectX()); break;                                                   // *SRE (indexed indirect X)
+                case 0x44: AM_ZeroPage(); break;                                                                // *NOP (zero page)
+                case 0x45: A = EorR(A, AM_ZeroPage()); break;                                                   // EOR (zero page)
+                case 0x46: BusReadModifyWrite(LSR(AM_ZeroPage())); break;                                       // LSR (zero page)
+                case 0x47: SRE(AM_ZeroPage()); break;                                                           // *SRE (zero page)
+                case 0x48: BusRead(); Push(A); break;                                                           // PHA (implied)
+                case 0x49: A = EorR(A, AM_Immediate()); break;                                                  // EOR (immediate)
+                case 0x4a: BusRead(); A = LSR(A); break;                                                        // LSR A (implied)
+                case 0x4b: ASR(AM_Immediate()); break;                                                          // *ASR (immediate)
+                case 0x4c: Jump(Address_Absolute()); break;                                                     // JMP (absolute)
+                case 0x4d: A = EorR(A, AM_Absolute()); break;                                                   // EOR (absolute)
+                case 0x4e: BusReadModifyWrite(LSR(AM_Absolute())); break;                                       // LSR (absolute)
+                case 0x4f: SRE(AM_Absolute()); break;                                                           // *SRE (absolute)
+
+                case 0x50: Branch(Overflow == 0); break;                                                        // BVC (relative)
+                case 0x51: A = EorR(A, AM_IndirectIndexedY()); break;                                           // EOR (indirect indexed Y)
+                case 0x52: break;
+                case 0x53: SRE(AM_IndirectIndexedY()); break;                                                   // *SRE (indirect indexed Y)
+                case 0x54: AM_ZeroPageX(); break;                                                               // *NOP (zero page, X)
+                case 0x55: A = EorR(A, AM_ZeroPageX()); break;                                                  // EOR (zero page, X)
+                case 0x56: BusReadModifyWrite(LSR(AM_ZeroPageX())); break;                                      // LSR (zero page, X)
+                case 0x57: SRE(AM_ZeroPageX()); break;                                                          // *SRE (zero page, X)
+                case 0x58: BusRead(); ClearFlag(ref p, StatusBits.IF); break;                                   // CLI (implied)
+                case 0x59: A = EorR(A, AM_AbsoluteY()); break;                                                  // EOR (absolute, Y)
+                case 0x5a: BusRead(); break;                                                                    // *NOP (implied)
+                case 0x5b: SRE(AM_AbsoluteY()); break;                                                          // *SRE (absolute, Y)
+                case 0x5c: AM_AbsoluteX(); break;                                                               // *NOP (absolute, X)
+                case 0x5d: A = EorR(A, AM_AbsoluteX()); break;                                                  // EOR (absolute, X)
+                case 0x5e: BusReadModifyWrite(LSR(AM_AbsoluteX(PageCrossingBehavior.AlwaysReadTwice))); break;  // LSR (absolute, X)
+                case 0x5f: SRE(AM_AbsoluteX()); break;                                                          // *SRE (absolute, X)
+
+                case 0x60: BusRead(); RTS(); break;                                                             // RTS (implied)
+                case 0x61: A = ADC(A, AM_IndexedIndirectX()); break;                                            // ADC (indexed indirect X)
+                case 0x62: break;
+                case 0x63: RRA(AM_IndexedIndirectX()); break;                                                   // *RRA (indexed indirect X)
+                case 0x64: AM_ZeroPage(); break;                                                                // *NOP (zero page)
+                case 0x65: A = ADC(A, AM_ZeroPage()); break;                                                    // ADC (zero page)
+                case 0x66: BusReadModifyWrite(ROR(AM_ZeroPage())); break;                                       // ROR (zero page)
+                case 0x67: RRA(AM_ZeroPage()); break;                                                           // *RRA (zero page)
+                case 0x68: BusRead(); GetBytePaged(1, S); A = Through(Pop()); break;                            // PLA (implied)
+                case 0x69: A = ADC(A, AM_Immediate()); break;                                                   // ADC (immediate)
+                case 0x6a: BusRead(); A = ROR(A); break;                                                        // ROR A (implied)
+                case 0x6b: ARR(AM_Immediate()); break;                                                          // *ARR (immediate)
+                case 0x6c: Jump(Address_Indirect()); break;                                                     // JMP (indirect)
+                case 0x6d: A = ADC(A, AM_Absolute()); break;                                                    // ADC (absolute)
+                case 0x6e: BusReadModifyWrite(ROR(AM_Absolute())); break;                                       // ROR (absolute)
+                case 0x6f: RRA(AM_Absolute()); break;                                                           // *RRA (absolute)
+
+                case 0x70: Branch(Overflow != 0); break;                                                        // BVS (relative)
+                case 0x71: A = ADC(A, AM_IndirectIndexedY()); break;                                            // ADC (indirect indexed Y)
+                case 0x72: break;
+                case 0x73: RRA(AM_IndirectIndexedY()); break;                                                   // *RRA (indirect indexed Y)
+                case 0x74: AM_ZeroPageX(); break;                                                               // *NOP (zero page, X)
+                case 0x75: A = ADC(A, AM_ZeroPageX()); break;                                                   // ADC (zero page, X)
+                case 0x76: BusReadModifyWrite(ROR(AM_ZeroPageX())); break;                                      // ROR (zero page, X)
+                case 0x77: RRA(AM_ZeroPageX()); break;                                                          // *RRA (zero page, X)
+                case 0x78: BusRead(); SetFlag(ref p, StatusBits.IF); break;                                     // SEI (implied)
+                case 0x79: A = ADC(A, AM_AbsoluteY()); break;                                                   // ADC (absolute, Y)
+                case 0x7a: BusRead(); break;                                                                    // *NOP (implied)
+                case 0x7b: RRA(AM_AbsoluteY()); break;                                                          // *RRA (absolute, Y)
+                case 0x7c: AM_AbsoluteX(); break;                                                               // *NOP (absolute, X)
+                case 0x7d: A = ADC(A, AM_AbsoluteX()); break;                                                   // ADC (absolute, X)
+                case 0x7e: BusReadModifyWrite(ROR(AM_AbsoluteX(PageCrossingBehavior.AlwaysReadTwice))); break;  // ROR (absolute, X)
+                case 0x7f: RRA(AM_AbsoluteX()); break;                                                          // *RRA (absolute, X)
+
+                case 0x80: AM_Immediate(); break;                                                               // *NOP (immediate)
+                case 0x81: BusWrite(Address_IndexedIndirectX(), A); break;                                      // STA (indexed indirect X)
+                case 0x82: AM_Immediate(); break;                                                               // *NOP (immediate)
+                case 0x83: BusWrite(Address_IndexedIndirectX(), (byte)(A & X)); break;                          // *SAX (indexed indirect X)
+                case 0x84: BusWrite(Address_ZeroPage(), Y); break;                                              // STY (zero page)
+                case 0x85: BusWrite(Address_ZeroPage(), A); break;                                              // STA (zero page)
+                case 0x86: BusWrite(Address_ZeroPage(), X); break;                                              // STX (zero page)
+                case 0x87: BusWrite(Address_ZeroPage(), (byte)(A & X)); break;                                  // *SAX (zero page)
+                case 0x88: BusRead(); Y = DEC(Y); break;                                                        // DEY (implied)
+                case 0x89: AM_Immediate(); break;                                                               // *NOP (immediate)
+                case 0x8a: BusRead(); A = Through(X); break;                                                    // TXA (implied)
+                case 0x8b: break;
+                case 0x8c: BusWrite(Address_Absolute(), Y); break;                                              // STY (absolute)
+                case 0x8d: BusWrite(Address_Absolute(), A); break;                                              // STA (absolute)
+                case 0x8e: BusWrite(Address_Absolute(), X); break;                                              // STX (absolute)
+                case 0x8f: BusWrite(Address_Absolute(), (byte)(A & X)); break;                                  // *SAX (absolute)
+
+                case 0x90: Branch(Carry == 0); break;                                                           // BCC (relative)
+                case 0x91: AM_IndirectIndexedY(); BusWrite(A); break;                                           // STA (indirect indexed Y)
+                case 0x92: break;
+                case 0x93: break;
+                case 0x94: BusWrite(Address_ZeroPageX(), Y); break;                                             // STY (zero page, X)
+                case 0x95: BusWrite(Address_ZeroPageX(), A); break;                                             // STA (zero page, X)
+                case 0x96: BusWrite(Address_ZeroPageY(), X); break;                                             // STX (zero page, Y)
+                case 0x97: BusWrite(Address_ZeroPageY(), (byte)(A & X)); break;                                 // *SAX (zero page, Y)
+                case 0x98: BusRead(); A = Through(Y); break;                                                    // TYA (implied)
+                case 0x99: STA_AbsoluteY(); break;                                                              // STA (absolute, Y)
+                case 0x9a: BusRead(); S = X; break;                                                             // TXS (implied)
+                case 0x9b: break;
+                case 0x9c: break;
+                case 0x9d: STA_AbsoluteX(); break;                                                              // STA (absolute, X)
+                case 0x9e: break;
+                case 0x9f: break;
+
+                case 0xa0: Y = Through(AM_Immediate()); break;                                                  // LDY (immediate)
+                case 0xa1: A = Through(AM_IndexedIndirectX()); break;                                           // LDA (indexed indirect X)
+                case 0xa2: X = Through(AM_Immediate()); break;                                                  // LDX (immediate)
+                case 0xa3: A = X = Through(AM_IndexedIndirectX()); break;                                       // *LAX (indexed indirect X)
+                case 0xa4: Y = Through(AM_ZeroPage()); break;                                                   // LDY (zero page)
+                case 0xa5: A = Through(AM_ZeroPage()); break;                                                   // LDA (zero page)
+                case 0xa6: X = Through(AM_ZeroPage()); break;                                                   // LDX (zero page)
+                case 0xa7: A = X = Through(AM_ZeroPage()); break;                                               // *LAX (zero page)
+                case 0xa8: BusRead(); Y = Through(A); break;                                                    // TAY (implied)
+                case 0xa9: A = Through(AM_Immediate()); break;                                                  // LDA (immediate)
+                case 0xaa: BusRead(); X = Through(A); break;                                                    // TAX (implied)
+                case 0xab: A = X = Through(AM_Immediate()); break;                                              // *ATX (immediate)
+                case 0xac: Y = Through(AM_Absolute()); break;                                                   // LDY (absolute)
+                case 0xad: A = Through(AM_Absolute()); break;                                                   // LDA (absolute)
+                case 0xae: X = Through(AM_Absolute()); break;                                                   // LDX (absolute)
+                case 0xaf: A = X = Through(AM_Absolute()); break;                                               // *LAX (absolute)
+
+                case 0xb0: Branch(Carry != 0); break;                                                           // BCS (relative)
+                case 0xb1: A = Through(AM_IndirectIndexedY()); break;                                           // LDA (indirect indexed Y)
+                case 0xb2: break;
+                case 0xb3: A = X = Through(AM_IndirectIndexedY()); break;                                       // *LAX (indirect indexed Y)
+                case 0xb4: Y = Through(AM_ZeroPageX()); break;                                                  // LDY (zero page, X)
+                case 0xb5: A = Through(AM_ZeroPageX()); break;                                                  // LDA (zero page, X)
+                case 0xb6: X = Through(AM_ZeroPageY()); break;                                                  // LDX (zero page, Y)
+                case 0xb7: A = X = Through(AM_ZeroPageY()); break;                                              // *LAX (zero page, Y)
+                case 0xb8: BusRead(); ClearFlag(ref p, StatusBits.VF); break;                                   // CLV (implied)
+                case 0xb9: A = Through(AM_AbsoluteY()); break;                                                  // LDA (absolute, Y)
+                case 0xba: BusRead(); X = Through(S); break;                                                    // TSX (implied)
+                case 0xbb: break;
+                case 0xbc: Y = Through(AM_AbsoluteX()); break;                                                  // LDY (absolute, X)
+                case 0xbd: A = Through(AM_AbsoluteX()); break;                                                  // LDA (absolute, X)
+                case 0xbe: X = Through(AM_AbsoluteY()); break;                                                  // LDX (absolute, Y)
+                case 0xbf: A = X = Through(AM_AbsoluteY()); break;                                              // *LAX (absolute, Y)
+
+                case 0xc0: CMP(Y, AM_Immediate()); break;                                                       // CPY (immediate)
+                case 0xc1: CMP(A, AM_IndexedIndirectX()); break;                                                // CMP (indexed indirect X)
+                case 0xc2: AM_Immediate(); break;                                                               // *NOP (immediate)
+                case 0xc3: DCP(AM_IndexedIndirectX()); break;                                                   // *DCP (indexed indirect X)
+                case 0xc4: CMP(Y, AM_ZeroPage()); break;                                                        // CPY (zero page)
+                case 0xc5: CMP(A, AM_ZeroPage()); break;                                                        // CMP (zero page)
+                case 0xc6: BusReadModifyWrite(DEC(AM_ZeroPage())); break;                                       // DEC (zero page)
+                case 0xc7: DCP(AM_ZeroPage()); break;                                                           // *DCP (zero page)
+                case 0xc8: BusRead(); Y = INC(Y); break;                                                        // INY (implied)
+                case 0xc9: CMP(A, AM_Immediate()); break;                                                       // CMP (immediate)
+                case 0xca: BusRead(); X = DEC(X); break;                                                        // DEX (implied)
+                case 0xcb: AXS(AM_Immediate()); break;                                                          // *AXS (immediate)
+                case 0xcc: CMP(Y, AM_Absolute()); break;                                                        // CPY (absolute)
+                case 0xcd: CMP(A, AM_Absolute()); break;                                                        // CMP (absolute)
+                case 0xce: BusReadModifyWrite(DEC(AM_Absolute())); break;                                       // DEC (absolute)
+                case 0xcf: DCP(AM_Absolute()); break;                                                           // *DCP (absolute)
+
+                case 0xd0: Branch(Zero == 0); break;                                                            // BNE (relative)
+                case 0xd1: CMP(A, AM_IndirectIndexedY()); break;                                                // CMP (indirect indexed Y)
+                case 0xd2: break;
+                case 0xd3: DCP(AM_IndirectIndexedY()); break;                                                   // *DCP (indirect indexed Y)
+                case 0xd4: AM_ZeroPageX(); break;                                                               // *NOP (zero page, X)
+                case 0xd5: CMP(A, AM_ZeroPageX()); break;                                                       // CMP (zero page, X)
+                case 0xd6: BusReadModifyWrite(DEC(AM_ZeroPageX())); break;                                      // DEC (zero page, X)
+                case 0xd7: DCP(AM_ZeroPageX()); break;                                                          // *DCP (zero page, X)
+                case 0xd8: BusRead(); ClearFlag(ref p, StatusBits.DF); break;                                   // CLD (implied)
+                case 0xd9: CMP(A, AM_AbsoluteY()); break;                                                       // CMP (absolute, Y)
+                case 0xda: BusRead(); break;                                                                    // *NOP (implied)
+                case 0xdb: DCP(AM_AbsoluteY()); break;                                                          // *DCP (absolute, Y)
+                case 0xdc: AM_AbsoluteX(); break;                                                               // *NOP (absolute, X)
+                case 0xdd: CMP(A, AM_AbsoluteX()); break;                                                       // CMP (absolute, X)
+                case 0xde: BusReadModifyWrite(DEC(AM_AbsoluteX(PageCrossingBehavior.AlwaysReadTwice))); break;  // DEC (absolute, X)
+                case 0xdf: DCP(AM_AbsoluteX()); break;                                                          // *DCP (absolute, X)
+
+                case 0xe0: CMP(X, AM_Immediate()); break;                                                       // CPX (immediate)
+                case 0xe1: A = SBC(A, AM_IndexedIndirectX()); break;                                            // SBC (indexed indirect X)
+                case 0xe2: AM_Immediate(); break;                                                               // *NOP (immediate)
+                case 0xe3: ISB(AM_IndexedIndirectX()); break;                                                   // *ISB (indexed indirect X)
+                case 0xe4: CMP(X, AM_ZeroPage()); break;                                                        // CPX (zero page)
+                case 0xe5: A = SBC(A, AM_ZeroPage()); break;                                                    // SBC (zero page)
+                case 0xe6: BusReadModifyWrite(INC(AM_ZeroPage())); break;                                       // INC (zero page)
+                case 0xe7: ISB(AM_ZeroPage()); break;                                                           // *ISB (zero page)
+                case 0xe8: BusRead(); X = INC(X); break;                                                        // INX (implied)
+                case 0xe9: A = SBC(A, AM_Immediate()); break;                                                   // SBC (immediate)
+                case 0xea: BusRead(); break;                                                                    // NOP (implied)
+                case 0xeb: A = SBC(A, AM_Immediate()); break;                                                   // *SBC (immediate)
+                case 0xec: CMP(X, AM_Absolute()); break;                                                        // CPX (absolute)
+                case 0xed: A = SBC(A, AM_Absolute()); break;                                                    // SBC (absolute)
+                case 0xee: BusReadModifyWrite(INC(AM_Absolute())); break;                                       // *ISB (absolute)
+
+                case 0xf0: Branch(Zero != 0); break;                                                            // BEQ (relative)
+                case 0xf1: A = SBC(A, AM_IndirectIndexedY()); break;                                            // SBC (indirect indexed Y)
+                case 0xf2: break;
+                case 0xf3: ISB(AM_IndirectIndexedY()); break;                                                   // *ISB (indirect indexed Y)
+                case 0xf4: AM_ZeroPageX(); break;                                                               // *NOP (zero page, X)
+                case 0xf5: A = SBC(A, AM_ZeroPageX()); break;                                                   // SBC (zero page, X)
+                case 0xf6: BusReadModifyWrite(INC(AM_ZeroPageX())); break;                                      // INC (zero page, X)
+                case 0xf7: ISB(AM_ZeroPageX()); break;                                                          // *ISB (zero page, X)
+                case 0xf8: BusRead(); SetFlag(ref p, StatusBits.DF); break;                                     // SED (implied)
+                case 0xf9: A = SBC(A, AM_AbsoluteY()); break;                                                   // SBC (absolute, Y)
+                case 0xfa: BusRead(); break;                                                                    // *NOP (implied)
+                case 0xfb: ISB(AM_AbsoluteY()); break;                                                          // *ISB (absolute, Y)
+                case 0xfc: AM_AbsoluteX(); break;                                                               // *NOP (absolute, X)
+                case 0xfd: A = SBC(A, AM_AbsoluteX()); break;                                                   // SBC (absolute, X)
+                case 0xfe: BusReadModifyWrite(INC(AM_AbsoluteX(PageCrossingBehavior.AlwaysReadTwice))); break;  // INC (absolute, X)
+                case 0xff: ISB(AM_AbsoluteX()); break;                                                          // *ISB (absolute, X)
+            }
+
+            return Cycles;
+        }
+
+        public override int Step()
+        {
+            ResetCycles();
+            OnExecutingInstruction();
+            if (Powered)
+            {
+                Tick();
+                if (SO().Lowered())
+                    HandleSO();
+                if (RDY().Raised())
+                {
+                    LowerSYNC();    // Instruction fetch beginning
+                    OpCode = Bus.Read(PC++);  // can't use fetchByte
+                    if (RESET().Lowered())
+                        HandleRESET();
+                    else if (NMI().Lowered())
+                        HandleNMI();
+                    else if (INT().Lowered() && (InterruptMasked == 0))
+                        HandleINT();
+                    Execute();
+                }
+            }
+            OnExecutedInstruction();
+            return Cycles;
+        }
+
+        protected override byte Pop() => GetBytePaged(1, ++S);
+
+        protected override void Push(byte value) => SetBytePaged(1, S--, value);
+
+        protected override sealed void HandleRESET()
+        {
+            RaiseRESET();
+            handlingRESET = true;
+            OpCode = 0x00;	// BRK
+        }
+
+        protected override sealed void HandleINT()
+        {
+            RaiseINT();
+            handlingINT = true;
+            OpCode = 0x00;	// BRK
+        }
+
+        private void HandleNMI()
+        {
+            RaiseNMI();
+            handlingNMI = true;
+            OpCode = 0x00;	// BRK
+        }
+
+        private void HandleSO()
+        {
+            RaiseSO();
+            P |= (byte)StatusBits.VF;
+        }
+
+        private void Interrupt()
+        {
+            var reset = handlingRESET;
+            var nmi = handlingNMI;
+            var irq = handlingINT;
+            var hardware = nmi || irq || reset;
+            var software = !hardware;
+            if (reset)
+            {
+                DummyPush(PC.High);
+                DummyPush(PC.Low);
+                DummyPush(P);
+            }
+            else
+            {
+                PushWord(PC);
+                Push((byte)(P | (int)(software ? StatusBits.BF : 0)));
+            }
+            SetFlag(ref p, StatusBits.IF);   // Disable IRQ
+            var vector = reset ? RSTvector : (nmi ? NMIvector : IRQvector);
+            Jump(GetWordPaged(0xff, vector));
+            handlingRESET = handlingNMI = handlingINT = false;
+        }
+
+        private void DummyPush(byte value)
+        {
+            Tick();
+            Bus.Data = value;
+            Bus.Address.Low = S--;
+            Bus.Address.High = 1;
+        }
+
+        // Addressing modes
+
+        private Register16 Address_Absolute() => FetchWord();
+
+        private byte Address_ZeroPage() => FetchByte();
+
+        private Register16 Address_ZeroPageIndirect() => GetWordPaged(0, Address_ZeroPage());
+
+        private Register16 Address_Indirect()
+        {
+            var address = Address_Absolute();
+            return GetWordPaged(address.High, address.Low);
+        }
+
+        private byte Address_ZeroPageX()
+        {
+            var address = Address_ZeroPage();
+            BusRead(address);
+            return (byte)LowByte(address + X);
+        }
+
+        private byte Address_ZeroPageY()
+        {
+            var address = Address_ZeroPage();
+            BusRead(address);
+            return (byte)LowByte(address + Y);
+        }
+
+        private Tuple<Register16, byte> Address_AbsoluteX()
+        {
+            var address = Address_Absolute();
+            var page = address.High;
+            address.Word += X;
+            return new Tuple<Register16, byte>(address, page);
+        }
+
+        private Tuple<Register16, byte> Address_AbsoluteY()
+        {
+            var address = Address_Absolute();
+            var page = address.High;
+            address.Word += Y;
+            return new Tuple<Register16, byte>(address, page);
+        }
+
+        private Register16 Address_IndexedIndirectX() => GetWordPaged(0, Address_ZeroPageX());
+
+        private Tuple<Register16, byte> Address_IndirectIndexedY()
+        {
+            var address = Address_ZeroPageIndirect();
+            var page = address.High;
+            address.Word += Y;
+            return new Tuple<Register16, byte>(address, page);
+        }
+
+        private Register16 Address_relative_byte()
+        {
+            intermediate.Word = (ushort)(PC + (byte)FetchByte());
+            return intermediate;
+        }
+
+        //
+
+        private byte AM_Immediate() => FetchByte();
+
+        private byte AM_Absolute() => BusRead(Address_Absolute());
+
+        private byte AM_ZeroPage() => BusRead(Address_ZeroPage());
+
+        private byte AM_AbsoluteX(PageCrossingBehavior behaviour = PageCrossingBehavior.MaybeReadTwice)
+        {
+            var crossed = Address_AbsoluteX();
+            var address = crossed.Item1;
+            var page = crossed.Item2;
+            var possible = GetBytePaged(page, address.Low);
+        	if ((behaviour == PageCrossingBehavior.AlwaysReadTwice) || (page != address.High))
+		        possible = BusRead(address);
+	        return possible;
+        }
+
+        private byte AM_AbsoluteY()
+        {
+            var crossed = Address_AbsoluteY();
+            var address = crossed.Item1;
+            var page = crossed.Item2;
+            var possible = GetBytePaged(page, address.Low);
+            if (page != address.High)
+                possible = BusRead(address);
+            return possible;
+        }
+
+        private byte AM_ZeroPageX() => BusRead(Address_ZeroPageX());
+
+        private byte AM_ZeroPageY() => BusRead(Address_ZeroPageY());
+
+        private byte AM_IndexedIndirectX() => BusRead(Address_IndexedIndirectX());
+
+        private byte AM_IndirectIndexedY()
+        {
+            var crossed = Address_IndirectIndexedY();
+            var address = crossed.Item1;
+            var page = crossed.Item2;
+            var possible = GetBytePaged(page, address.Low);
+            if (page != address.High)
+                possible = BusRead(address);
+            return possible;
+        }
+
+        // Flag adjustment
+
+        public static void SetFlag(ref byte f, StatusBits flag) => SetFlag(ref f, (byte)flag);
+        private static void SetFlag(ref byte f, StatusBits flag, int condition) => SetFlag(ref f, (byte)flag, condition);
+        private static void SetFlag(ref byte f, StatusBits flag, bool condition) => SetFlag(ref f, (byte)flag, condition);
+        public static void ClearFlag(ref byte f, StatusBits flag) => ClearFlag(ref f, (byte)flag);
+        private static void ClearFlag(ref byte f, StatusBits flag, int condition) => ClearFlag(ref f, (byte)flag, condition);
+        private static void ClearFlag(ref byte f, StatusBits flag, bool condition) => ClearFlag(ref f, (byte)flag, condition);
+
+        private void AdjustZero(byte datum) => ClearFlag(ref p, StatusBits.ZF, datum);
+        private void AdjustNegative(byte datum) => SetFlag(ref p, StatusBits.NF, datum & (byte)StatusBits.NF);
+
+        private void AdjustNZ(byte datum)
+        {
+            AdjustZero(datum);
+            AdjustNegative(datum);
+        }
+
+        // Miscellaneous
+
+        private void Branch(bool condition)
+        {
+            var destination = Address_relative_byte();
+            if (condition) {
+                BusRead();
+                var page = PC.High;
+                Jump(destination);
+                if (PC.High != page)
+                    BusRead(PC.Low, page);
+            }
+        }
+
+        private byte Through(int data) => Through((byte)data);
+
+        private byte Through(byte data)
+        {
+            AdjustNZ(data);
+			return data;
+		}
+
+        private void BusReadModifyWrite(byte data)
+        {
+            // The read will have already taken place...
+            BusWrite();
+            BusWrite(data);
+        }
+
+        //
+
+        private byte SBC(byte operand, byte data)
+        {
+            var returned = SUB(operand, data, ~P & (int)StatusBits.CF);
+
+            var difference = intermediate;
+            AdjustNZ(difference.Low);
+            SetFlag(ref p, StatusBits.VF, (operand ^ data) & (operand ^ difference.Low) & (int)StatusBits.NF);
+        	ClearFlag(ref p, StatusBits.CF, difference.High);
+
+        	return returned;
+        }
+
+        private byte SUB(byte operand, byte data, int borrow = 0)
+        {
+            return Decimal != 0 ? SUB_d(operand, data, borrow) : SUB_b(operand, data, borrow);
+        }
+
+        private byte SUB_b(byte operand, byte data, int borrow)
+        {
+            intermediate.Word = (ushort)(operand - data - borrow);
+            return intermediate.Low;
+        }
+
+        private byte SUB_d(byte operand, byte data, int borrow)
+        {
+            intermediate.Word = (ushort)(operand - data - borrow);
+
+            byte low = (byte)(LowNibble(operand) - LowNibble(data) - borrow);
+            var lowNegative = low & (byte)StatusBits.NF;
+            if (lowNegative != 0)
+                low -= 6;
+
+            byte high = (byte)(HighNibble(operand) - HighNibble(data) - (lowNegative >> 7));
+            var highNegative = high & (byte)StatusBits.NF;
+            if (highNegative != 0)
+                high -= 6;
+
+            return (byte)(PromoteNibble(high) | LowNibble(low));
+        }
+
+        private byte ADC(byte operand, byte data)
+        {
+            var returned = ADD(operand, data, Carry);
+            AdjustNZ(intermediate.Low);
+            return returned;
+        }
+
+        private byte ADD(byte operand, byte data, int carry = 0)
+        {
+            return Decimal != 0 ? ADD_d(operand, data, carry) : ADD_b(operand, data, carry);
+        }
+
+        private byte ADD_b(byte operand, byte data, int carry)
+        {
+            intermediate.Word = (ushort)(operand + data + carry);
+
+            SetFlag(ref p, StatusBits.VF, ~(operand ^ data) & (operand ^ intermediate.Low) & (int)StatusBits.NF);
+            SetFlag(ref p, StatusBits.CF, intermediate.High & (int)StatusBits.CF);
+
+            return intermediate.Low;
+        }
+
+        private byte ADD_d(byte operand, byte data, int carry)
+        {
+            intermediate.Word = (ushort)(operand + data + carry);
+
+            byte low = (byte)(LowNibble(operand) + LowNibble(data) + carry);
+            if (low > 9)
+                low += 6;
+
+            byte high = (byte)(HighNibble(operand) + HighNibble(data) + (low > 0xf ? 1 : 0));
+            SetFlag(ref p, StatusBits.VF, ~(operand ^ data) & (operand ^ PromoteNibble(high)) & (int)StatusBits.NF);
+
+            if (high > 9)
+                high += 6;
+
+            SetFlag(ref p, StatusBits.CF, high > 0xf);
+
+            return (byte)(PromoteNibble(high) | LowNibble(low));
+        }
+
+        private byte AndR(byte operand, byte data) => Through(operand & data);
+
+        private byte ASL(byte value)
+        {
+            SetFlag(ref p, StatusBits.CF, value & (byte)Bits.Bit7);
+            return Through(value << 1);
+        }
+
+        private void BIT(byte operand, byte data)
+        {
+            SetFlag(ref p, StatusBits.VF, data & (byte)StatusBits.VF);
+            AdjustZero((byte)(operand & data));
+            AdjustNegative(data);
+        }
+
+        private void CMP(byte first, byte second)
+        {
+            intermediate.Word = (ushort)(first - second);
+            AdjustNZ(intermediate.Low);
+            ClearFlag(ref p, StatusBits.CF, intermediate.High);
+        }
+
+        private byte DEC(byte value) => Through(value - 1);
+
+        byte EorR(byte operand, byte data) => Through(operand ^ data);
+
+        private byte INC(byte value) => Through(value + 1);
+
+        private void JSR()
+        {
+            var low = FetchByte();
+            GetBytePaged(1, S); // dummy read
+            PushWord(PC);
+            PC.High = FetchByte();
+            PC.Low = low;
+        }
+
+        private byte LSR(byte value)
+        {
+            SetFlag(ref p, StatusBits.CF, value & (byte)Bits.Bit0);
+            return Through(value >> 1);
+        }
+
+        private byte OrR(byte operand, byte data) => Through(operand | data);
+
+        private void PHP() => Push((byte)(P | (byte)StatusBits.BF));
+
+        private void PLP() => P = (byte)((Pop() | (byte)StatusBits.RF) & (byte)~StatusBits.BF);
+
+        private byte ROL(byte operand)
+        {
+            var carryIn = Carry;
+            SetFlag(ref p, StatusBits.CF, operand & (byte)Bits.Bit7);
+            var result = (operand << 1) | carryIn;
+            return Through(result);
+        }
+
+        private byte ROR(byte operand)
+        {
+            var carryIn = Carry;
+            SetFlag(ref p, StatusBits.CF, operand & (byte)Bits.Bit0);
+            var result = (operand >> 1) | (carryIn << 7);
+            return Through(result);
+        }
+
+        private void RTI()
+        {
+            GetBytePaged(1, S); // dummy read
+            PLP();
+            Return();
+        }
+
+        private void RTS()
+        {
+            GetBytePaged(1, S); // dummy read
+            Return();
+            FetchByte();
+        }
+
+        // Undocumented compound instructions
+
+        private void ANC(byte value)
+        {
+            A = AndR(A, value);
+            SetFlag(ref p, StatusBits.CF, A & (byte)Bits.Bit7);
+        }
+
+        private void ARR(byte value)
+        {
+            A = AndR(A, value);
+            A = ROR(A);
+            SetFlag(ref p, StatusBits.CF, A & (byte)Bits.Bit6);
+            SetFlag(ref p, StatusBits.VF, ((A & (byte)Bits.Bit6) >> 6) ^ ((A & (byte)Bits.Bit5) >> 5));
+        }
+
+        private void ASR(byte value)
+        {
+            A = AndR(A, value);
+            A = LSR(A);
+        }
+
+        private void AXS(byte value)
+        {
+            X = Through(SUB((byte)(A & X), value));
+            ClearFlag(ref p, StatusBits.CF, intermediate.High);
+        }
+
+        private void DCP(byte value)
+        {
+            BusReadModifyWrite(DEC(value));
+            CMP(A, Bus.Data);
+        }
+
+        private void ISB(byte value)
+        {
+            BusReadModifyWrite(INC(value));
+            A = SBC(A, Bus.Data);
+        }
+
+        private void RLA(byte value)
+        {
+            BusReadModifyWrite(ROL(value));
+            A = AndR(A, Bus.Data);
+        }
+
+        private void RRA(byte value)
+        {
+            BusReadModifyWrite(ROR(value));
+            A = ADC(A, Bus.Data);
+        }
+
+        private void SLO(byte value)
+        {
+            BusReadModifyWrite(ASL(value));
+            A = OrR(A, Bus.Data);
+        }
+
+        private void SRE(byte value)
+        {
+            BusReadModifyWrite(LSR(value));
+            A = EorR(A, Bus.Data);
+        }
+
+        //
+
+        private void STA_AbsoluteX()
+        {
+            var crossed = Address_AbsoluteX();
+            var address = crossed.Item1;
+            var page = crossed.Item2;
+            GetBytePaged(page, address.Low);
+            BusWrite(address, A);
+        }
+
+        private void STA_AbsoluteY()
+        {
+            var crossed = Address_AbsoluteY();
+            var address = crossed.Item1;
+            var page = crossed.Item2;
+            GetBytePaged(page, address.Low);
+            BusWrite(address, A);
+        }
+    }
+}

M6502/M6502.csproj

@@ -0,0 +1,60 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project ToolsVersion="15.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <Import Project="$(MSBuildExtensionsPath)\$(MSBuildToolsVersion)\Microsoft.Common.props" Condition="Exists('$(MSBuildExtensionsPath)\$(MSBuildToolsVersion)\Microsoft.Common.props')" />
+  <PropertyGroup>
+    <Configuration Condition=" '$(Configuration)' == '' ">Debug</Configuration>
+    <Platform Condition=" '$(Platform)' == '' ">AnyCPU</Platform>
+    <ProjectGuid>{3AF29A4F-4294-4A9D-AAC3-D9A48076BD19}</ProjectGuid>
+    <OutputType>Library</OutputType>
+    <AppDesignerFolder>Properties</AppDesignerFolder>
+    <RootNamespace>EightBit</RootNamespace>
+    <AssemblyName>M6502</AssemblyName>
+    <TargetFrameworkVersion>v4.7.2</TargetFrameworkVersion>
+    <FileAlignment>512</FileAlignment>
+    <Deterministic>true</Deterministic>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)|$(Platform)' == 'Debug|AnyCPU' ">
+    <DebugSymbols>true</DebugSymbols>
+    <DebugType>full</DebugType>
+    <Optimize>false</Optimize>
+    <OutputPath>bin\Debug\</OutputPath>
+    <DefineConstants>DEBUG;TRACE</DefineConstants>
+    <ErrorReport>prompt</ErrorReport>
+    <WarningLevel>4</WarningLevel>
+    <LangVersion>latest</LangVersion>
+    <CodeAnalysisRuleSet>AllRules.ruleset</CodeAnalysisRuleSet>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)|$(Platform)' == 'Release|AnyCPU' ">
+    <DebugType>pdbonly</DebugType>
+    <Optimize>true</Optimize>
+    <OutputPath>bin\Release\</OutputPath>
+    <DefineConstants>TRACE</DefineConstants>
+    <ErrorReport>prompt</ErrorReport>
+    <WarningLevel>4</WarningLevel>
+  </PropertyGroup>
+  <ItemGroup>
+    <Reference Include="System" />
+    <Reference Include="System.Core" />
+    <Reference Include="System.Xml.Linq" />
+    <Reference Include="System.Data.DataSetExtensions" />
+    <Reference Include="Microsoft.CSharp" />
+    <Reference Include="System.Data" />
+    <Reference Include="System.Net.Http" />
+    <Reference Include="System.Xml" />
+  </ItemGroup>
+  <ItemGroup>
+    <Compile Include="Disassembly.cs" />
+    <Compile Include="M6502.cs" />
+    <Compile Include="PageCrossingBehavior.cs" />
+    <Compile Include="Properties\AssemblyInfo.cs" />
+    <Compile Include="StatusBits.cs" />
+    <Compile Include="Symbols.cs" />
+  </ItemGroup>
+  <ItemGroup>
+    <ProjectReference Include="..\EightBit\EightBit.csproj">
+      <Project>{6ebf8857-62a3-4ef4-af21-c1844031d7e4}</Project>
+      <Name>EightBit</Name>
+    </ProjectReference>
+  </ItemGroup>
+  <Import Project="$(MSBuildToolsPath)\Microsoft.CSharp.targets" />
+</Project>

M6502/PageCrossingBehavior.cs

@@ -0,0 +1,7 @@
+namespace EightBit
+{
+    public enum PageCrossingBehavior
+    {
+        AlwaysReadTwice, MaybeReadTwice
+    }
+}

M6502/Properties/AssemblyInfo.cs

@@ -0,0 +1,36 @@
+using System.Reflection;
+using System.Runtime.CompilerServices;
+using System.Runtime.InteropServices;
+
+// General Information about an assembly is controlled through the following
+// set of attributes. Change these attribute values to modify the information
+// associated with an assembly.
+[assembly: AssemblyTitle("M6502")]
+[assembly: AssemblyDescription("")]
+[assembly: AssemblyConfiguration("")]
+[assembly: AssemblyCompany("")]
+[assembly: AssemblyProduct("M6502")]
+[assembly: AssemblyCopyright("Copyright ©  2019")]
+[assembly: AssemblyTrademark("")]
+[assembly: AssemblyCulture("")]
+
+// Setting ComVisible to false makes the types in this assembly not visible
+// to COM components.  If you need to access a type in this assembly from
+// COM, set the ComVisible attribute to true on that type.
+[assembly: ComVisible(false)]
+
+// The following GUID is for the ID of the typelib if this project is exposed to COM
+[assembly: Guid("3af29a4f-4294-4a9d-aac3-d9a48076bd19")]
+
+// Version information for an assembly consists of the following four values:
+//
+//      Major Version
+//      Minor Version
+//      Build Number
+//      Revision
+//
+// You can specify all the values or you can default the Build and Revision Numbers
+// by using the '*' as shown below:
+// [assembly: AssemblyVersion("1.0.*")]
+[assembly: AssemblyVersion("1.0.0.0")]
+[assembly: AssemblyFileVersion("1.0.0.0")]

M6502/StatusBits.cs

@@ -0,0 +1,32 @@
+namespace EightBit
+{
+    using System;
+
+    [Flags]
+    public enum StatusBits : byte
+    {
+        // Negative
+        NF = Bits.Bit7,
+
+        // Overflow
+        VF = Bits.Bit6,
+
+        // reserved
+        RF = Bits.Bit5,
+
+        // Brk
+        BF = Bits.Bit4,
+
+        // D (use BCD for arithmetic)
+        DF = Bits.Bit3,
+
+        // I (IRQ disable)
+        IF = Bits.Bit2,
+
+        // Zero
+        ZF = Bits.Bit1,
+
+        // Carry
+        CF = Bits.Bit0,
+   }
+}

M6502/Symbols.cs

@@ -0,0 +1,107 @@
+namespace EightBit
+{
+    using System;
+    using System.Collections.Generic;
+    using System.IO;
+
+    public class Symbols
+    {
+        private readonly Dictionary<ushort, string> labels;
+        private readonly Dictionary<ushort, string> constants;
+        private readonly Dictionary<string, ushort> scopes;
+        private readonly Dictionary<string, ushort> addresses;
+        private readonly Dictionary<string, Dictionary<string, Dictionary<string, string>>> parsed;
+
+        public Symbols() : this("") { }
+
+        public Symbols(string path)
+        {
+            labels = new Dictionary<ushort, string>();
+            constants = new Dictionary<ushort, string>();
+            scopes = new Dictionary<string, ushort>();
+            addresses = new Dictionary<string, ushort>();
+            parsed = new Dictionary<string, Dictionary<string, Dictionary<string, string>>>();
+
+            if (path.Length > 0)
+            {
+                Parse(path);
+                AssignSymbols();
+                AssignScopes();
+            }
+        }
+
+        public Dictionary<ushort, string> Labels => labels;
+        public Dictionary<ushort, string> Constants => constants;
+        public Dictionary<string, ushort> Scopes => scopes;
+        public Dictionary<string, ushort> Addresses => addresses;
+
+        private void AssignScopes()
+        {
+            var parsedScopes = parsed["scope"];
+            foreach (var parsedScopeElement in parsedScopes)
+            {
+                var parsedScope = parsedScopeElement.Value;
+                var name = parsedScope["name"];
+                var trimmedName = name.Substring(1, name.Length - 2);
+                var size = parsedScope["size"];
+                scopes[trimmedName] = ushort.Parse(size);
+            }
+        }
+
+        private void AssignSymbols()
+        {
+            var symbols = parsed["sym"];
+            foreach (var symbolElement in symbols)
+            {
+                var symbol = symbolElement.Value;
+                var name = symbol["name"];
+                var trimmedName = name.Substring(1, name.Length - 2);
+                var value = symbol["val"].Substring(2);
+                var number = Convert.ToUInt16(value, 16);
+                var symbolType = symbol["type"];
+                if (symbolType == "lab")
+                {
+                    labels[number] = trimmedName;
+                    addresses[trimmedName] = number;
+                }
+                else if (symbolType == "equ")
+                {
+                    constants[number] = trimmedName;
+                }
+            }
+        }
+
+        private void Parse(string path)
+        {
+            using (var reader = new StreamReader(path))
+            {
+                while (!reader.EndOfStream)
+                {
+                    var line = reader.ReadLine();
+                    var lineElements = line.Split(' ', '\t');
+                    if (lineElements.Length == 2)
+                    {
+                        var type = lineElements[0];
+                        var dataElements = lineElements[1].Split(',');
+                        var data = new Dictionary<string, string>();
+                        foreach (var dataElement in dataElements)
+                        {
+                            var definition = dataElement.Split('=');
+                            if (definition.Length == 2)
+                                data[definition[0]] = definition[1];
+                        }
+
+                        if (data.ContainsKey("id"))
+                        {
+                            if (!parsed.ContainsKey(type))
+                                parsed[type] = new Dictionary<string, Dictionary<string, string>>();
+                            var id = data["id"];
+                            data.Remove("id");
+                            parsed[type][id] = data;
+                        }
+                    }
+                }
+            }
+        }
+    }
+}

Test_M6502/App.config

@@ -0,0 +1,6 @@
+<?xml version="1.0" encoding="utf-8" ?>
+<configuration>
+    <startup> 
+        <supportedRuntime version="v4.0" sku=".NETFramework,Version=v4.7.2" />
+    </startup>
+</configuration>

Test_M6502/Board.cs

@@ -0,0 +1,123 @@
+namespace Test
+{
+    using EightBit;
+    using System.Text;
+
+    internal class Board : Bus
+    {
+        private readonly Configuration configuration;
+        private readonly Ram ram;
+        private readonly M6502 cpu;
+        private readonly Symbols symbols;
+        private readonly Disassembly disassembler;
+
+        private Register16 oldPC;
+        private bool stopped;
+
+        public Board(Configuration configuration)
+        {
+            this.configuration = configuration;
+            this.ram = new Ram(0x10000);
+            this.cpu = new M6502(this);
+            this.symbols = new Symbols();
+            this.disassembler = new Disassembly(this, this.cpu, this.symbols);
+
+            this.oldPC = new Register16((ushort)Mask.Mask16);
+            this.stopped = false;
+        }
+
+        public M6502 CPU { get { return this.cpu; } }
+
+        public override void RaisePOWER()
+        {
+            base.RaisePOWER();
+            CPU.RaisePOWER();
+            CPU.RaiseRESET();
+            CPU.RaiseINT();
+            CPU.RaiseNMI();
+            CPU.RaiseSO();
+            CPU.RaiseRDY();
+        }
+
+        public override void LowerPOWER()
+        {
+            CPU.LowerPOWER();
+            base.LowerPOWER();
+        }
+
+        public override void Initialize()
+        {
+            var programFilename = configuration.Program;
+            var programPath = configuration.RomDirectory + "/" + configuration.Program;
+            var loadAddress = configuration.LoadAddress;
+            ram.Load(programPath, loadAddress.Word);
+
+            if (configuration.DebugMode)
+                CPU.ExecutingInstruction += CPU_ExecutingInstruction;
+
+            CPU.ExecutedInstruction += CPU_ExecutedInstruction;
+
+            Poke(0x00, 0x4c);
+            Poke(0x01, configuration.StartAddress.Low);
+            Poke(0x02, configuration.StartAddress.High);
+        }
+
+        private void CPU_ExecutedInstruction(object sender, System.EventArgs e)
+        {
+            var pc = CPU.PC;
+            if (oldPC != pc)
+            {
+                oldPC = pc;
+            }
+            else
+            {
+                LowerPOWER();
+                var test = Peek(0x0200);
+                System.Console.Out.WriteLine();
+                System.Console.Out.Write("** Test=");
+                System.Console.Out.WriteLine(Disassembly.Dump_ByteValue(test));
+            }
+        }
+
+        private void CPU_ExecutingInstruction(object sender, System.EventArgs e)
+        {
+            var address = CPU.PC;
+            var cell = Peek(address);
+
+            var output = new StringBuilder();
+
+            output.Append("PC=");
+            output.Append(Disassembly.Dump_WordValue(address));
+            output.Append(":");
+
+            output.Append("P=");
+            output.Append(Disassembly.Dump_Flags(CPU.P));
+            output.Append(", ");
+
+            output.Append("A=");
+            output.Append(Disassembly.Dump_ByteValue(CPU.A));
+            output.Append(", ");
+
+            output.Append("X=");
+            output.Append(Disassembly.Dump_ByteValue(CPU.X));
+            output.Append(", ");
+
+            output.Append("Y=");
+            output.Append(Disassembly.Dump_ByteValue(CPU.Y));
+            output.Append(", ");
+
+            output.Append("S=");
+            output.Append(Disassembly.Dump_ByteValue(CPU.S));
+            output.Append("\t");
+
+            output.Append(disassembler.Disassemble(address.Word));
+
+            System.Console.Out.WriteLine(output.ToString());
+        }
+
+        public override MemoryMapping Mapping(Register16 absolute)
+        {
+            return new MemoryMapping(ram, 0x0000, (ushort)Mask.Mask16, AccessLevel.ReadWrite);
+        }
+    }
+}

Test_M6502/Configuration.cs

@@ -0,0 +1,26 @@
+namespace Test
+{
+    using EightBit;
+
+    internal class Configuration
+    {
+        private bool debugMode = false;
+        private readonly Register16 loadAddress = new Register16(0x400);
+        private readonly Register16 startAddress = new Register16(0x400);
+        private readonly string romDirectory = "roms";
+        private readonly string program = "6502_functional_test.bin";
+
+        public Configuration() {}
+
+        public bool DebugMode {
+            get { return debugMode; }
+            set { debugMode = value; }
+        }
+
+        public Register16 LoadAddress { get { return loadAddress; } }
+        public Register16 StartAddress { get { return startAddress; } }
+
+        public string RomDirectory { get { return romDirectory; } }
+        public string Program { get { return program; } }
+    }
+}

Test_M6502/Program.cs

@@ -0,0 +1,15 @@
+namespace Test
+{
+    class Program
+    {
+        static void Main(string[] args)
+        {
+            var configuration = new Configuration();
+
+            configuration.DebugMode = true;
+
+            var harness = new TestHarness(configuration);
+            harness.Run();
+        }
+    }
+}

Test_M6502/Properties/AssemblyInfo.cs

@@ -0,0 +1,36 @@
+using System.Reflection;
+using System.Runtime.CompilerServices;
+using System.Runtime.InteropServices;
+
+// General Information about an assembly is controlled through the following
+// set of attributes. Change these attribute values to modify the information
+// associated with an assembly.
+[assembly: AssemblyTitle("Test_M6502")]
+[assembly: AssemblyDescription("")]
+[assembly: AssemblyConfiguration("")]
+[assembly: AssemblyCompany("")]
+[assembly: AssemblyProduct("Test_M6502")]
+[assembly: AssemblyCopyright("Copyright ©  2019")]
+[assembly: AssemblyTrademark("")]
+[assembly: AssemblyCulture("")]
+
+// Setting ComVisible to false makes the types in this assembly not visible
+// to COM components.  If you need to access a type in this assembly from
+// COM, set the ComVisible attribute to true on that type.
+[assembly: ComVisible(false)]
+
+// The following GUID is for the ID of the typelib if this project is exposed to COM
+[assembly: Guid("854ede2f-b54d-425c-8f68-eda68bdc797e")]
+
+// Version information for an assembly consists of the following four values:
+//
+//      Major Version
+//      Minor Version
+//      Build Number
+//      Revision
+//
+// You can specify all the values or you can default the Build and Revision Numbers
+// by using the '*' as shown below:
+// [assembly: AssemblyVersion("1.0.*")]
+[assembly: AssemblyVersion("1.0.0.0")]
+[assembly: AssemblyFileVersion("1.0.0.0")]

Test_M6502/TestHarness.cs

@@ -0,0 +1,23 @@
+namespace Test
+{
+    internal class TestHarness
+    {
+        private Board board;
+
+        public TestHarness(Configuration configuration)
+        {
+            board = new Board(configuration);
+        }
+
+        public void Run()
+        {
+            board.Initialize();
+            board.RaisePOWER();
+
+            var cpu = board.CPU;
+
+            while (cpu.Powered)
+                cpu.Step();
+        }
+    }
+}

Test_M6502/Test_M6502.csproj

@@ -0,0 +1,67 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project ToolsVersion="15.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <Import Project="$(MSBuildExtensionsPath)\$(MSBuildToolsVersion)\Microsoft.Common.props" Condition="Exists('$(MSBuildExtensionsPath)\$(MSBuildToolsVersion)\Microsoft.Common.props')" />
+  <PropertyGroup>
+    <Configuration Condition=" '$(Configuration)' == '' ">Debug</Configuration>
+    <Platform Condition=" '$(Platform)' == '' ">AnyCPU</Platform>
+    <ProjectGuid>{854EDE2F-B54D-425C-8F68-EDA68BDC797E}</ProjectGuid>
+    <OutputType>Exe</OutputType>
+    <RootNamespace>Test</RootNamespace>
+    <AssemblyName>Test_M6502</AssemblyName>
+    <TargetFrameworkVersion>v4.7.2</TargetFrameworkVersion>
+    <FileAlignment>512</FileAlignment>
+    <AutoGenerateBindingRedirects>true</AutoGenerateBindingRedirects>
+    <Deterministic>true</Deterministic>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)|$(Platform)' == 'Debug|AnyCPU' ">
+    <PlatformTarget>AnyCPU</PlatformTarget>
+    <DebugSymbols>true</DebugSymbols>
+    <DebugType>full</DebugType>
+    <Optimize>false</Optimize>
+    <OutputPath>bin\Debug\</OutputPath>
+    <DefineConstants>DEBUG;TRACE</DefineConstants>
+    <ErrorReport>prompt</ErrorReport>
+    <WarningLevel>4</WarningLevel>
+    <LangVersion>latest</LangVersion>
+  </PropertyGroup>
+  <PropertyGroup Condition=" '$(Configuration)|$(Platform)' == 'Release|AnyCPU' ">
+    <PlatformTarget>AnyCPU</PlatformTarget>
+    <DebugType>pdbonly</DebugType>
+    <Optimize>true</Optimize>
+    <OutputPath>bin\Release\</OutputPath>
+    <DefineConstants>TRACE</DefineConstants>
+    <ErrorReport>prompt</ErrorReport>
+    <WarningLevel>4</WarningLevel>
+  </PropertyGroup>
+  <ItemGroup>
+    <Reference Include="System" />
+    <Reference Include="System.Core" />
+    <Reference Include="System.Xml.Linq" />
+    <Reference Include="System.Data.DataSetExtensions" />
+    <Reference Include="Microsoft.CSharp" />
+    <Reference Include="System.Data" />
+    <Reference Include="System.Net.Http" />
+    <Reference Include="System.Xml" />
+  </ItemGroup>
+  <ItemGroup>
+    <Compile Include="Board.cs" />
+    <Compile Include="Configuration.cs" />
+    <Compile Include="Program.cs" />
+    <Compile Include="Properties\AssemblyInfo.cs" />
+    <Compile Include="TestHarness.cs" />
+  </ItemGroup>
+  <ItemGroup>
+    <None Include="App.config" />
+  </ItemGroup>
+  <ItemGroup>
+    <ProjectReference Include="..\EightBit\EightBit.csproj">
+      <Project>{6ebf8857-62a3-4ef4-af21-c1844031d7e4}</Project>
+      <Name>EightBit</Name>
+    </ProjectReference>
+    <ProjectReference Include="..\M6502\M6502.csproj">
+      <Project>{3af29a4f-4294-4a9d-aac3-d9a48076bd19}</Project>
+      <Name>M6502</Name>
+    </ProjectReference>
+  </ItemGroup>
+  <Import Project="$(MSBuildToolsPath)\Microsoft.CSharp.targets" />
+</Project>

Test_M6502/roms/.gitattributes

@@ -0,0 +1,22 @@
+# Auto detect text files and perform LF normalization
+* text=auto
+
+# Custom for Visual Studio
+*.cs     diff=csharp
+*.sln    merge=union
+*.csproj merge=union
+*.vbproj merge=union
+*.fsproj merge=union
+*.dbproj merge=union
+
+# Standard to msysgit
+*.doc	 diff=astextplain
+*.DOC	 diff=astextplain
+*.docx diff=astextplain
+*.DOCX diff=astextplain
+*.dot  diff=astextplain
+*.DOT  diff=astextplain
+*.pdf  diff=astextplain
+*.PDF	 diff=astextplain
+*.rtf	 diff=astextplain
+*.RTF	 diff=astextplain

Test_M6502/roms/.gitignore

@@ -0,0 +1,215 @@
+#################
+## Eclipse
+#################
+
+*.pydevproject
+.project
+.metadata
+bin/
+tmp/
+*.tmp
+*.bak
+*.swp
+*~.nib
+local.properties
+.classpath
+.settings/
+.loadpath
+
+# External tool builders
+.externalToolBuilders/
+
+# Locally stored "Eclipse launch configurations"
+*.launch
+
+# CDT-specific
+.cproject
+
+# PDT-specific
+.buildpath
+
+
+#################
+## Visual Studio
+#################
+
+## Ignore Visual Studio temporary files, build results, and
+## files generated by popular Visual Studio add-ons.
+
+# User-specific files
+*.suo
+*.user
+*.sln.docstates
+
+# Build results
+
+[Dd]ebug/
+[Rr]elease/
+x64/
+build/
+[Bb]in/
+[Oo]bj/
+
+# MSTest test Results
+[Tt]est[Rr]esult*/
+[Bb]uild[Ll]og.*
+
+*_i.c
+*_p.c
+*.ilk
+*.meta
+*.obj
+*.pch
+*.pdb
+*.pgc
+*.pgd
+*.rsp
+*.sbr
+*.tlb
+*.tli
+*.tlh
+*.tmp
+*.tmp_proj
+*.log
+*.vspscc
+*.vssscc
+.builds
+*.pidb
+*.log
+*.scc
+
+# Visual C++ cache files
+ipch/
+*.aps
+*.ncb
+*.opensdf
+*.sdf
+*.cachefile
+
+# Visual Studio profiler
+*.psess
+*.vsp
+*.vspx
+
+# Guidance Automation Toolkit
+*.gpState
+
+# ReSharper is a .NET coding add-in
+_ReSharper*/
+*.[Rr]e[Ss]harper
+
+# TeamCity is a build add-in
+_TeamCity*
+
+# DotCover is a Code Coverage Tool
+*.dotCover
+
+# NCrunch
+*.ncrunch*
+.*crunch*.local.xml
+
+# Installshield output folder
+[Ee]xpress/
+
+# DocProject is a documentation generator add-in
+DocProject/buildhelp/
+DocProject/Help/*.HxT
+DocProject/Help/*.HxC
+DocProject/Help/*.hhc
+DocProject/Help/*.hhk
+DocProject/Help/*.hhp
+DocProject/Help/Html2
+DocProject/Help/html
+
+# Click-Once directory
+publish/
+
+# Publish Web Output
+*.Publish.xml
+*.pubxml
+
+# NuGet Packages Directory
+## TODO: If you have NuGet Package Restore enabled, uncomment the next line
+#packages/
+
+# Windows Azure Build Output
+csx
+*.build.csdef
+
+# Windows Store app package directory
+AppPackages/
+
+# Others
+sql/
+*.Cache
+ClientBin/
+[Ss]tyle[Cc]op.*
+~$*
+*~
+*.dbmdl
+*.[Pp]ublish.xml
+*.pfx
+*.publishsettings
+
+# RIA/Silverlight projects
+Generated_Code/
+
+# Backup & report files from converting an old project file to a newer
+# Visual Studio version. Backup files are not needed, because we have git ;-)
+_UpgradeReport_Files/
+Backup*/
+UpgradeLog*.XML
+UpgradeLog*.htm
+
+# SQL Server files
+App_Data/*.mdf
+App_Data/*.ldf
+
+#############
+## Windows detritus
+#############
+
+# Windows image file caches
+Thumbs.db
+ehthumbs.db
+
+# Folder config file
+Desktop.ini
+
+# Recycle Bin used on file shares
+$RECYCLE.BIN/
+
+# Mac crap
+.DS_Store
+
+
+#############
+## Python
+#############
+
+*.py[co]
+
+# Packages
+*.egg
+*.egg-info
+dist/
+build/
+eggs/
+parts/
+var/
+sdist/
+develop-eggs/
+.installed.cfg
+
+# Installer logs
+pip-log.txt
+
+# Unit test / coverage reports
+.coverage
+.tox
+
+#Translations
+*.mo
+
+#Mr Developer
+.mr.developer.cfg

Test_M6502/roms/6502_decimal_test.a65

@@ -0,0 +1,355 @@
+; Verify decimal mode behavior
+; Written by Bruce Clark.  This code is public domain.
+; see http://www.6502.org/tutorials/decimal_mode.html
+;
+; Returns:
+;   ERROR = 0 if the test passed
+;   ERROR = 1 if the test failed
+;   modify the code at the DONE label for desired program end
+;
+; This routine requires 17 bytes of RAM -- 1 byte each for:
+;   AR, CF, DA, DNVZC, ERROR, HA, HNVZC, N1, N1H, N1L, N2, N2L, NF, VF, and ZF
+; and 2 bytes for N2H
+;
+; Variables:
+;   N1 and N2 are the two numbers to be added or subtracted
+;   N1H, N1L, N2H, and N2L are the upper 4 bits and lower 4 bits of N1 and N2
+;   DA and DNVZC are the actual accumulator and flag results in decimal mode
+;   HA and HNVZC are the accumulator and flag results when N1 and N2 are
+;     added or subtracted using binary arithmetic
+;   AR, NF, VF, ZF, and CF are the predicted decimal mode accumulator and
+;     flag results, calculated using binary arithmetic
+;
+; This program takes approximately 1 minute at 1 MHz (a few seconds more on
+; a 65C02 than a 6502 or 65816)
+;
+
+; Configuration:
+cputype = 0         ; 0 = 6502, 1 = 65C02, 2 = 65C816
+vld_bcd = 0         ; 0 = allow invalid bcd, 1 = valid bcd only
+chk_a   = 1         ; check accumulator
+chk_n   = 0         ; check sign (negative) flag
+chk_v   = 0         ; check overflow flag
+chk_z   = 0         ; check zero flag
+chk_c   = 1         ; check carry flag
+
+end_of_test macro
+                db  $db     ;execute 65C02 stop instruction
+            endm
+
+        bss
+        org 0
+; operands - register Y = carry in
+N1      ds  1
+N2      ds  1
+; binary result
+HA      ds  1
+HNVZC   ds  1
+                    ;04
+; decimal result
+DA      ds  1
+DNVZC   ds  1
+; predicted results
+AR      ds  1
+NF      ds  1
+                    ;08
+VF      ds  1
+ZF      ds  1
+CF      ds  1
+ERROR   ds  1
+                    ;0C
+; workspace
+N1L     ds  1
+N1H     ds  1
+N2L     ds  1
+N2H     ds  2
+
+        code
+        org $200
+TEST    ldy #1    ; initialize Y (used to loop through carry flag values)
+        sty ERROR ; store 1 in ERROR until the test passes
+        lda #0    ; initialize N1 and N2
+        sta N1
+        sta N2
+LOOP1   lda N2    ; N2L = N2 & $0F
+        and #$0F  ; [1] see text
+        if  vld_bcd = 1
+            cmp #$0a
+            bcs NEXT2
+        endif
+        sta N2L
+        lda N2    ; N2H = N2 & $F0
+        and #$F0  ; [2] see text
+        if  vld_bcd = 1
+            cmp #$a0
+            bcs NEXT2
+        endif
+        sta N2H
+        ora #$0F  ; N2H+1 = (N2 & $F0) + $0F
+        sta N2H+1
+LOOP2   lda N1    ; N1L = N1 & $0F
+        and #$0F  ; [3] see text
+        if  vld_bcd = 1
+            cmp #$0a
+            bcs NEXT1
+        endif
+        sta N1L
+        lda N1    ; N1H = N1 & $F0
+        and #$F0  ; [4] see text
+        if  vld_bcd = 1
+            cmp #$a0
+            bcs NEXT1
+        endif
+        sta N1H
+        jsr ADD
+        jsr A6502
+        jsr COMPARE
+        bne DONE
+        jsr SUB
+        jsr S6502
+        jsr COMPARE
+        bne DONE
+NEXT1   inc N1    ; [5] see text
+        bne LOOP2 ; loop through all 256 values of N1
+NEXT2   inc N2    ; [6] see text
+        bne LOOP1 ; loop through all 256 values of N2
+        dey
+        bpl LOOP1 ; loop through both values of the carry flag
+        lda #0    ; test passed, so store 0 in ERROR
+        sta ERROR
+DONE    
+        end_of_test
+           
+; Calculate the actual decimal mode accumulator and flags, the accumulator
+; and flag results when N1 is added to N2 using binary arithmetic, the
+; predicted accumulator result, the predicted carry flag, and the predicted
+; V flag   
+;          
+ADD     sed       ; decimal mode
+        cpy #1    ; set carry if Y = 1, clear carry if Y = 0
+        lda N1
+        adc N2
+        sta DA    ; actual accumulator result in decimal mode
+        php
+        pla
+        sta DNVZC ; actual flags result in decimal mode
+        cld       ; binary mode
+        cpy #1    ; set carry if Y = 1, clear carry if Y = 0
+        lda N1
+        adc N2
+        sta HA    ; accumulator result of N1+N2 using binary arithmetic
+           
+        php
+        pla
+        sta HNVZC ; flags result of N1+N2 using binary arithmetic
+        cpy #1
+        lda N1L
+        adc N2L
+        cmp #$0A
+        ldx #0
+        bcc A1
+        inx
+        adc #5    ; add 6 (carry is set)
+        and #$0F
+        sec
+A1      ora N1H
+;          
+; if N1L + N2L <  $0A, then add N2 & $F0
+; if N1L + N2L >= $0A, then add (N2 & $F0) + $0F + 1 (carry is set)
+;          
+        adc N2H,x
+        php
+        bcs A2
+        cmp #$A0
+        bcc A3
+A2      adc #$5F  ; add $60 (carry is set)
+        sec
+A3      sta AR    ; predicted accumulator result
+        php
+        pla
+        sta CF    ; predicted carry result
+        pla
+;          
+; note that all 8 bits of the P register are stored in VF
+;          
+        sta VF    ; predicted V flags
+        rts
+           
+; Calculate the actual decimal mode accumulator and flags, and the
+; accumulator and flag results when N2 is subtracted from N1 using binary
+; arithmetic
+;          
+SUB     sed       ; decimal mode
+        cpy #1    ; set carry if Y = 1, clear carry if Y = 0
+        lda N1
+        sbc N2
+        sta DA    ; actual accumulator result in decimal mode
+        php
+        pla
+        sta DNVZC ; actual flags result in decimal mode
+        cld       ; binary mode
+        cpy #1    ; set carry if Y = 1, clear carry if Y = 0
+        lda N1
+        sbc N2
+        sta HA    ; accumulator result of N1-N2 using binary arithmetic
+           
+        php
+        pla
+        sta HNVZC ; flags result of N1-N2 using binary arithmetic
+        rts
+           
+        if cputype != 1
+; Calculate the predicted SBC accumulator result for the 6502 and 65816
+;          
+SUB1        cpy #1    ; set carry if Y = 1, clear carry if Y = 0
+            lda N1L
+            sbc N2L
+            ldx #0
+            bcs S11
+            inx
+            sbc #5    ; subtract 6 (carry is clear)
+            and #$0F
+            clc
+S11         ora N1H
+;          
+; if N1L - N2L >= 0, then subtract N2 & $F0
+; if N1L - N2L <  0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+;          
+            sbc N2H,x
+            bcs S12
+            sbc #$5F  ; subtract $60 (carry is clear)
+S12         sta AR
+            rts
+        endif
+           
+        if cputype = 1
+; Calculate the predicted SBC accumulator result for the 6502 and 65C02
+;
+SUB2        cpy #1    ; set carry if Y = 1, clear carry if Y = 0
+            lda N1L
+            sbc N2L
+            ldx #0
+            bcs S21
+            inx
+            and #$0F
+            clc
+S21         ora N1H
+;          
+; if N1L - N2L >= 0, then subtract N2 & $F0
+; if N1L - N2L <  0, then subtract (N2 & $F0) + $0F + 1 (carry is clear)
+;          
+            sbc N2H,x
+            bcs S22
+            sbc #$5F   ; subtract $60 (carry is clear)
+S22         cpx #0
+            beq S23
+            sbc #6
+S23         sta AR     ; predicted accumulator result
+            rts
+        endif
+           
+; Compare accumulator actual results to predicted results
+;          
+; Return:  
+;   Z flag = 1 (BEQ branch) if same
+;   Z flag = 0 (BNE branch) if different
+;          
+COMPARE 
+        if chk_a = 1
+            lda DA
+            cmp AR
+            bne C1
+        endif
+        if chk_n = 1
+            lda DNVZC ; [7] see text
+            eor NF
+            and #$80  ; mask off N flag
+            bne C1
+        endif
+        if chk_v = 1
+            lda DNVZC ; [8] see text
+            eor VF
+            and #$40  ; mask off V flag
+            bne C1    ; [9] see text
+        endif
+        if chk_z = 1
+            lda DNVZC
+            eor ZF    ; mask off Z flag
+            and #2
+            bne C1    ; [10] see text
+        endif
+        if chk_c = 1
+            lda DNVZC
+            eor CF
+            and #1    ; mask off C flag
+        endif
+C1      rts
+           
+; These routines store the predicted values for ADC and SBC for the 6502,
+; 65C02, and 65816 in AR, CF, NF, VF, and ZF
+
+        if cputype = 0
+
+A6502       lda VF      ; 6502
+;          
+; since all 8 bits of the P register were stored in VF, bit 7 of VF contains
+; the N flag for NF
+;          
+            sta NF
+            lda HNVZC
+            sta ZF
+            rts
+           
+S6502       jsr SUB1
+            lda HNVZC
+            sta NF
+            sta VF
+            sta ZF
+            sta CF
+            rts
+
+        endif
+        if  cputype = 1
+
+A6502       lda AR      ; 65C02
+            php
+            pla
+            sta NF
+            sta ZF
+            rts
+           
+S6502       jsr SUB2
+            lda AR
+            php
+            pla
+            sta NF
+            sta ZF
+            lda HNVZC
+            sta VF
+            sta CF
+            rts
+
+        endif
+        if  cputype = 2   
+
+A6502       lda AR      ; 65C816
+            php
+            pla
+            sta NF
+            sta ZF
+            rts
+           
+S6502       jsr SUB1
+            lda AR
+            php
+            pla
+            sta NF
+            sta ZF
+            lda HNVZC
+            sta VF
+            sta CF
+            rts
+
+        endif
+
+        end TEST

Test_M6502/roms/AllSuiteA.asm

@@ -0,0 +1,925 @@
+;	.ORG $4000
+*= $4000
+start:
+; EXPECTED FINAL RESULTS: $0210 = FF
+; (any other number will be the 
+;  test that failed)
+
+; initialize:
+	LDA #$00
+	STA $0210
+	; store each test's expected
+	LDA #$55
+	STA $0200
+	LDA #$AA
+	STA $0201
+	LDA #$FF
+	STA $0202
+	LDA #$6E
+	STA $0203
+	LDA #$42
+	STA $0204
+	LDA #$33
+	STA $0205
+	LDA #$9D
+	STA $0206
+	LDA #$7F
+	STA $0207
+	LDA #$A5
+	STA $0208
+	LDA #$1F
+	STA $0209
+	LDA #$CE
+	STA $020A
+	LDA #$29
+	STA $020B
+	LDA #$42
+	STA $020C
+	LDA #$6C
+	STA $020D
+	LDA #$42
+	STA $020E
+	
+
+; expected result: $022A = 0x55
+test00:
+   	LDA #85
+	LDX #42
+	LDY #115
+	STA $81
+	LDA #$01
+	STA $61
+	LDA #$7E
+	LDA $81
+	STA $0910
+	LDA #$7E
+	LDA $0910
+	STA $56,X
+	LDA #$7E
+	LDA $56,X
+	STY $60
+	STA ($60),Y
+	LDA #$7E
+	LDA ($60),Y
+	STA $07ff,X
+	LDA #$7E
+	LDA $07ff,X
+	STA $07ff,Y
+	LDA #$7E
+	LDA $07ff,Y
+	STA ($36,X)
+	LDA #$7E
+	LDA ($36,X)
+	STX $50
+	LDX $60
+	LDY $50
+	STX $0913
+	LDX #$22
+	LDX $0913
+	STY $0914
+	LDY #$99
+	LDY $0914
+	STY $2D,X
+	STX $77,Y
+	LDY #$99
+	LDY $2D,X
+	LDX #$22
+	LDX $77,Y
+	LDY #$99
+	LDY $08A0,X
+	LDX #$22
+	LDX $08A1,Y
+	STA $0200,X
+	
+; CHECK test00:
+	LDA $022A
+	CMP $0200
+	BEQ test00pass
+	JMP theend
+test00pass:
+	LDA #$FE
+	STA $0210
+	
+	
+; expected result: $A9 = 0xAA
+test01:
+	; imm
+	LDA #85
+	AND #83
+	ORA #56
+	EOR #17
+	
+	; zpg
+	STA $99
+	LDA #185
+	STA $10
+	LDA #231
+	STA $11
+	LDA #57
+	STA $12
+	LDA $99
+	AND $10
+	ORA $11
+	EOR $12
+	
+	; zpx
+	LDX #16
+	STA $99
+	LDA #188
+	STA $20
+	LDA #49
+	STA $21
+	LDA #23
+	STA $22
+	LDA $99
+	AND $10,X
+	ORA $11,X
+	EOR $12,X
+	
+	; abs
+	STA $99
+	LDA #111
+	STA $0110
+	LDA #60
+	STA $0111
+	LDA #39
+	STA $0112
+	LDA $99
+	AND $0110
+	ORA $0111
+	EOR $0112
+	
+	; abx
+	STA $99
+	LDA #138
+	STA $0120
+	LDA #71
+	STA $0121
+	LDA #143
+	STA $0122
+	LDA $99
+	AND $0110,X
+	ORA $0111,X
+	EOR $0112,X
+	
+	; aby
+	LDY #32
+	STA $99
+	LDA #115
+	STA $0130
+	LDA #42
+	STA $0131
+	LDA #241
+	STA $0132
+	LDA $99
+	AND $0110,Y
+	ORA $0111,Y
+	EOR $0112,Y
+	
+	; idx
+	STA $99
+	LDA #112
+	STA $30
+	LDA #$01
+	STA $31
+	LDA #113
+	STA $32
+	LDA #$01
+	STA $33
+	LDA #114
+	STA $34
+        LDA #$01
+        STA $35
+	LDA #197
+	STA $0170
+	LDA #124
+	STA $0171
+	LDA #161
+	STA $0172
+	LDA $99
+	AND ($20,X)
+	ORA ($22,X)
+	EOR ($24,X)
+	
+	; idy
+	STA $99
+	LDA #96
+	STA $40
+	LDA #$01
+	STA $41
+	LDA #97
+	STA $42
+	LDA #$01
+	STA $43
+	LDA #98
+	STA $44
+	LDA #$01
+	STA $45
+	LDA #55
+	STA $0250
+	LDA #35
+	STA $0251
+	LDA #157
+	STA $0252
+	LDA $99
+	LDY #$F0
+	AND ($40),Y
+	ORA ($42),Y
+	EOR ($44),Y
+	
+	STA $A9
+	
+; CHECK test01
+	LDA $A9
+	CMP $0201
+	BEQ test02
+	LDA #$01
+	STA $0210
+	JMP theend
+	
+	
+; expected result: $71 = 0xFF
+test02:
+	LDA #$FF
+	LDX #$00
+	
+	STA $90
+	INC $90
+	INC $90
+	LDA $90
+	LDX $90
+	
+	STA $90,X
+	INC $90,X
+	LDA $90,X
+	LDX $91
+	
+	STA $0190,X
+	INC $0192
+	LDA $0190,X
+	LDX $0192
+	
+	STA $0190,X
+	INC $0190,X
+	LDA $0190,X
+	LDX $0193
+	
+	STA $0170,X
+	DEC $0170,X
+	LDA $0170,X
+	LDX $0174
+	
+	STA $0170,X
+	DEC $0173
+	LDA $0170,X
+	LDX $0173
+
+	STA $70,X
+	DEC $70,X
+	LDA $70,X
+	LDX $72
+	
+	STA $70,X
+	DEC $71
+	DEC $71
+	
+; CHECK test02
+	LDA $71
+	CMP $0202
+	BEQ test03
+	LDA #$02
+	STA $0210
+	JMP theend
+	
+	
+; expected result: $01DD = 0x6E
+test03:
+	LDA #$4B
+	LSR
+	ASL
+	
+	STA $50
+	ASL $50
+	ASL $50
+	LSR $50
+	LDA $50
+	
+	LDX $50
+	ORA #$C9
+	STA $60
+	ASL $4C,X
+	LSR $4C,X
+	LSR $4C,X
+	LDA $4C,X
+	
+	LDX $60
+	ORA #$41
+	STA $012E
+	LSR $0100,X
+	LSR $0100,X
+	ASL $0100,X
+	LDA $0100,X
+	
+	LDX $012E
+	ORA #$81
+	STA $0100,X
+	LSR $0136
+	LSR $0136
+	ASL $0136
+	LDA $0100,X
+	
+	; rol & ror
+	
+	ROL
+	ROL
+	ROR
+	STA $70
+	
+	LDX $70
+	ORA #$03
+	STA $0C,X
+	ROL $C0
+	ROR $C0
+	ROR $C0
+	LDA $0C,X
+	
+	LDX $C0
+	STA $D0
+	ROL $75,X
+	ROL $75,X
+	ROR $75,X
+	LDA $D0
+	
+	LDX $D0
+	STA $0100,X
+	ROL $01B7
+	ROL $01B7
+	ROL $01B7
+	ROR $01B7
+	LDA $0100,X
+	
+	LDX $01B7
+	STA $01DD
+	ROL $0100,X
+	ROR $0100,X
+	ROR $0100,X
+	
+; CHECK test03
+	LDA $01DD
+	CMP $0203
+	BEQ test04
+	LDA #$03
+	STA $0210
+	JMP theend
+	
+	
+; expected result: $40 = 0x42
+test04:
+	LDA #$E8 ;originally:#$7C
+	STA $20
+	LDA #$42 ;originally:#$02
+	STA $21
+	LDA #$00
+	ORA #$03
+	JMP jump1
+	ORA #$FF ; not done
+jump1:
+	ORA #$30
+	JSR subr
+	ORA #$42
+	JMP ($0020)
+	ORA #$FF ; not done
+subr:
+	STA $30
+	LDX $30
+	LDA #$00
+	RTS
+final:
+	STA $0D,X
+	
+; CHECK test04
+	LDA $40
+	CMP $0204
+	BEQ test05
+	LDA #$04
+	STA $0210
+	JMP theend
+	
+
+; expected result: $40 = 0x33
+test05:
+	LDA #$35
+	
+	TAX
+	DEX
+	DEX
+	INX
+	TXA
+	
+	TAY
+	DEY
+	DEY
+	INY
+	TYA
+	
+	TAX
+	LDA #$20
+	TXS
+	LDX #$10
+	TSX
+	TXA
+	
+	STA $40
+	
+; CHECK test05
+	LDA $40
+	CMP $0205
+	BEQ test06
+	LDA #$05
+	STA $0210
+	JMP theend
+	
+	
+; expected result: $30 = 9D
+test06:
+
+; RESET TO CARRY FLAG = 0
+	ROL
+
+	LDA #$6A
+	STA $50
+	LDA #$6B
+	STA $51
+	LDA #$A1
+	STA $60
+	LDA #$A2
+	STA $61
+	
+	LDA #$FF
+	ADC #$FF
+	ADC #$FF
+	SBC #$AE
+	
+	STA $40
+	LDX $40
+	ADC $00,X
+	SBC $01,X
+		
+	ADC $60
+	SBC $61
+	
+	STA $0120
+	LDA #$4D
+	STA $0121
+	LDA #$23
+	ADC $0120
+	SBC $0121
+	
+	STA $F0
+	LDX $F0
+	LDA #$64
+	STA $0124
+	LDA #$62
+	STA $0125
+	LDA #$26
+	ADC $0100,X
+	SBC $0101,X
+
+	STA $F1
+	LDY $F1
+	LDA #$E5
+	STA $0128
+	LDA #$E9
+	STA $0129
+	LDA #$34
+	ADC $0100,Y
+	SBC $0101,Y
+	
+	STA $F2
+	LDX $F2
+	LDA #$20
+	STA $70
+	LDA #$01
+	STA $71
+	LDA #$24
+	STA $72
+	LDA #$01
+	STA $73
+	ADC ($41,X)
+	SBC ($3F,X)
+	
+	STA $F3
+	LDY $F3
+	LDA #$DA
+	STA $80
+	LDA #$00
+	STA $81
+	LDA #$DC
+	STA $82
+	LDA #$00
+	STA $83
+	LDA #$AA
+	ADC ($80),Y
+	SBC ($82),Y
+	STA $30
+	
+; CHECK test06
+	LDA $30
+	CMP $0206
+	BEQ test07
+	LDA #$06
+	STA $0210
+	JMP theend
+	
+	
+; expected result: $15 = 0x7F
+test07:
+	; prepare memory	
+	LDA #$00
+	STA $34
+	LDA #$FF
+	STA $0130
+	LDA #$99
+	STA $019D
+	LDA #$DB
+	STA $0199
+	LDA #$2F
+	STA $32
+	LDA #$32
+	STA $4F
+	LDA #$30
+	STA $33
+	LDA #$70
+	STA $AF
+	LDA #$18
+	STA $30
+	
+	; imm
+	CMP #$18
+	BEQ beq1 ; taken
+	AND #$00 ; not done
+beq1:
+	; zpg
+	ORA #$01
+	CMP $30
+	BNE bne1 ; taken
+	AND #$00 ; not done
+bne1:
+	; abs
+	LDX #$00
+	CMP $0130
+	BEQ beq2 ; not taken
+	STA $40
+	LDX $40
+beq2:
+	; zpx
+	CMP $27,X
+	BNE bne2 ; not taken
+	ORA #$84
+	STA $41
+	LDX $41
+bne2:
+	; abx
+	AND #$DB
+	CMP $0100,X
+	BEQ beq3 ; taken
+	AND #$00 ; not done
+beq3:
+	; aby
+	STA $42
+	LDY $42
+	AND #$00
+	CMP $0100,Y
+	BNE bne3 ; taken
+	ORA #$0F ; not done
+bne3:
+	; idx
+	STA $43
+	LDX $43
+	ORA #$24
+	CMP ($40,X)
+	BEQ beq4 ; not taken
+	ORA #$7F
+beq4:
+	; idy
+	STA $44
+	LDY $44 
+	EOR #$0F
+	CMP ($33),Y
+	BNE bne4 ; not taken
+	LDA $44
+	STA $15
+bne4:
+
+; CHECK test07
+	LDA $15
+	CMP $0207
+	BEQ test08
+	LDA #$07
+	STA $0210
+	JMP theend
+
+
+; expected result: $42 = 0xA5
+test08:
+	; prepare memory
+	LDA #$A5
+	STA $20
+	STA $0120
+	LDA #$5A
+	STA $21
+	
+	; cpx imm...
+	LDX #$A5
+	CPX #$A5
+	BEQ b1 ; taken
+	LDX #$01 ; not done
+b1:
+	; cpx zpg...
+	CPX $20
+	BEQ b2 ; taken
+	LDX #$02 ; not done
+b2:
+	; cpx abs...
+	CPX $0120
+	BEQ b3 ; taken
+	LDX #$03 ; not done
+b3:
+	; cpy imm...
+	STX $30
+	LDY $30
+	CPY #$A5
+	BEQ b4 ; taken
+	LDY #$04 ; not done
+b4:
+	; cpy zpg...
+	CPY $20
+	BEQ b5 ; taken
+	LDY #$05 ; not done
+b5:
+	; cpy abs...
+	CPY $0120
+	BEQ b6 ; taken
+	LDY #$06 ; not done
+b6:	
+	; bit zpg...
+	STY $31
+	LDA $31
+	BIT $20
+	BNE b7 ; taken
+	LDA #$07 ; not done
+b7:
+	; bit abs...
+	BIT $0120
+	BNE b8 ; taken
+	LDA #$08 ; not done
+b8:
+	BIT $21
+	BNE b9 ; not taken
+	STA $42	
+b9:
+
+; CHECK test08
+	LDA $42
+	CMP $0208
+	BEQ test09
+	LDA #$08
+	STA $0210
+	JMP theend
+
+
+; expected result: $80 = 0x1F
+test09:
+	; prepare memory
+	LDA #$54
+	STA $32
+	LDA #$B3
+	STA $A1
+	LDA #$87
+	STA $43
+	
+	; BPL
+	LDX #$A1
+	BPL bpl1 ; not taken
+	LDX #$32
+bpl1:
+	LDY $00,X
+	BPL bpl2 ; taken
+	LDA #$05 ; not done
+	LDX $A1 ; not done
+bpl2:
+
+	; BMI
+	BMI bmi1 ; not taken
+	SBC #$03
+bmi1:
+	BMI bmi2 ; taken
+	LDA #$41 ; not done
+bmi2:
+
+	; BVC
+	EOR #$30
+	STA $32
+	ADC $00,X
+	BVC bvc1 ; not taken
+	LDA #$03
+bvc1:
+	STA $54
+	LDX $00,Y
+	ADC $51,X
+	BVC bvc2 ; taken
+	LDA #$E5 ; not done
+bvc2:
+
+	; BVS
+	ADC $40,X
+	BVS bvs1 ; not taken
+	STA $0001,Y
+	ADC $55
+bvs1:
+	BVS bvs2 ; taken
+	LDA #$00
+bvs2:
+
+	; BCC
+	ADC #$F0
+	BCC bcc1 ; not taken
+	STA $60
+	ADC $43
+bcc1:
+	BCC bcc2 ; taken
+	LDA #$FF
+bcc2:
+
+	; BCS
+	ADC $54
+	BCS bcs1 ; not taken
+	ADC #$87
+	LDX $60
+bcs1:	
+	BCS bcs2 ; taken
+	LDA #$00 ; not done
+bcs2:
+	STA $73,X
+	
+; CHECK test09
+	LDA $80
+	CMP $0209
+	BEQ test10
+	LDA #$09
+	STA $0210
+	JMP theend
+
+	
+; expected result: $30 = 0xCE
+test10:
+
+; RESET TO CARRY = 0 & OVERFLOW = 0
+	ADC #$00
+
+	LDA #$99
+	ADC #$87
+	CLC
+	NOP
+	BCC t10bcc1 ; taken
+	ADC #$60 ; not done
+	ADC #$93 ; not done
+t10bcc1:
+	SEC
+	NOP
+	BCC t10bcc2 ; not taken
+	CLV
+t10bcc2:
+	BVC t10bvc1 ; taken
+	LDA #$00 ; not done
+t10bvc1: 
+	ADC #$AD
+	NOP
+	STA $30
+	
+; CHECK test10
+	LDA $30
+	CMP $020A
+	BEQ test11
+	LDA #$0A
+	STA $0210
+	JMP theend
+	
+	
+; expected result: $30 = 0x29
+test11:
+
+; RESET TO CARRY = 0 & ZERO = 0
+	ADC #$01
+	
+	LDA #$27
+	ADC #$01
+	SEC
+	PHP
+	CLC
+	PLP
+	ADC #$00
+	PHA
+	LDA #$00
+	PLA
+	STA $30
+	
+; CHECK test11
+	LDA $30
+	CMP $020B
+	BEQ test12
+	LDA #$0B
+	STA $0210
+	JMP theend
+	
+	
+; expected result: $33 = 0x42
+test12:
+	CLC
+	LDA #$42
+	BCC runstuff
+	STA $33
+	BCS t12end
+runstuff:
+	LDA #$45
+	PHA
+	LDA #$61
+	PHA
+	SEC
+	PHP
+	CLC
+	RTI
+t12end:
+
+; CHECK test12
+	LDA $33
+	CMP $020C
+	BEQ test13
+	LDA #$0C
+	STA $0210
+	JMP theend
+	
+	
+; expected result: $21 = 0x6C (simulator)
+;                  $21 = 0x0C (ours)
+test13:
+
+; RESET TO CARRY = 0 & ZERO = 0
+	ADC #$01
+	
+	SEI
+	SED
+	PHP
+	PLA
+	STA $20
+	CLI
+	CLD
+	PHP
+	PLA
+	ADC $20
+	STA $21
+
+; CHECK test13
+	LDA $21
+	CMP $020D
+	BEQ test14
+	LDA #$0D
+	STA $0210
+	JMP theend
+
+
+; expect result: $60 = 0x42
+test14:
+	; !!! NOTICE: BRK doesn't work in this
+	; simulator, so commented instructions 
+	; are what should be executed...
+	;JMP pass_intrp
+	LDA #$41
+	STA $60
+	;RTI
+	;pass_intrp:
+	;LDA #$FF
+	;STA $60
+	;BRK (two bytes)
+	INC $60
+	
+; CHECK test14
+	LDA $60
+	CMP $020E
+	BEQ suiteafinal
+	LDA #$0E
+	STA $0210
+	JMP theend
+
+suiteafinal:
+	; IF $0210 == 0xFE, INCREMENT
+	; (checking that it didn't 
+	;  happen to wander off and 
+	;  not run our instructions
+	;  to say which tests failed...)
+	LDA #$FE
+	CMP $0210
+	BNE theend
+	INC $0210
+theend:
+	JMP theend

Test_M6502/roms/license.txt

@@ -0,0 +1,674 @@
+                    GNU GENERAL PUBLIC LICENSE
+                       Version 3, 29 June 2007
+
+ Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+                            Preamble
+
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+software and other kinds of works.
+
+  The licenses for most software and other practical works are designed
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+the GNU General Public License is intended to guarantee your freedom to
+share and change all versions of a program--to make sure it remains free
+software for all its users.  We, the Free Software Foundation, use the
+GNU General Public License for most of our software; it applies also to
+any other work released this way by its authors.  You can apply it to
+your programs, too.
+
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+price.  Our General Public Licenses are designed to make sure that you
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+
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+know their rights.
+
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+(1) assert copyright on the software, and (2) offer you this License
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+
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Test_M6502/roms/readme.txt

@@ -0,0 +1,25 @@
+This is a set of functional tests for the 6502/65C02 type processors.
+
+The 6502_functional_test.a65 is an assembler sourcecode to test all valid
+opcodes and addressing modes of the original NMOS 6502 cpu.
+
+The 65C02_extended_opcodes_test.a65c tests all additional opcodes of the
+65C02 processor including undefined opcodes.
+
+The 6502_interrupt_test.a65 is a simple test to check the interrupt system
+of both processors. A feedback register is required to inject IRQ and NMI
+requests.
+
+Detailed information about how to configure, assemble and run the tests is
+included in each source file.
+
+The tests have primarily been written to test my own ATMega16 6502 emulator
+project. You can find it here: http://2m5.de/6502_Emu/index.htm
+
+A discussion about the tests can be found here:
+http://forum.6502.org/viewtopic.php?f=2&t=2241
+
+Good luck debugging your emulator, simulator, fpga core, discrete
+logic implementation or whatever you have!
+
+

Test_M6502/roms/report.i65

@@ -0,0 +1,220 @@
+;**** report 6502 funtional test errors to standard I/O ****
+;
+;this include file is part of the 6502 functional tests
+;it is used when you configure report = 1 in the tests
+;
+;to adopt the standard output vectors of your test environment
+;you must modify the rchar and rget subroutines in this include
+;
+;I/O hardware may have to be initialized in report_init
+
+;print message macro - \1 = message location
+rprt    macro
+        ldx #0
+        lda \1
+loop\?
+        jsr rchar
+        inx
+        lda \1,x
+        bne loop\?
+        endm
+
+;initialize I/O as required (example: configure & enable ACIA)
+report_init
+        ;nothing to initialize
+        rprt rmsg_start
+        rts
+        
+;show stack (with saved registers), zeropage and absolute memory workspace
+;after an error was trapped in the test program
+report_error
+;save registers
+        php
+        pha
+        txa
+        pha
+        tya
+        pha
+        cld
+;show stack with index to registers at error
+        rprt rmsg_stack
+        tsx
+        inx
+        lda #1      ;address high
+        jsr rhex
+        txa         ;address low
+        jsr rhex
+rstack  jsr rspace
+        lda $100,x  ;stack data
+        jsr rhex
+        inx
+        bne rstack
+        jsr rcrlf   ;new line
+;show zero page workspace
+        lda #0
+        jsr rhex
+        lda #zpt
+        tax
+        jsr rhex
+rzp     jsr rspace
+        lda 0,x
+        jsr rhex
+        inx
+        cpx #zp_bss
+        bne rzp
+        jsr rcrlf
+;show absolute workspace
+        lda #hi(data_segment)
+        jsr rhex
+        lda #lo(data_segment)
+        jsr rhex
+        ldx #0
+rabs    jsr rspace
+        lda data_segment,x
+        jsr rhex
+        inx
+        cpx #(data_bss-data_segment)
+        bne rabs
+;ask to continue
+        rprt rmsg_cont
+rerr1   jsr rget
+        cmp #'S'
+        beq rskip
+        cmp #'C'
+        bne rerr1        
+;restore registers
+        pla
+        tay
+        pla
+        tax
+        pla 
+        plp
+        rts
+;skip the current test
+rskip   lda #$f0            ;already end of tests?
+        cmp test_case
+        beq rerr1           ;skip is not available
+        ldx #$ff            ;clear stack
+        txs
+        inc test_case       ;next test
+        lda #lo(start)      ;find begin of test
+        sta zpt
+        lda #hi(start)
+        sta zpt+1
+rskipl1 ldy #4              ;search pattern
+rskipl2 lda (zpt),y         ;next byte
+        cmp rmark,y
+        bne rskipnx         ;no match
+        dey
+        bmi rskipf          ;found pattern        
+        cpy #1              ;skip immediate value
+        bne rskipl2
+        dey
+        beq rskipl2
+        
+rskipnx inc zpt             ;next RAM location
+        bne rskipl1
+        inc zpt+1
+        bne rskipl1
+
+rskipf  ldy #1              ;pattern found - check test number
+        lda (zpt),y         ;test number
+        cmp #$f0            ;end of last test?
+        beq rskipe          ;ask to rerun all
+        cmp test_case       ;is next test?
+        bne rskipnx         ;continue searching
+rskipe  jmp (zpt)           ;start next test or rerun at end of tests
+        
+rmark   lda #0              ;begin of test search pattern
+        sta test_case
+
+;show test has ended, ask to repeat
+report_success
+    if rep_int = 1
+        rprt rmsg_priority
+        lda data_segment    ;show interrupt sequence
+        jsr rhex
+        jsr rspace
+        lda data_segment+1
+        jsr rhex
+        jsr rspace
+        lda data_segment+2
+        jsr rhex
+    endif
+        rprt rmsg_success
+rsuc1   jsr rget
+        cmp #'R'
+        bne rsuc1        
+        rts
+
+;input subroutine
+;get a character from standard input 
+;adjust according to the needs in your test environment
+rget                ;get character in A
+;rget1
+;        lda $bff1   ;wait RDRF
+;        and #8
+;        beq rget1
+;not a real ACIA - so RDRF is not checked
+;        lda $bff0   ;read acia rx reg
+        lda $f004   ;Kowalski simulator default
+;the load can be replaced by a call to a kernal routine
+;        jsr $ffcf   ;example: CHRIN for a C64
+        cmp #'a'    ;lower case
+        bcc rget1
+        and #$5f    ;convert to upper case
+rget1   rts
+
+;output subroutines
+rcrlf   lda #10
+        jsr rchar
+        lda #13
+        bne rchar
+
+rspace  lda #' '
+        bne rchar
+        
+rhex    pha         ;report hex byte in A
+        lsr a       ;high nibble first
+        lsr a
+        lsr a
+        lsr a
+        jsr rnib
+        pla         ;now low nibble
+        and #$f
+
+rnib    clc         ;report nibble in A
+        adc #'0'    ;make printable 0-9
+        cmp #'9'+1
+        bcc rchar
+        adc #6      ;make printable A-F
+
+;send a character to standard output 
+;adjust according to the needs in your test environment
+;register X needs to be preserved!
+rchar               ;report character in A
+;        pha         ;wait TDRF
+;rchar1  lda $bff1
+;        and #$10
+;        beq rchar1
+;        pla
+;not a real ACIA - so TDRF is not checked
+;        sta $bff0   ;write acia tx reg
+        sta $f001   ;Kowalski simulator default
+;the store can be replaced by a call to a kernal routine
+;        jsr $ffd2   ;example: CHROUT for a C64
+        rts
+
+rmsg_start
+        db  10,13,"Started testing",10,13,0
+rmsg_stack
+        db  10,13,"regs Y  X  A  PS PCLPCH",10,13,0
+rmsg_cont
+        db  10,13,"press C to continue or S to skip current test",10,13,0
+rmsg_success
+        db  10,13,"All tests completed, press R to repeat",10,13,0
+    if rep_int = 1
+rmsg_priority
+        db  10,13,"interrupt sequence (NMI IRQ BRK) ",0
+    endif
+