From a2cc5a0c471936e7b91f33d3c325b20ef0bb2b0c Mon Sep 17 00:00:00 2001
From: Adrian Conlon <Adrian.conlon@gmail.com>
Date: Wed, 9 Sep 2026 23:08:37 +0100
Subject: [PATCH 1/4] fix build error

---
 LR35902/LR35902.cs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LR35902/LR35902.cs b/LR35902/LR35902.cs
index bb38254..3e6bbef 100644
--- a/LR35902/LR35902.cs
+++ b/LR35902/LR35902.cs
@@ -391,7 +391,7 @@ namespace LR35902
             base.ReturnConditional(condition);
         }
 
-        protected override void Return()
+        public override void Return()
         {
             base.Return();
             this.TickMachine();

From db02f57c3b4ebbc94c72a3180390738bcb810cca Mon Sep 17 00:00:00 2001
From: Adrian Conlon <Adrian.conlon@gmail.com>
Date: Fri, 11 Sep 2026 08:46:11 +0100
Subject: [PATCH 2/4] Tidy disassembled pin states in priority order

---
 Z80/Disassembler.cs | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Z80/Disassembler.cs b/Z80/Disassembler.cs
index dbddbea..e233f2b 100644
--- a/Z80/Disassembler.cs
+++ b/Z80/Disassembler.cs
@@ -63,10 +63,10 @@ namespace Z80
                 + $"I={i:x2} R={(byte)r:x2} "
                 + $"IM={im} "
                 + $"IFF1={(cpu.IFF1 ? 1 : 0)} "
-                + $"{(cpu.RESET.Lowered() ? "R" : "-")}"
-                + $"{(cpu.INT.Lowered() ? "I" : "-")}"
                 + $"{(cpu.HALT.Lowered() ? "H" : "-")}"
-                + $"{(cpu.NMI.Lowered() ? "N" : "-")}";
+                + $"{(cpu.RESET.Lowered() ? "R" : "-")}"
+                + $"{(cpu.NMI.Lowered() ? "N" : "-")}"
+                + $"{(cpu.INT.Lowered() ? "I" : "-")}";
         }
 
         public string Disassemble(Z80 cpu)

From 53f0b740140b6b46351e51a705c0842bd3418a64 Mon Sep 17 00:00:00 2001
From: Adrian Conlon <Adrian.conlon@gmail.com>
Date: Fri, 11 Sep 2026 15:32:38 +0100
Subject: [PATCH 3/4] More reset tweaks

---
 EightBit/Processor.cs |  4 +++-
 Z80/Z80.cs            | 12 +++++-------
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/EightBit/Processor.cs b/EightBit/Processor.cs
index c8a5c01..879b76e 100644
--- a/EightBit/Processor.cs
+++ b/EightBit/Processor.cs
@@ -155,7 +155,9 @@ namespace EightBit
             }
         }
 
-        protected virtual void HandleRESET() => this.RaiseRESET();
+        protected virtual void HandleRESET()
+        {
+        }
 
         protected virtual void HandleINT() => this.RaiseINT();
 
diff --git a/Z80/Z80.cs b/Z80/Z80.cs
index 5ea5613..b320242 100644
--- a/Z80/Z80.cs
+++ b/Z80/Z80.cs
@@ -17,14 +17,12 @@ namespace Z80
             this.UpdateRegisterBank();
             this.UpdateAFBank();
             this.RaisedPOWER += this.Z80_RaisedPOWER;
-            this.LoweredRESET += this.Z80_LoweredRESET;
             this.LoweredNMI += this.Z80_LoweredNMI;
             this.LoweredINT += this.Z80_LoweredINT;
         }
 
         private bool _interruptPending;
         private bool _nonMaskableInterruptPending;
-        private bool _resetPending;
 
         private readonly InputOutput _ports;
 
@@ -182,9 +180,8 @@ namespace Z80
             this._modifiedF = 0;
             this._displaced = this._prefixCB = this._prefixDD = this._prefixED = this._prefixFD = false;
 
-            if (this._resetPending)
+            if (this.RESET.Lowered())
             {
-                this._resetPending = false;
                 this.HandleRESET();
                 return;
             }
@@ -204,6 +201,9 @@ namespace Z80
                 }
             }
 
+            Debug.Assert(this.RESET.Raised());
+            Debug.Assert(this.NMI.Raised());
+
             // ** From the Z80 CPU User Manual
             // When a software HALT instruction is executed, the CPU executes NOPs until an interrupt
             // is received(either a non-maskable or a maskable interrupt while the interrupt flip-flop is
@@ -252,8 +252,6 @@ namespace Z80
 
         private void Z80_LoweredNMI(object? sender, EventArgs e) => this._nonMaskableInterruptPending = true;
 
-        private void Z80_LoweredRESET(object? sender, EventArgs e) => this._resetPending = true;
-
         #region Z80 specific pins
 
         #region NMI pin
@@ -594,10 +592,10 @@ namespace Z80
         protected override void HandleRESET()
         {
             base.HandleRESET();
-            this.DisableInterrupts();
             this.IM = 0;
             this.IV = this.REFRESH = 0;
             this.SP.Joined = this.AF.Joined = (ushort)Mask.Sixteen;
+            this.Tick();
         }
 
         private byte ReadDataUnderInterrupt()

From 8b10bc575d75fe96777927377893acc364b63e2f Mon Sep 17 00:00:00 2001
From: Adrian Conlon <Adrian.conlon@gmail.com>
Date: Fri, 11 Sep 2026 21:29:21 +0100
Subject: [PATCH 4/4] Correct Z80 NMI assertion and reset test

---
 Z80/Z80.UnitTests/ResetTests.cs | 4 ++--
 Z80/Z80.cs                      | 1 -
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/Z80/Z80.UnitTests/ResetTests.cs b/Z80/Z80.UnitTests/ResetTests.cs
index 2d9a17a..7583292 100644
--- a/Z80/Z80.UnitTests/ResetTests.cs
+++ b/Z80/Z80.UnitTests/ResetTests.cs
@@ -64,12 +64,12 @@ namespace Z80.UnitTests
         }
 
         [TestMethod]
-        public void Reset_Deasserts_Reset_Pin()
+        public void Reset_Ignores_Reset_Pin()
         {
             this.cpu.LowerRESET(); // asserts RESET — fires LoweredRESET event
             Assert.IsTrue(this.cpu.RESET.Lowered(), "RESET pin must be asserted before step");
             this.cpu.Step();
-            Assert.IsTrue(this.cpu.RESET.Raised(), "HandleRESET must deassert the RESET pin");
+            Assert.IsTrue(this.cpu.RESET.Lowered());
         }
 
         [TestMethod]
diff --git a/Z80/Z80.cs b/Z80/Z80.cs
index b320242..8e37210 100644
--- a/Z80/Z80.cs
+++ b/Z80/Z80.cs
@@ -202,7 +202,6 @@ namespace Z80
             }
 
             Debug.Assert(this.RESET.Raised());
-            Debug.Assert(this.NMI.Raised());
 
             // ** From the Z80 CPU User Manual
             // When a software HALT instruction is executed, the CPU executes NOPs until an interrupt