Adrian Conlon caca3467d9 More unit test stuff. New tests generated by copilot

2025-05-13 09:52:12 +01:00

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EightBit.UnitTest

More unit test stuff. New tests generated by copilot

2025-05-13 09:52:12 +01:00

AccessLevel.cs

Not sure if this was a really good idea, but integrated StyleCop rules into the builds. Corrected all except documentation problems.

2019-02-04 23:52:21 +00:00

BigEndianProcessor.cs

Add increment/decrement operations to the Register16 class

2025-05-11 19:24:40 +01:00

Bits.cs

More .net 9 analysis changes

2024-10-12 12:24:42 +01:00

Bus.cs

Add increment/decrement operations to the Register16 class

2025-05-11 19:24:40 +01:00

Chip.cs

Apply all analysis suggestions

2024-10-12 09:14:29 +01:00

ClockedChip.cs

Prefer to use events directly, rather than through "On" methods

2025-03-29 11:31:47 +00:00

Device.cs

Turns out using lambdas to control pins is lovely and correct, but terribly slow. Back to a more traditional method.

2025-03-24 20:18:04 +00:00

EightBit.csproj

Quite a fun low level rearrangement of the 16-bit register class.

2025-05-08 19:46:08 +01:00

IMapper.cs

Implement some suggestions from the code analysis.

2019-02-14 23:51:32 +00:00

InputOutput.cs

Port access in Intel processors is 16 rather than 8 bit addressed

2025-05-08 13:00:30 +01:00

IntelHexFile.cs

Apply all analysis suggestions

2024-10-12 09:14:29 +01:00

IntelOpCodeDecoded.cs

Apply all analysis suggestions

2024-10-12 09:14:29 +01:00

IntelProcessor.cs

Add increment/decrement operations to the Register16 class

2025-05-11 19:24:40 +01:00

LittleEndianProcessor.cs

Add increment/decrement operations to the Register16 class

2025-05-11 19:24:40 +01:00

Mask.cs

Work my way through a bunch of the analysis suggestions.

2020-06-22 00:00:15 +01:00

Memory.cs

More style changes

2024-10-09 21:16:55 +01:00

MemoryMapping.cs

Apply all analysis suggestions

2024-10-12 09:14:29 +01:00

PinLevel.cs

Not sure if this was a really good idea, but integrated StyleCop rules into the builds. Corrected all except documentation problems.

2019-02-04 23:52:21 +00:00

PinLevelExtensions.cs

Apply all analysis suggestions

2024-10-12 09:14:29 +01:00

PortEventArgs.cs

Port access in Intel processors is 16 rather than 8 bit addressed

2025-05-08 13:00:30 +01:00

Processor.cs

Couple of small Register16 adjustments

2025-05-11 21:30:15 +01:00

Ram.cs

Apply all analysis suggestions

2024-10-12 09:14:29 +01:00

Register16.cs

Couple of small Register16 adjustments

2025-05-11 21:30:15 +01:00

Rom.cs

Apply all analysis suggestions

2024-10-12 09:14:29 +01:00

TestHarness.cs

Shared test harness

2024-10-12 11:48:54 +01:00

UnusedMemory.cs

Apply all analysis suggestions

2024-10-12 09:14:29 +01:00